CN111414272B - Electronic device and reset method thereof - Google Patents
Electronic device and reset method thereof Download PDFInfo
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- CN111414272B CN111414272B CN201910007701.0A CN201910007701A CN111414272B CN 111414272 B CN111414272 B CN 111414272B CN 201910007701 A CN201910007701 A CN 201910007701A CN 111414272 B CN111414272 B CN 111414272B
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- reset
- electronic device
- control circuit
- electronic
- trigger signal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1438—Restarting or rejuvenating
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention provides an electronic device and a resetting method thereof. The reset method of the electronic device comprises the following steps: transmitting a first trigger signal through a first electronic component of the electronic device; receiving the first trigger signal through a control circuit of the electronic device, and executing a reset operation corresponding to the first trigger signal according to the reset corresponding data; and writing the data corresponding to the reset operation into the reset record data through the control circuit.
Description
Technical Field
The invention relates to an electronic device and a resetting method of the electronic device.
Background
During operation, various hardware components of the electronic device may be reset in response to various conditions. In general, the reset operations of the hardware elements are different, and the influence of the reset operations of the hardware elements on the electronic device is different. If the electronic device cannot confirm what kind of reset operation has been performed, it cannot be known whether the electronic device has completed the hardware reset that should be performed, and thus cannot effectively manage the electronic device and perform system debug.
Disclosure of Invention
The invention provides an electronic device capable of effectively managing the electronic device and performing debugging of the electronic device and a reset method of the electronic device.
In order to solve the above technical problems, the present invention provides an electronic device including a first electronic element, a memory circuit and a control circuit. The first electronic element is used for sending a first trigger signal. The memory circuit is used for storing reset corresponding data and reset record data. The control circuit is coupled to the first electronic device and the memory circuit, and is used for receiving the first trigger signal so as to execute the reset operation corresponding to the first trigger signal according to the reset corresponding data. The control circuit is further used for writing the data corresponding to the reset operation into the reset record data.
In order to solve the above technical problems, the present invention provides a reset method of an electronic device, including: transmitting a first trigger signal through a first electronic component of the electronic device; receiving the first trigger signal through a control circuit of the electronic device, and executing a reset operation corresponding to the first trigger signal according to the reset corresponding data; and writing the data corresponding to the reset operation into the reset record data through the control circuit.
Compared with the prior art, according to the electronic device and the reset method of the electronic device provided by the invention, the electronic device can perform the reset operation according to the reset corresponding data and record the reset operation to the reset record data. Therefore, the state of the electronic device can be accurately grasped. When the electronic device is in an abnormal state, the electronic device can correctly execute corresponding reset operation according to the reset corresponding data; and the executed reset operation can be confirmed through the reset record data, so that the same reset operation is prevented from being repeatedly executed, and whether the executed reset operation is effective or not can be judged based on the current condition of the electronic device. Accordingly, the electronic device can be effectively managed and debug of the electronic device can be performed.
[ description of the drawings ]
FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the invention.
FIG. 2 is a schematic diagram of an electronic device according to an embodiment of the invention.
FIG. 3 is a schematic diagram of an electronic device according to an embodiment of the invention.
FIG. 4 is a schematic diagram of an electronic device according to an embodiment of the invention.
FIG. 5 is a flowchart of a reset method of an electronic device according to an embodiment of the invention.
FIG. 6 is a flowchart of a reset method of an electronic device according to an embodiment of the invention.
[ detailed description ] of the invention
Fig. 1 is a schematic diagram of an electronic device 100 according to an embodiment of the invention. The electronic device 100 includes an electronic element E1, a control circuit C and a memory circuit M. The electronic device E1 can send a trigger signal to the control circuit C. The memory circuit M can store the reset corresponding data and the reset record data. The control circuit C may perform a reset operation according to the reset corresponding data of the memory circuit M, and may update the reset record data of the memory circuit M based on the performed reset operation.
In some embodiments, when the electronic device E1 enters a specific state (e.g. the temperature is too high, the voltage supply is abnormal or an error message is generated), the electronic device E1 sends a trigger signal to the control circuit C. Then, the control circuit C receives the trigger signal sent by the electronic element E1; reading the reset corresponding data stored in the memory circuit M; and executing the reset operation of the corresponding trigger signal according to the reset corresponding data. After the reset operation is completed, the control circuit C writes the data corresponding to the reset operation into the reset record data of the memory circuit M.
For example, taking the electronic device E1 generating the error message as an example, the electronic device E1 sends a first trigger signal corresponding to the error message to the control circuit C. After receiving the first trigger signal, the control circuit C reads the reset corresponding data of the memory circuit M, and compares the first trigger signal with the reset corresponding data. In this case, the control circuit C confirms whether the reset operation corresponding to the first trigger signal restarts the electronic element E1 or controls the electronic element E1 to perform a partial reset, i.e. controls a partial circuit reset in the electronic element E1, according to the reset corresponding data. Further, the control circuit C restarts or partially resets the electronic component E1 according to the first trigger signal and the reset corresponding data, and writes data of the electronic component E1 corresponding to the restart or the partial reset (e.g., an operation code representing the restart of the electronic component E1, a parameter setting used by the restart of the electronic component E1 or a time of restarting the electronic component E1, an operation code representing a partial circuit in the reset electronic component E1, a parameter setting used by a partial circuit in the reset electronic component E1 or a time of a partial circuit in the reset electronic component E1, etc.) into the reset record data.
In some embodiments, when the electronic device E1 enters a specific state (e.g. the temperature is too high, the voltage supply is abnormal or an error message is generated), the electronic device E1 sends a trigger signal to the control circuit C. The control circuit C receives the trigger signal sent by the electronic device E1 and reads the reset corresponding data stored in the memory circuit M. Then, the reset operation corresponding to the trigger signal is confirmed to be the total reset operation based on the trigger signal transmitted from the electronic device E1 and the reset corresponding data. Accordingly, the control circuit C can correspondingly perform the overall reset operation, which causes all electronic components (e.g., the electronic component E1) of the electronic device 100 that can be controlled by the control circuit C to be restarted and all components (e.g., the control circuit C) having the control function to be restarted. After the completion of the total reset operation, the control circuit C writes data corresponding to the total reset operation (e.g., representing the operation codes of the reboot electronic component E1 and the control circuit C, the parameter settings used by the reboot electronic component E1 and the control circuit C, or the time of the reboot electronic component E1 and the control circuit C) into the reset record data of the memory circuit M.
In some embodiments, the electronic device 100 can read the reset record data from the memory circuit M through a processor (e.g., a cpu) to further confirm which reset operations have been performed. In some embodiments, the electronic device 100 may be a data Switch (Switch) or a server. In some embodiments, the control circuit C may be a baseboard management controller (Baseboard Management Controller, BMC) or a complex programmable logic device (Complex Programmable Logic Device, CPLD) or a microcontroller (Micro Control Unit, MCU). In some embodiments, the memory circuit M is a non-volatile memory circuit.
Fig. 2 is a schematic diagram of an electronic device 200 according to an embodiment of the invention. The electronic device 200 includes a memory circuit M, a control circuit C, a processor P that can be controlled by the control circuit C to restart and partially reset one of them, an electronic element E21, and an electronic element E22. When the processor P, the electronic element E21 and the electronic element E22 enter a specific state, a trigger signal may be sent to the control circuit C, and the control circuit C reads the reset corresponding data stored in the memory circuit M again, and executes a reset operation corresponding to the trigger signal according to the reset corresponding data, for example, the control circuit C controls the processor P, the electronic element E21 and the electronic element E22 to restart or partially reset, or the control circuit C executes the above-mentioned total reset operation. After the reset operation is completed, the control circuit C writes the data corresponding to the reset operation into the reset record data of the memory circuit M. In some embodiments, the processor P may also read the reset record data from the memory circuit M, and may edit the reset corresponding data of the memory circuit M.
For example, taking the voltage abnormality of the processor P, the electronic element E21 or the electronic element E22 as an example, the processor P, the electronic element E21 or the electronic element E22 sends a second trigger signal corresponding to the voltage abnormality to the control circuit C. After receiving the second trigger signal, the control circuit C reads the reset corresponding data of the memory circuit M, and compares the second trigger signal with the reset corresponding data. In this case, the control circuit C confirms that the reset operation corresponding to the second trigger signal is a partial reset according to the reset corresponding data, and the control circuit C resets the processor P, the electronic component E21 or the partial circuit of the electronic component E22 (e.g. a partial buffer) according to the second trigger signal and the reset corresponding data, and writes the data corresponding to the reset processor P, the electronic component E21 or the partial circuit of the electronic component E22 (e.g. the operation code representing the reset processor P, the operation code representing the partial circuit of the electronic component E21 or the electronic component E22, the parameter setting used by the reset processor P, the partial circuit of the electronic component E21 or the electronic component E22, the time of the reset processor P, the electronic component E21 or the partial circuit of the electronic component E22, etc.) into the reset record data.
In some embodiments, the electronic device E21 may periodically send an acknowledge signal to the electronic device E22. When the electronic element E21 fails, the electronic element E21 stops sending the confirmation signal to the electronic element E22. The electronic component E22 sends a third trigger signal to the control circuit C when no acknowledge signal is received within a default time. After receiving the third trigger signal, the control circuit C reads the reset corresponding data of the memory circuit M, and compares the third trigger signal with the reset corresponding data. In this case, the control circuit C confirms that the reset operation corresponding to the third trigger signal is to restart the electronic element E21 according to the reset corresponding data. Further, the control circuit C restarts the electronic element E21 according to the third trigger signal and the reset corresponding data, and writes the data corresponding to the restarted electronic element E21 into the reset record data.
Fig. 3 is a schematic diagram of an electronic device 300 according to an embodiment of the invention. The electronic device 300 includes a memory circuit M, a control circuit C, a processor P controlled by the control circuit C to restart and partially reset one of the electronic components E31-E35. The processor P and the electronic components E31-E35 may send trigger signals to the control circuit C. The memory circuit M can store the reset corresponding data and the reset record data. The control circuit C may perform a reset operation according to the reset corresponding data of the memory circuit M, and may update the reset record data of the memory circuit M based on the performed reset operation. The processor P can read the reset record data from the memory circuit M and can edit the reset corresponding data of the memory circuit M.
In some embodiments, when at least one of the processor P and the electronic devices E31-E35 enters a specific state (e.g., the temperature is too high, the voltage supply is abnormal or an error message is generated, etc.), the at least one of the processor P and the electronic devices E31-E35 sends a trigger signal to the control circuit C. Then, the control circuit C receives the trigger signal sent by at least one of the processor P and the electronic devices E31-E35; reading the reset corresponding data stored in the memory circuit M; and executing the reset operation of the corresponding trigger signal according to the reset corresponding data. After the reset operation is completed, the control circuit C writes the data corresponding to the reset operation into the reset record data of the memory circuit M.
In some embodiments, the reset types of the reset operation may include: a light reset type, a medium reset type, a heavy reset type, and a total weight type. When the control circuit C receives the trigger signals from the processor P and the electronic devices E31-E35, the control circuit C analyzes the trigger signals to obtain the corresponding reset type, i.e. any one of the foregoing light reset type, medium reset type, heavy reset type and total reset type, from the trigger signals. The control circuit C may store the reset type obtained from the trigger signal in its own register. Furthermore, after the control circuit C obtains the corresponding reset type from the trigger signal, the control circuit C obtains an instruction set corresponding to any one of the light reset type, the medium reset type, the heavy reset type and the total reset type according to the reset corresponding data in the memory circuit M, and executes an instruction set corresponding to any one of the light reset type, the medium reset type, the heavy reset type and the total reset type according to the instruction set, so as to perform different levels of reset operations, wherein the instruction set is one of a light reset instruction, a medium reset instruction, a heavy reset instruction and a total reset instruction.
Accordingly, when the control circuit C determines that the reset operation of the light reset type is required after analyzing the trigger signal, the control circuit C obtains and executes a light reset instruction corresponding to the light reset type, and accordingly, the control circuit C performs a partial reset on itself and controls the register of the reset type obtained from the trigger signal not to be reset, and the control circuit C controls a partial module reset, that is, a partial reset, included in the processor P, and the control circuit C does not control other electronic components E31 to E35 other than the processor P to perform a partial reset or restart; when the control circuit C determines that a reset operation of a moderate reset type is required after analyzing the trigger signal, the control circuit C obtains and executes a moderate reset instruction corresponding to the moderate reset type, so that the control circuit C partially resets itself and controls the register for storing the reset type obtained from the trigger signal not to be reset, the control circuit C controls a part of the modules included in the processor P to be reset, and the control circuit C controls other electronic components E31-E35 except the processor P to be restarted; when the control circuit C determines that the reset operation of the heavy reset type is required for the processor P and other electronic devices E31-E35 after analyzing the trigger signal, the control circuit C obtains and executes a heavy reset instruction corresponding to the heavy reset type, so that the control circuit C can partially reset itself and control the register of the reset type obtained from the trigger signal not to be reset, and the control circuit C controls all the modules included in the processor P to reset, i.e. restart the processor P, and controls other electronic devices E31-E35 except the processor P to restart; when the control circuit C determines that the reset operation of the total reset type is required for the processor P and the other electronic devices E31-E35 after analyzing the trigger signal, the control circuit C obtains and executes a total reset instruction corresponding to the total reset type, so that the control circuit C resets the register and controls the reset of all the modules included in the processor P, and the control circuit C controls the other electronic devices E31-E35 except the processor P to restart.
Furthermore, according to different types of reset operations, the control circuit C further records that the reset type obtained from the trigger signal is a mild reset type, a moderate reset type, a severe reset type, or a total reset type and the elements corresponding to the reset type when writing the reset record data, for example, the control circuit C itself, the processor P, and each of the electronic elements E31-E35, and the control circuit C records the element codes corresponding to the instruction set (i.e., the mild reset instruction, the moderate reset instruction, the severe reset instruction, or the total reset instruction) and the reset state executed by itself, the processor P, and the respective reset types of the electronic elements E31-E35 are restarted, partially reset, or not reset.
In some embodiments, the trigger signal sent by the processor P and one of the electronic devices E31-E35 may correspond to a reset operation of at least one electronic device of the electronic device 300 in the reset correspondence data. For example, when the electronic device E31 sends a trigger signal to the control circuit C due to the excessively high temperature, the control circuit C controls the electronic devices E33-E35 to restart based on the trigger signal of the electronic device E31 and the reset corresponding data, and writes the data corresponding to the reset electronic devices E33-E35 into the reset record data. In another embodiment, when the electronic device E32 sends a trigger signal to the control circuit C due to the too low voltage, the control circuit C controls the processor P and the partial circuits of the electronic devices E31, E32, E33 to reset based on the trigger signal of the electronic device E32 and the reset corresponding data, and writes the data corresponding to the reset processor P and the partial circuits of the electronic devices E31, E32, E33 into the reset record data.
Fig. 4 is a schematic diagram of an electronic device 400 according to an embodiment of the invention. The electronic device 400 includes a memory circuit M, a control circuit C, a processor P that can be controlled by the control circuit C to restart and partially reset one of them, an electronic element E41, and an electronic element E42. The processor P, the electronic element E41 and the electronic element E42 can send trigger signals to the control circuit C. The memory circuit M can store the reset corresponding data and the reset record data. The control circuit C may perform a reset operation according to the reset corresponding data of the memory circuit M, and may update the reset record data of the memory circuit M according to the register and based on the performed reset operation, wherein the control circuit C may update the reset type stored in the memory circuit M after obtaining the reset type from the trigger signal, so that after the control circuit C completes the reset operation, the control circuit C may determine the reset type according to the content stored in the register, and write the reset type determined according to the content stored in the register into the reset record data of the memory circuit M, for example, when the register stores the reset type, the control circuit may directly write the reset type stored in the register into the reset record data of the memory circuit M, and when the register does not store the reset type, determine the reset type corresponding to the reset operation as the total reset type, and write the corresponding data of the total reset type into the reset record data of the memory circuit M.
In some embodiments, the processor P may further perform an auxiliary operation corresponding to the performed reset operation based on the reset record data stored in the memory circuit M. Taking the example that the temperature of the electronic element E41 is too high, the electronic element E41 will send the fourth trigger signal to the control circuit C. The control circuit C receives the fourth trigger signal and reads the reset corresponding data stored in the memory circuit M. Then, the control circuit C resets the electronic device E41 according to the reset corresponding data and the fourth trigger signal. After the reset operation is completed, the control circuit C writes the data corresponding to the reset operation into the reset record data of the memory circuit M. In this case, after the processor P reads the reset record data, it is confirmed that the electronic component E41 has performed the reset operation corresponding to the excessive temperature, and the processor P may further increase the fan speed to further reduce the temperature of the electronic component E41, that is, adjust the fan speed to assist the reset operation corresponding to the excessive temperature. In other embodiments, the auxiliary operation performed by the processor P based on the reset record data may also be to adjust the power supply circuit to assist the reset operation corresponding to the voltage abnormality; or adjusting the setting parameters to assist the reset operation corresponding to the error message.
FIG. 5 is a flowchart 500 of a reset method of an electronic device according to an embodiment of the invention. The flow starts in step 501. In step 501, a first trigger signal is sent through a first electronic component of an electronic device. In step 502, a first trigger signal is received through a control circuit C of the electronic device, and a reset operation corresponding to the first trigger signal is performed according to the reset corresponding data. In step 503, the data corresponding to the reset operation is written into the reset record data through the control circuit C. The detailed execution of steps 501 to 503 is described in detail before and is not repeated here.
FIG. 6 is a flowchart 600 of a method for resetting an electronic device according to an embodiment of the invention. The flow starts in step 601. In step 601, a confirmation signal is periodically sent to a first electronic component of the electronic device through a second electronic component of the electronic device. In step 602, the second electronic device fails and stops sending the acknowledge signal. In step 603, a first trigger signal is sent through the first electronic component. In step 604, the control circuit C of the electronic device receives the first trigger signal and performs a reset operation corresponding to the first trigger signal according to the reset corresponding data. In step 605, the data corresponding to the reset operation is written into the reset record data through the control circuit C. The detailed execution of steps 601 to 605 is described in detail before and will not be repeated here.
In summary, according to the electronic device and the reset method of the electronic device provided by the embodiments of the present invention, the electronic device can perform the reset operation according to the reset corresponding data, and record the reset operation performed to the reset record data. Therefore, the state of the electronic device can be accurately grasped. When the electronic device is in an abnormal state, the electronic device can correctly execute corresponding reset operation according to the reset corresponding data; and the executed reset operation can be confirmed through the reset record data, so that the same reset operation is prevented from being repeatedly executed, and whether the executed reset operation is effective or not can be judged based on the current condition of the electronic device. Accordingly, the embodiment of the invention can effectively manage the electronic device and debug the electronic device.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, but rather by the appended claims.
Claims (10)
1. An electronic device, comprising:
a first electronic element for transmitting a first trigger signal;
a memory circuit for storing a reset corresponding data and a reset record data;
a processor coupled to the memory circuit; and
the control circuit is coupled with the first electronic element, the processor and the memory circuit and is used for receiving the first trigger signal so as to execute a reset operation corresponding to the first trigger signal according to the reset corresponding data, wherein the control circuit analyzes the first trigger signal to acquire the corresponding reset type from the first trigger signal as any one of a light reset instruction, a moderate reset instruction, a heavy reset instruction and a total reset instruction;
the light reset instruction is the control circuit part reset and the partial module reset of the processor, the moderate reset instruction is the control circuit part reset, the partial module reset of the processor and the first electronic element reset, the heavy reset instruction is the control circuit part reset, all module resets of the processor and the first electronic element reset, and the total reset instruction is the control circuit total reset, all module resets of the processor and the first electronic element reset;
the control circuit is further used for writing the data corresponding to the reset operation into the reset record data.
2. The electronic device of claim 1, further comprising a second electronic component coupled to the first electronic component, the second electronic component configured to periodically send a confirmation signal to the first electronic component;
when the second electronic element fails and stops sending the confirmation signal, the first electronic element sends the first trigger signal.
3. The electronic device of claim 1, wherein the reset operation causes all electronic components of the electronic device to perform a total reset operation.
4. The electronic device of claim 1, wherein at least one electronic component of the electronic device is reset when the control circuit performs the reset operation.
5. The electronic device of claim 1, wherein the processor is configured to read the reset log data and perform an auxiliary operation corresponding to the reset operation according to the reset log data.
6. A method for resetting an electronic device, comprising the steps of:
transmitting a first trigger signal through a first electronic component of the electronic device;
receiving the first trigger signal through a control circuit of the electronic device, and executing a reset operation corresponding to the first trigger signal according to a reset corresponding data;
the control circuit analyzes the first trigger signal to obtain the corresponding reset type from the first trigger signal as any one of a light reset instruction, a moderate reset instruction, a heavy reset instruction and a total reset instruction; and
writing the data corresponding to the reset operation into a reset record data through the control circuit;
the electronic device comprises a processor, wherein the mild reset instruction is a control circuit part reset and a part module reset of the processor, the moderate reset instruction is the control circuit part reset, the part module reset of the processor and the first electronic element reset, the severe reset instruction is the control circuit part reset, all module resets of the processor and the first electronic element reset, and the total reset instruction is the control circuit total reset, all module resets of the processor and the first electronic element reset.
7. The method for resetting an electronic device as recited in claim 6, further comprising the steps of:
periodically transmitting a confirmation signal to the first electronic device through a second electronic device of the electronic device;
when the second electronic element fails and stops sending the confirmation signal, the first trigger signal is sent through the first electronic element.
8. The method of claim 6, wherein the reset operation causes all electronic components of the electronic device to perform a total reset operation.
9. The method for resetting an electronic device as recited in claim 6, further comprising the steps of:
when the control circuit executes the reset operation, at least one electronic component of the electronic device is reset.
10. The method for resetting an electronic device as recited in claim 6, further comprising the steps of:
reading the reset record data through the processor; a kind of electronic device with high-pressure air-conditioning system
The processor executes an auxiliary operation corresponding to the reset operation according to the reset record data.
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| CN201910007701.0A CN111414272B (en) | 2019-01-04 | 2019-01-04 | Electronic device and reset method thereof |
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| CN201910007701.0A CN111414272B (en) | 2019-01-04 | 2019-01-04 | Electronic device and reset method thereof |
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| TWI635401B (en) * | 2017-09-11 | 2018-09-11 | 技嘉科技股份有限公司 | Arm-based server and managenent method thereof |
| CN108799176A (en) * | 2018-05-25 | 2018-11-13 | 环胜电子(深圳)有限公司 | fan control system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US9697014B2 (en) * | 2012-10-24 | 2017-07-04 | Htc Corporation | Electronic apparatus and method for determining a reset thereof |
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| CN1869997A (en) * | 1995-02-13 | 2006-11-29 | 英特特拉斯特技术公司 | Systems and methods for secure transaction management and electronic rights protection |
| TW201405303A (en) * | 2012-07-30 | 2014-02-01 | Hon Hai Prec Ind Co Ltd | System and method for monitoring baseboard management controller |
| TWI635401B (en) * | 2017-09-11 | 2018-09-11 | 技嘉科技股份有限公司 | Arm-based server and managenent method thereof |
| CN108799176A (en) * | 2018-05-25 | 2018-11-13 | 环胜电子(深圳)有限公司 | fan control system and method |
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