CN111400880A - Threshold type three-value memristor implementation method based on L Tpitch model - Google Patents
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Abstract
The invention discloses a method for realizing a threshold type three-value memristor based on an L Tpitch model, the theoretical basis of the method is a mathematical model of the three-value memristor, a L Tpitch model of the threshold type three-value memristor is designed based on the mathematical model, the characteristics of the model are simulated, and the correctness of the logic function of a circuit is verified by the simulation resultxAccording to the L Tscope model, a circuit structure corresponding to the model is obtained by combining circuit analysis, the circuit structure is composed of two controlled current sources and a capacitor, and the circuit structure is clear and simple and is easy to realize.
Description
Technical Field
The invention relates to a threshold type three-value memristor implementation method based on an L Tpitch model.
Background
Memristors are a new type of circuit element that was originally proposed theoretically in 1971 by professor zeiss of zeita based on the completeness and symmetry of the circuit. The memristor describes the relationship between magnetic flux and electric charge, and fills the gap of the relationship between four basic variables of the circuit. But because the current technological level can not meet the manufacturing requirements, the memristor can not be physically realized in a long period of time.
In 2008, a physical device of the memristor based on the nanotechnology is successfully manufactured in the HP laboratory, and the research heat of people on the memristor is triggered. As research continues, memristors have proven to play an important role in various fields, such as: nonvolatile memory, digital logic circuit, artificial neural network, chaotic circuit, etc.
Nowadays, the rapid development of integrated circuits has played a great role in promoting the arrival of the information-oriented era, but as the integration degree is continuously improved, the increase of interconnection lines in the integrated circuits brings a series of problems, such as heat dissipation, short channel effect, quantum mechanical effect, and the like. Therefore, it is necessary to develop a more efficient circuit design technique, and the multi-valued logic circuit, especially the three-valued logic circuit, can provide an effective solution for this. It is clear that the use of a ternary signal (0,1,2 or-1, 0,1) can improve the density of the integrated circuit and the ability to process information compared to binary.
Memristors may characterize a logic state by a resistance state instead of a level logic. Each resistance state can represent a logic state that can be theoretically used to store ternary information and perform ternary logic operations. The existing model related to the three-valued memristor does not have threshold characteristics, so that a stable and reliable memristive value cannot be obtained, a stable and reliable logic state cannot be obtained, and the model is difficult to use for storing three-valued information and carrying out three-valued logic operation. The threshold characteristic is that the resistance value changes only when the excitation voltage reaches the threshold voltage, otherwise the previous state is stably maintained. Therefore, it is necessary to design a three-value memristor model with threshold characteristics.
Disclosure of Invention
The invention aims to provide a threshold type three-value memristor implementation method based on an L Tpitch model aiming at the defects in the prior art, so as to solve the problem that the existing three-value memristor model does not have threshold characteristics.
The technical scheme adopted by the invention for solving the technical problem is as follows:
constructing a mathematical model of a threshold type three-value memristor:
wherein x is a system internal state variable,
is the first derivative of the variable x and represents the change in x. v (t) is the voltage across the memristor, i.e., the input voltage. i (t) is the current through the memristor, R (x) is the memristance of the memristor, where RL、RM、RHThree different stable memristances.
Giving a three-value memristor L Tpitch model comprising a controlled current source Gm、GxAnd with a controlled current source GxParallel 1F capacitor CxIn which a controlled current source GmOutput current iGmI.e. the output current of the three-valued memristor, is equal to that defined in the mathematical model
Controlled current source GxAnd a capacitor CxThe formed circuit obtains a system internal state variable x, and TE and BE are respectively arranged at two ends of a three-value memristor L Tscope model, wherein TE is a voltage input end and is connected with input voltage, and BE is a public end and is grounded.
The resistance characteristic of the three-value memristor L Tpitch model is realized based on the mathematical model and the designed three-value memristor L Tpitch model:
input voltage v (t)>When the pressure of the mixture is 1.2 times,
the value of x is increased to x>At 0.2, memristance R (x) ═ RL；
Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)>RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM；
Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)<RM，
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage-0.6<v(t)<At the time of 0.6, the temperature of the mixture,
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage-1.2<v(t)<When the resistance value R (x) is memorized at-0.6<RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM；
Input voltage-2<v(t)<When the resistance value R (x) is memorized at-0.6>RM，
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage v (t)<At the time of-1.2,
the value of x will be reduced to x<At-0.2, memristance R (x) ═ RH。
Controlled current source GmGenerated current
Therefore, the changed memristance R (x) in the model is represented as different current values under the same voltage, and the resistance characteristic of the three-value memristor L Tpitch model is represented.
The model conforms to the definition of the memristor, has obvious three-value characteristics and threshold characteristics, can stably show three different memristances, and if the excitation voltage does not reach the threshold voltage, the variable x is kept unchanged, and the memristance is also kept unchanged.
Drawings
In order to more clearly illustrate the technical solution of the prior art of the present invention, the drawings used in the description of the prior art will be briefly introduced below.
Fig. 1 is a circuit structure corresponding to a threshold type ternary memristor L Tspice model of the present invention.
Detailed Description
In order to make the technical field of the invention better understand, the L Tscope model of the invention is further described in detail with reference to the drawings and the detailed description.
The invention uses a mathematical model of a threshold type three-value memristor, the memristor model not only has three different stable memristive values, but also has good threshold characteristics, and can better meet the actual requirements of a three-value logic circuit, and the formula of the three-value memristor mathematical model used by the invention is shown as the following formula:
wherein x is a system internal state variable,
is the first derivative of the variable x and represents the change in x. The memristor model can be judged to be a voltage-controlled memristor according to the form of a formula. v (t) is the voltage across the memristor, i.e., the actuation voltage. i (t) is the current through the memristor, R (x) is the memristance of the memristor, where RL、RM、RHThree different stable memristances. The threshold characteristic of this model is characterized in that only when the excitation voltage V (t) reaches the threshold voltages + -0.6V and + -1.2V,
it is switched between different differential equations, under the influence of which the state variable x will eventually approach different values. And x is used for controlling the memristance R (x) of the memristor, so that the memristor model has threshold characteristics.
As shown in FIG. 1, Gm、GxAre all controlled current sources, wherein the current source GmOutput current iGmDefined in equivalent mathematical models
Namely, the output current of the memristor, TE and BE are respectively two ends of the memristor L Tpitch model, wherein TE is an input end and is connected with an input voltage, and BE is a public end and is grounded.
As shown in fig. 1, a current source GxAnd a capacitor CxThe circuit is constructed to obtain the internal state variable x of the system, the current source GxOutput current iGxNumerically equal to mathematicsDefined in the model
CxA capacitor of 1F for pair iGxThe integral operation is completed to obtain the value of the required system internal variable x, wherein x is the capacitor CxVoltage values at both ends:
consider the initial value, the value of the voltage across capacitor Cx:
v in the formulaC0Is the capacitor CxIs equal in value to an initial value x of x0。
With reference to the mathematical model and fig. 1, a specific process of state change inside the memristor model is introduced:
input voltage v (t)>When the pressure of the mixture is 1.2 times,
the value of x is increased to x>At 0.2, memristance R (x) ═ RL(ii) a Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)>RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM(ii) a Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)<RM，
x will remain unchanged and the memristance R (x) will remain unchanged; input voltage-0.6<v(t)<At the time of 0.6, the temperature of the mixture,
x will remain unchanged and the memristance R (x) willKeeping the same; input voltage-1.2<v(t)<When the resistance value R (x) is memorized at-0.6<RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM(ii) a Input voltage-2<v(t)<When the resistance value R (x) is memorized at-0.6>RM，
x will remain unchanged and the memristance R (x) will remain unchanged; input voltage v (t)<At the time of-1.2,
the value of x will be reduced to x<At-0.2, memristance R (x) ═ RH。
Referring to fig. 1, a controlled current source GmGenerated current
This makes the changed memristance R (x) inside the model show as different current values under the same voltage, thereby the characteristics of the model are reflected.
The above process just reflects the three-value characteristic and the threshold characteristic of the model, that is, the memristance can be changed only when the input voltage reaches a certain threshold range, and the memristance exists stably, and does not exist except for RL、RM、RHAny other value than the above may be applied to the study of the three-valued logic operation circuit.
It should be appreciated by those skilled in the art that the above embodiments are only used for verifying the present invention, and are not to be construed as limiting the present invention, and that the changes and modifications of the above examples are within the scope of the present invention.
Claims (1)
1. A threshold type three-value memristor implementation method based on L Tpitch model is characterized in that:
constructing a mathematical model of a threshold type three-value memristor:
wherein x is a system internal state variable,
is the first derivative of the variable x, indicating the change of x; v (t) is the voltage across the memristor, i.e., the input voltage; i (t) is the current through the memristor, R (x) is the memristance of the memristor, where RL、RM、RHThree different stable memristances;
giving a three-value memristor L Tpitch model comprising a controlled current source Gm、GxAnd with a controlled current source GxParallel 1F capacitor CxIn which a controlled current source GmOutput current iGmI.e. the output current of the three-valued memristor, is equal to that defined in the mathematical model
Controlled current source GxAnd a capacitor CxThe formed circuit obtains a system internal state variable x, and TE and BE are respectively arranged at two ends of a ternary memristor L Tscope model, wherein TE is a voltage input end and is connected with an input signal;
the resistance characteristic of the three-value memristor L Tpitch model is realized based on the mathematical model and the designed three-value memristor L Tpitch model:
input voltage v (t)>When the pressure of the mixture is 1.2 times,
the value of x is increased to x>At 0.2, memristance R (x) ═ RL；
Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)>RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM；
Input voltage 0.6<v(t)<1.2, if the memory resistance value R (x)<RM，
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage-0.6<v(t)<At the time of 0.6, the temperature of the mixture,
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage-1.2<v(t)<When the resistance value R (x) is memorized at-0.6<RM，
x will decrease to around 0, when-0.2<x<At 0.2, memristance R (x) ═ RM；
Input voltage-2<v(t)<When the resistance value R (x) is memorized at-0.6>RM，
x will remain unchanged and the memristance R (x) will remain unchanged;
input voltage v (t)<At the time of-1.2,
the value of x will be reduced to x<At-0.2, memristance R (x) ═ RH；
Controlled current source GmGenerated current
Therefore, the changed memristance R (x) in the model is represented as different current values under the same voltage, and the resistance characteristic of the three-value memristor L Tpitch model is represented.
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Cited By (6)
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| CN112803943A (en) * | 2020-12-31 | 2021-05-14 | 杭州电子科技大学 | Digital AND gate implementation method based on ternary memristor |
| CN112865786A (en) * | 2020-12-31 | 2021-05-28 | 杭州电子科技大学 | Digital NOT gate implementation method based on ternary memristor |
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| CN113098492A (en) * | 2021-03-26 | 2021-07-09 | 杭州电子科技大学 | Digital same or and exclusive OR gate implementation method based on ternary memristor cross array |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112803943A (en) * | 2020-12-31 | 2021-05-14 | 杭州电子科技大学 | Digital AND gate implementation method based on ternary memristor |
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| CN113098492A (en) * | 2021-03-26 | 2021-07-09 | 杭州电子科技大学 | Digital same or and exclusive OR gate implementation method based on ternary memristor cross array |
| CN113098492B (en) * | 2021-03-26 | 2022-07-26 | 杭州电子科技大学 | Digital same or and exclusive OR gate implementation method based on ternary memristor cross array |
| CN113505559A (en) * | 2021-08-05 | 2021-10-15 | 合肥工业大学智能制造技术研究院 | Three-value ideal universal voltage-controlled memristor circuit model |
| CN113505559B (en) * | 2021-08-05 | 2024-03-29 | 合肥工业大学智能制造技术研究院 | Three-value ideal universal voltage-controlled memristor circuit model |
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