CN111338698A - Method and system for accurately booting server by BIOS (basic input output System) - Google Patents
Method and system for accurately booting server by BIOS (basic input output System) Download PDFInfo
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Abstract
The invention relates to the technical field of servers, and provides a method and a system for accurately guiding a server to start by a BIOS (basic input output System), wherein the method comprises the following steps: the BIOS is electrified and started, and the self-checking and initialization stage is controlled to enter; monitoring the self-checking and initializing stages of the BIOS, and judging whether the self-checking and initializing stages of the BIOS are finished; during the monitoring and judging process of the BIOS in the self-checking and initialization stages, the BIOS controls to send the asset configuration information of the server to the BMC, and the asset configuration information of the server received by the BMC is temporarily stored in a pre-configured public memory; when the self-checking and initialization stages of the BIOS are judged to be completed, the asset configuration information is written into the EEPROM, so that the server is accurately and correctly booted, the execution of the BMC IPMI process is effectively guaranteed, and the problem of system restart caused by the fact that the BMC cannot respond to an external IPMI command and waits for overtime is avoided.
Description
Technical Field
The invention belongs to the technical field of servers, and particularly relates to a method and a system for accurately guiding a server to start by a BIOS (basic input output System).
Background
With the rapid development of the internet economy, the whole data center industry is impacted by the unprecedented growing trend of mass data, the stability and reliability of the server are particularly important, and various methods are adopted for testing and verifying each node of the server from a designer, a manufacturer to a client application end, so that the condition of the server is monitored, and the reliability of the data center is ensured.
The method comprises the steps that a Basic Input Output System (BIOS) is started, self-checking and initialization are carried out, the BIOS acquires asset information of various configurations such as a CPU, a Memory and a hard disk in a server, then the asset information is sent to a BMC through a Kernel Cache System (KCS) channel, after the asset information is received by the BMC, the asset information is written into an electronic Erasable-Erasable Programmable Read-Only Memory (EEPROM) to be stored, the BMC and the EEPROM are communicated through I2C, and the speed is slow. The BIOS starting flow code continues to execute, in the system starting stage, the BIOS sends an Intelligent Platform Management Interface (IPMI) command to the BMC, and under normal conditions, the BMC returns the completion code after receiving the IPMI command. At the moment, the BMC is still busy writing the EEPROM, the IPMI process is in a busy state, the IPMI instruction of the BIOS cannot be responded, the BIOS tries to send the IPMI command for multiple times, the IPMI command is sent for multiple times without returning, overtime is waited, watchdog is triggered, the system is restarted, and the system cannot be started.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a method for accurately guiding a server to start by a BIOS (basic input output System), aiming at solving the problem that when a BMC (baseboard management controller) is busy, a watchdog is easily triggered by an IPMI external command due to overtime, so that the system cannot be started and the online service is influenced in the prior art.
The technical scheme provided by the invention is as follows: a method for BIOS accurate boot server boot, the method comprising the steps of:
the BIOS is electrified and started, and the self-checking and initialization stage is controlled to enter;
monitoring the self-checking and initializing stages of the BIOS, and judging whether the self-checking and initializing stages of the BIOS are finished;
during the monitoring and judging process of the BIOS in the self-checking and initialization stages, the BIOS controls to send asset configuration information of a server to a BMC, and the asset configuration information of the server received by the BMC is temporarily stored in a pre-configured public memory;
and when the self-checking and initialization stages of the BIOS are judged to be completed, writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
As an improved scheme, before the step of the BIOS power-on start and control to enter the self-test and initialization stage, the following steps are further included:
and in the BMC, a public memory is configured in advance, and the public memory is used for temporarily storing the asset configuration information of the server.
As an improved scheme, the step of monitoring the self-test and initialization stages of the BIOS and determining whether the self-test and initialization stages of the BIOS are completed specifically includes the following steps:
when the BIOS enters the information of the self-checking and initialization stage, controlling a corresponding preset pin on the PCH chip to be set to be a high level, and sending a high level signal to the BMC;
the BMC detects and analyzes the high-level signal, acquires the information that the BIOS is in a self-checking state and an initialization state at present, controls the BIOS to be in a vacant state, and waits for and responds to an IPMI command of the BIOS;
when the information that the BIOS self-check and initialization stage are completed is acquired, controlling a corresponding preset pin on a PCH chip to be set to be a low level, and sending a low level signal to the BMC;
the BMC detects and analyzes the low level signal, acquires information of the BIOS which is finished in the self-checking and initialization stages at present, and executes the step of writing the asset configuration information of the server which is temporarily stored in the public memory into the EEPROM.
As an improvement, the method further comprises the steps of:
a special pin is arranged in a PCH chip in advance, and a communication channel is established between the special pin and the BMC.
As an improved scheme, the step of monitoring the self-test and initialization stages of the BIOS and determining whether the self-test and initialization stages of the BIOS are completed specifically includes the following steps:
when the BIOS enters the information of the self-checking and initialization stage, sending a command of the BIOS entering the self-checking and initialization stage to the BMC;
when the BMC receives a command of the BIOS entering a self-checking and initialization stage, controlling the BMC to be in an idle state, and waiting and responding to an IPMI command of the BIOS;
when the BIOS self-checking and initialization stage is completed, sending a command of completing the BIOS self-checking and initialization stage to the BMC;
and when the BMC receives a command of finishing the BIOS self-checking and initialization stages, executing the step of writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
It is another object of the present invention to provide a system for BIOS accurate boot server boot, the system comprising:
the self-checking initialization stage entering module is used for electrifying and starting the BIOS and controlling to enter a self-checking and initialization stage;
the monitoring and judging module is used for monitoring the self-checking and initializing stages of the BIOS and judging whether the self-checking and initializing stages of the BIOS are finished or not;
the asset configuration information sending module is used for controlling the asset configuration information of the server to be sent to the BMC in the monitoring and judging process of the BIOS in the self-checking and initialization stages;
the asset configuration information temporary storage module is used for temporarily storing the received asset configuration information of the server into a pre-configured public memory;
and the asset configuration information writing module is used for writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM when the self-test and initialization stages of the BIOS are judged to be completed.
As an improvement, the system further comprises:
and the public memory configuration module is used for configuring a public memory in advance in the BMC, and the public memory is used for temporarily storing the asset configuration information of the server.
As an improved scheme, the monitoring and determining module specifically includes:
the high level setting module is used for controlling a corresponding preset pin on the PCH chip to be set to be a high level when the BIOS enters the information of the self-checking and initialization stages;
the high-level signal sending module is used for sending a high-level signal to the BMC;
the high-level signal detection and analysis module is used for detecting and analyzing the high-level signal and acquiring the information that the BIOS is in a self-checking state and an initialization state at present;
the first vacant state control module is used for controlling the BMC to be in a vacant state, and waiting for and responding to the IPMI command of the BIOS;
the low level setting module is used for controlling a corresponding preset pin on the PCH chip to be set to be a low level when the information that the BIOS self-checking and initialization stages are completed is obtained;
the low-level signal sending module is used for sending a low-level signal to the BMC;
and the low level signal detection and analysis module is used for detecting and analyzing the low level signal, acquiring information of the current completion of the BIOS self-checking and initialization stages, and executing the step that the asset configuration information writing module writes the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
As an improvement, the system further comprises:
and the special pin setting module is used for setting a special pin in the PCH chip in advance and establishing a communication channel between the special pin and the BMC.
As an improved scheme, the monitoring and determining module specifically includes:
the command sending module for entering the self-checking and initialization stage is used for sending a command of the BIOS for entering the self-checking and initialization stage to the BMC when the BIOS enters the information of the self-checking and initialization stage;
the second vacant state control module is used for controlling the BMC to be in a vacant state when receiving a command of the BIOS entering a self-checking and initialization stage, and waiting for and responding to an IPMI command of the BIOS;
the self-checking and initialization stage completion command sending module is used for sending a command for completing the BIOS self-checking and initialization stage to the BMC when the BIOS self-checking and initialization stage is completed;
and when the BMC receives a command of finishing the BIOS self-checking and initialization stages, executing a step of writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM by the asset configuration information writing module.
In the embodiment of the invention, the BIOS is electrified and started, and the control enters a self-checking and initialization stage; monitoring the self-checking and initializing stages of the BIOS, and judging whether the self-checking and initializing stages of the BIOS are finished; during the monitoring and judging process of the BIOS in the self-checking and initialization stages, the BIOS controls to send asset configuration information of a server to a BMC, and the asset configuration information of the server received by the BMC is temporarily stored in a pre-configured public memory; when the self-checking and initialization stages of the BIOS are judged to be completed, the asset configuration information of the server temporarily stored in the public memory is written into an EEPROM, so that the server can be accurately and correctly guided to start, the execution of a BMC IPMI process is effectively guaranteed, and the problem of system restart caused by the fact that the BMC cannot respond to an external IPMI command and waits for overtime is solved.
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In order to more clearly illustrate the detailed description of the invention or the technical solutions in the prior art, the drawings that are needed in the detailed description of the invention or the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
FIG. 1 is a flow chart of an implementation of a method for BIOS accurate boot server boot provided by the present invention;
fig. 2 is a flowchart illustrating an implementation of monitoring the self-test and initialization stages of the BIOS and determining whether the self-test and initialization stages of the BIOS are completed according to the first embodiment of the present invention;
fig. 3 is a flowchart illustrating an implementation of monitoring the self-test and initialization stages of the BIOS and determining whether the self-test and initialization stages of the BIOS are completed according to a second embodiment of the present invention;
FIG. 4 is a block diagram of a system for BIOS accurate boot server boot provided by the present invention;
fig. 5 is a block diagram of a monitoring and determining module according to an embodiment of the present invention;
fig. 6 is a block diagram of a monitoring and determining module according to a second embodiment of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are merely for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
Fig. 1 is a flowchart of an implementation of the method for accurately booting a server by a BIOS according to the present invention, which specifically includes the following steps:
in step S101, the BIOS is powered on and started, and is controlled to enter a self-test and initialization stage;
in step S102, monitoring the self-test and initialization stages of the BIOS, and determining whether the self-test and initialization stages of the BIOS are completed;
in step S103, during the self-test and initialization stage monitoring and determining process of the BIOS, the BIOS controls to send asset configuration information of a server to the BMC, and the asset configuration information of the server received by the BMC is temporarily stored in a pre-configured public memory;
in step S104, when it is determined that the self-test and initialization phases of the BIOS are completed, the asset configuration information of the server temporarily stored in the public memory is written into an EEPROM.
When the self-checking and initialization stages of the BIOS are judged not to be completed, the monitoring and the judgment are continued.
In the embodiment, in the BIOS starting process, the BMC asset information is delayed to be written into the EEPROM by setting the judgment condition, so that the BMC IPMI process is guaranteed, and the problem of system restart caused by the fact that the BMC cannot respond to an external IPMI instruction and waits for overtime is avoided.
In the embodiment of the present invention, before executing the above step S101, the following steps need to be executed:
in the BMC, a public memory is configured in advance, and the public memory is used for temporarily storing the asset configuration information of the server, wherein the capacity of the public memory can be determined according to the actual asset configuration information of the server, and is not described herein again.
As an embodiment of the present invention, as shown in fig. 2, the step of monitoring the self-test and initialization stage of the BIOS and determining whether the self-test and initialization stage of the BIOS is completed specifically includes the following steps:
in step S201, when the BIOS enters information of a self-test and initialization stage, controlling a corresponding preset pin on the PCH chip to be set to a high level, and sending a high level signal to the BMC;
in step S202, the BMC detects and analyzes the high level signal, obtains information that the BIOS is currently in a self-test state and an initialization state, controls the BIOS to be in an idle state, and waits for and responds to an IPMI command of the BIOS;
in step S203, when the information that the BIOS self-test and initialization stage are completed is obtained, controlling a corresponding preset pin on the PCH chip to be set to a low level, and sending a low level signal to the BMC;
in step S204, the BMC detects and analyzes the low level signal, obtains information that the current BIOS self-check and initialization stages are completed, and executes the step of writing the asset configuration information of the server temporarily stored in the public memory into the EEPROM.
The following steps are also required to be executed before executing step S201:
a special pin is arranged in a PCH chip in advance, and a communication channel is established between the special pin and the BMC.
As another embodiment of the present invention, as shown in fig. 3, the step of monitoring the self-test and initialization stage of the BIOS and determining whether the self-test and initialization stage of the BIOS is completed specifically includes the following steps:
in step S301, when the BIOS enters the information of the self-test and initialization stage, a command for the BIOS to enter the self-test and initialization stage is sent to the BMC;
in step S302, when the BMC receives a command that the BIOS enters a self-checking and initialization stage, the BMC controls itself to be in an idle state, and waits for and responds to the IPMI command of the BIOS;
in step S303, when the BIOS self-test and initialization stage is completed, sending a command that the BIOS self-test and initialization stage is completed to the BMC;
in step S304, when the BMC receives the command that the BIOS self-test and initialization phase are completed, the step of writing the asset configuration information of the server temporarily stored in the public memory into the EEPROM is performed.
Two implementation schemes for monitoring the self-checking and initialization stages of the BIOS are given above, and other manners may be adopted, which are not described herein again.
Fig. 4 illustrates a system for accurate boot server boot of BIOS provided by the present invention, and for convenience of explanation, only the relevant portions of the embodiment of the present invention are shown.
The system for starting the BIOS accurate boot server comprises:
a self-test initialization stage entering module 11, configured to power on and start the BIOS, and control to enter a self-test and initialization stage;
a monitoring and judging module 12, configured to monitor the self-test and initialization stages of the BIOS and judge whether the self-test and initialization stages of the BIOS are completed;
the asset configuration information sending module 13 is used for controlling the asset configuration information of the server to be sent to the BMC in the monitoring and judging process of the BIOS in the self-checking and initialization stages;
the asset configuration information temporary storage module 14 is configured to temporarily store the received asset configuration information of the server into a pre-configured public memory;
and an asset configuration information writing module 15, configured to write the asset configuration information of the server temporarily stored in the public memory into an EEPROM when it is determined that the self-test and initialization stages of the BIOS are completed.
In this embodiment, the system further comprises:
and a public memory configuration module 16, configured to pre-configure a public memory in the BMC, where the public memory is used to temporarily store the asset configuration information of the server.
As an embodiment of the present invention, as shown in fig. 5, the monitoring and determining module 12 specifically includes:
a high level setting module 17, configured to control a corresponding preset pin on the PCH chip to be set to a high level when the BIOS enters the information of the self-checking and initialization stage;
a high level signal sending module 18, configured to send a high level signal to the BMC;
the high-level signal detection and analysis module 19 is configured to detect and analyze the high-level signal, and obtain information that the BIOS is currently in a self-test state and an initialization state;
a first idle state control module 20, configured to control the BMC to be in an idle state, and wait for and respond to the IPMI command of the BIOS;
a low level setting module 21, configured to control a corresponding preset pin on the PCH chip to be set to a low level when information that the BIOS self-test and initialization stage are completed is obtained;
a low level signal sending module 22, configured to send a low level signal to the BMC;
and a low level signal detecting and analyzing module 23, configured to detect and analyze the low level signal, obtain information that the current BIOS self-test and initialization stages are completed, and execute the step in which the asset configuration information writing module 15 writes the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
In this embodiment, the system further comprises:
the dedicated pin setting module 24 is configured to set a dedicated pin in the PCH chip in advance, and establish a communication channel between the dedicated pin and the BMC.
As another embodiment of the present invention, as shown in fig. 6, the monitoring and determining module 12 specifically includes:
a self-test and initialization stage entering command sending module 25, configured to send a command of the BIOS entering the self-test and initialization stage to the BMC when the BIOS enters the information of the self-test and initialization stage;
the second idle state control module 26 is configured to control the BMC to be in an idle state when receiving a command that the BIOS enters a self-checking and initialization stage, and wait for and respond to an IPMI command of the BIOS;
a self-checking and initialization stage completion command sending module 27, configured to send a command for completing the BIOS self-checking and initialization stage to the BMC when the BIOS self-checking and initialization stage is completed;
and when the BMC receives a command of finishing the BIOS self-checking and initialization stages, executing a step of writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM by the asset configuration information writing module.
The functions of the modules are described in the above embodiments, and are not described herein again.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention, and they should be construed as being included in the following claims and description.
Claims (10)
1. A method for BIOS accurate boot server boot, the method comprising the steps of:
the BIOS is electrified and started, and the self-checking and initialization stage is controlled to enter;
monitoring the self-checking and initializing stages of the BIOS, and judging whether the self-checking and initializing stages of the BIOS are finished;
during the monitoring and judging process of the BIOS in the self-checking and initialization stages, the BIOS controls to send asset configuration information of a server to a BMC, and the asset configuration information of the server received by the BMC is temporarily stored in a pre-configured public memory;
and when the self-checking and initialization stages of the BIOS are judged to be completed, writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
2. The method of claim 1, wherein the step of the BIOS power-on startup and control to enter the self-test and initialization phase further comprises the steps of:
and in the BMC, a public memory is configured in advance, and the public memory is used for temporarily storing the asset configuration information of the server.
3. The method according to claim 2, wherein the step of monitoring the self-test and initialization phases of the BIOS and determining whether the self-test and initialization phases of the BIOS are completed specifically comprises the steps of:
when the BIOS enters the information of the self-checking and initialization stage, controlling a corresponding preset pin on the PCH chip to be set to be a high level, and sending a high level signal to the BMC;
the BMC detects and analyzes the high-level signal, acquires the information that the BIOS is in a self-checking state and an initialization state at present, controls the BIOS to be in a vacant state, and waits for and responds to an IPMI command of the BIOS;
when the information that the BIOS self-check and initialization stage are completed is acquired, controlling a corresponding preset pin on a PCH chip to be set to be a low level, and sending a low level signal to the BMC;
the BMC detects and analyzes the low level signal, acquires information of the BIOS which is finished in the self-checking and initialization stages at present, and executes the step of writing the asset configuration information of the server which is temporarily stored in the public memory into the EEPROM.
4. The method for BIOS accurate boot server boot-up according to claim 3, further comprising the steps of:
a special pin is arranged in a PCH chip in advance, and a communication channel is established between the special pin and the BMC.
5. The method according to claim 2, wherein the step of monitoring the self-test and initialization phases of the BIOS and determining whether the self-test and initialization phases of the BIOS are completed specifically comprises the steps of:
when the BIOS enters the information of the self-checking and initialization stage, sending a command of the BIOS entering the self-checking and initialization stage to the BMC;
when the BMC receives a command of the BIOS entering a self-checking and initialization stage, controlling the BMC to be in an idle state, and waiting and responding to an IPMI command of the BIOS;
when the BIOS self-checking and initialization stage is completed, sending a command of completing the BIOS self-checking and initialization stage to the BMC;
and when the BMC receives a command of finishing the BIOS self-checking and initialization stages, executing the step of writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
6. A system for BIOS accurate boot server boot, the system comprising:
the self-checking initialization stage entering module is used for electrifying and starting the BIOS and controlling to enter a self-checking and initialization stage;
the monitoring and judging module is used for monitoring the self-checking and initializing stages of the BIOS and judging whether the self-checking and initializing stages of the BIOS are finished or not;
the asset configuration information sending module is used for controlling the asset configuration information of the server to be sent to the BMC in the monitoring and judging process of the BIOS in the self-checking and initialization stages;
the asset configuration information temporary storage module is used for temporarily storing the received asset configuration information of the server into a pre-configured public memory;
and the asset configuration information writing module is used for writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM when the self-test and initialization stages of the BIOS are judged to be completed.
7. The BIOS accurate boot server boot system of claim 6, further comprising:
and the public memory configuration module is used for configuring a public memory in advance in the BMC, and the public memory is used for temporarily storing the asset configuration information of the server.
8. The BIOS accurate boot server startup system of claim 7, wherein the monitoring and determining module specifically comprises:
the high level setting module is used for controlling a corresponding preset pin on the PCH chip to be set to be a high level when the BIOS enters the information of the self-checking and initialization stages;
the high-level signal sending module is used for sending a high-level signal to the BMC;
the high-level signal detection and analysis module is used for detecting and analyzing the high-level signal and acquiring the information that the BIOS is in a self-checking state and an initialization state at present;
the first vacant state control module is used for controlling the BMC to be in a vacant state, and waiting for and responding to the IPMI command of the BIOS;
the low level setting module is used for controlling a corresponding preset pin on the PCH chip to be set to be a low level when the information that the BIOS self-checking and initialization stages are completed is obtained;
the low-level signal sending module is used for sending a low-level signal to the BMC;
and the low level signal detection and analysis module is used for detecting and analyzing the low level signal, acquiring information of the current completion of the BIOS self-checking and initialization stages, and executing the step that the asset configuration information writing module writes the asset configuration information of the server temporarily stored in the public memory into an EEPROM.
9. The BIOS accurate boot server boot system of claim 8, further comprising:
and the special pin setting module is used for setting a special pin in the PCH chip in advance and establishing a communication channel between the special pin and the BMC.
10. The BIOS accurate boot server startup system of claim 7, wherein the monitoring and determining module specifically comprises:
the command sending module for entering the self-checking and initialization stage is used for sending a command of the BIOS for entering the self-checking and initialization stage to the BMC when the BIOS enters the information of the self-checking and initialization stage;
the second vacant state control module is used for controlling the BMC to be in a vacant state when receiving a command of the BIOS entering a self-checking and initialization stage, and waiting for and responding to an IPMI command of the BIOS;
the self-checking and initialization stage completion command sending module is used for sending a command for completing the BIOS self-checking and initialization stage to the BMC when the BIOS self-checking and initialization stage is completed;
and when the BMC receives a command of finishing the BIOS self-checking and initialization stages, executing a step of writing the asset configuration information of the server temporarily stored in the public memory into an EEPROM by the asset configuration information writing module.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112667545A (en) * | 2020-12-28 | 2021-04-16 | 苏州浪潮智能科技有限公司 | Server asset information query management method |
| CN113010217A (en) * | 2021-03-18 | 2021-06-22 | 山东英信计算机技术有限公司 | BIOS parameter setting method and device, electronic equipment and storage medium |
| CN114328313A (en) * | 2021-12-31 | 2022-04-12 | 联想长风科技(北京)有限公司 | Information transmission method and system |
| CN114428963A (en) * | 2022-04-06 | 2022-05-03 | 浪潮(山东)计算机科技有限公司 | Server starting method, device, equipment and storage medium |
-
2020
- 2020-02-23 CN CN202010110088.8A patent/CN111338698A/en not_active Withdrawn
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112667545A (en) * | 2020-12-28 | 2021-04-16 | 苏州浪潮智能科技有限公司 | Server asset information query management method |
| CN113010217A (en) * | 2021-03-18 | 2021-06-22 | 山东英信计算机技术有限公司 | BIOS parameter setting method and device, electronic equipment and storage medium |
| CN113010217B (en) * | 2021-03-18 | 2023-04-07 | 山东英信计算机技术有限公司 | BIOS parameter setting method and device, electronic equipment and storage medium |
| CN114328313A (en) * | 2021-12-31 | 2022-04-12 | 联想长风科技(北京)有限公司 | Information transmission method and system |
| CN114428963A (en) * | 2022-04-06 | 2022-05-03 | 浪潮(山东)计算机科技有限公司 | Server starting method, device, equipment and storage medium |
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