CN115221092A

CN115221092A - Method, device and equipment for determining distributable bus of PCI-E card and storage medium

Info

Publication number: CN115221092A
Application number: CN202210867023.7A
Authority: CN
Inventors: 庄秋彬; 孙路遥
Original assignee: Shenzhen Xingyun Zhilian Technology Co ltd
Current assignee: Shenzhen Xingyun Zhilian Technology Co ltd
Priority date: 2022-07-22
Filing date: 2022-07-22
Publication date: 2022-10-21

Abstract

The application discloses a method, a device, equipment and a storage medium for determining a distributable bus of a PCI-E card, which are applied to the PCI-E card, relate to the technical field of computers and comprise the following steps: starting a server and determining the number of currently allocated bus numbers of PCI-E equipment connected in the current topological state; enumerating the PCI-E equipment through a basic input and output system, and then judging whether the PCI-E equipment is successfully enumerated; if the enumeration of the PCI-E equipment is successful, distributing a new bus number for the PCI-E equipment, and skipping to the starting server again and determining the number of the currently distributed bus numbers of the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the distributable bus numbers of the PCI-E card. By the technical scheme, the bus specification capability of the PCI-E card automatic detection system is supported, and further adaptation adjustment is facilitated.

Description

Method, device and equipment for determining distributable bus of PCI-E card and storage medium

Technical Field

The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a storage medium for determining a bus to which a PCI-E card can be allocated.

Background

PCI Express, PCI-E for short, is an important branch of computer bus, where a large number of devices use PCI-E to access a computer, and a single PCI-E card can be accessed to be presented as one device, such as a single network card and a video card. With the development of the technology, functions on a single PCI-E physical card are gradually enriched, and a multi-stage device can be simulated on the PCI-E card by using an ASIC (Application Specific Integrated Circuit)/FPGA (Field-Programmable Gate Array) or a software-hardware cooperation mode, the simulated device also supports addition and deletion in the operation process as required, and the device type and the whole bus topology are complex. As shown in FIG. 1, which is a PCI-E topology architecture diagram, the architecture of the PCI-E bus can be visualized as: a plurality of sets of point-to-point interconnected components. There are probably these compositions: root Complex (RC), a plurality of Endpoint (PCI-E devices), switch and PCI-E to PCI/PCI-X Bridge, and the bus among all the members is PCI Express. As shown in fig. 2, the internal structure diagram of the PCI-E Switch, the PCI-E devices of the whole computer are organized into a tree structure through the Switch expansion, and it can be seen from the diagram that the Switch expands the PCI-E ports, where the port near RC is called an upstream port (upstream port) and the other ports that are separated are called downstream ports (downstream ports). One Switch only has one upstream port and can expand a plurality of downstream ports; the downstream port can be directly connected with the Endpoint, and also can be connected with the Switch to expand more PCI-E ports. That is, a physical network card is on the surface, and after a server is inserted, through a certain configuration, the server side can consider that a plurality of network cards are inserted into the PCI-E slot, just as a switch is inserted into the slot, the switch connects a plurality of devices or expands a first-level switch, and each device has a plurality of functions.

After the PCI-E card simulates a multi-level switch and a plurality of complex endipoint, if a host (server) is restarted, a bios (Basic Input Output System) enumerates all the endipoint that have been created in the process of restarting, and a bus is allocated to the bios. Generally, an upstream of a switch needs 1 bus number, a down stream needs 1 bus number, and each down stream also reserves at least one bus number for a device to be accessed from the lower side. That is, a switch of 1 downstream needs a slot to support 3 bus numbers, and a switch of 32 downstreams needs a slot to support 34 bus numbers. However, for a specific server, due to hardware implementation limitation, the number of available bus numbers in a certain slot is limited, and when the number of bus numbers cannot meet the requirement of an access card, bios cannot be started. Therefore, for a particular slot to have maximum capability, it is desirable to be able to detect the range of bus numbers that the slot can support. The scheme which can be realized at present is to consult the hardware design and software scheme of the host to obtain the knowledge range, or to look at the information such as topology and the like on the host system to deduce. However, there are problems that it is not easy to refer, hardware design data is not necessarily available because software bios is closed source, and host system needs to be operated.

Therefore, how to detect the bus specification capability of the current slot from the device side without operating the host system is a problem to be solved at present.

Disclosure of Invention

In view of the above, an object of the present invention is to provide a method, an apparatus, a device and a storage medium for determining a bus assignable to a PCI-E card, which can detect a bus specification capability of a current slot from a device side without operating a host system, and facilitate adaptation according to actual situations. The specific scheme is as follows:

in a first aspect, the present application discloses a method for determining a distributable bus of a PCI-E card, which is applied to the PCI-E card, and includes:

starting a server and determining the number of currently allocated bus numbers of PCI-E equipment connected in the current topological state;

enumerating the PCI-E equipment through a basic input and output system, and then judging whether the PCI-E equipment is successfully enumerated;

if the enumeration of the PCI-E equipment is successful, distributing a new bus number for the PCI-E equipment, and skipping to the starting server again and determining the number of the current bus numbers distributed by the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the currently distributed bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the distributable bus numbers of the PCI-E card.

Optionally, the determining whether enumeration of the PCI-E device is successful includes:

if the server is not abnormal due to the number of the currently allocated bus numbers in the process of starting the server, judging that the enumeration of the PCI-E equipment is successful;

and if the server is abnormal due to the number of the currently allocated bus numbers in the process of starting the server, judging that the enumeration of the PCI-E equipment fails.

Optionally, if the enumeration of the PCI-E device is successful, allocating a new bus number to the PCI-E device includes:

and if the PCI-E equipment is enumerated successfully, executing a command used for detecting the number of the currently allocated buses in the PCI-E card Option ROM so as to allocate new buses for the PCI-E equipment. Optionally, the skipping again to the step of determining the number of currently allocated bus numbers until the PCI-E device fails in enumeration further includes:

and restarting the server by using the Option ROM, and completing the restart of the server after monitoring that the server is normally started.

Optionally, if the enumeration of the PCI-E device is successful, allocating a new bus number to the PCI-E card includes:

and if the PCI-E equipment is successfully enumerated, acquiring a signal which is sent by the Option ROM and used for successfully enumerating the PCI-E equipment, and distributing a new bus number for the PCI-E card.

Optionally, each PCI-E device is assigned a bus number.

In a second aspect, the present application discloses a bus determining apparatus that a PCI-E card can be distributed, which is applied to the PCI-E card, and includes:

the current distributed bus number determining module is used for starting the server and determining the current distributed bus number of the PCI-E equipment connected in the current topological state;

a device enumeration module, configured to start the server, enumerate the PCI-E device connected in the current topology state through a basic input/output system, and then determine whether the PCI-E device is successfully enumerated;

and the distributable bus number determining module is used for allocating a new bus number to the PCI-E device if the enumeration of the PCI-E device is successful, skipping to the starting server again and determining the number of the current bus numbers allocated to the PCI-E device connected in the current topological state until the enumeration of the PCI-E device fails, and determining the number of the currently allocated bus numbers corresponding to the last successful enumeration of the PCI-E device as the number of the distributable bus numbers of the PCI-E card.

Optionally, the assignable bus number determining module is configured to, if enumeration of the PCI-E device is successful, execute a command in the PCI-E card Option ROM for detecting the number of currently assigned bus numbers, so as to assign a new bus number to the PCI-E device.

In a third aspect, the present application discloses an electronic device comprising a processor and a memory; wherein the memory is used for storing a computer program which is loaded and executed by the processor to realize the PCI-E card allocable bus determination method.

In a fourth aspect, the present application discloses a computer readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the PCI-E card assignable bus determination method as described above.

The method is applied to the PCI-E card, the server is started, and the number of the currently allocated bus numbers of the PCI-E equipment connected in the current topological state is determined; enumerating the PCI-E equipment through a basic input and output system, and then judging whether the PCI-E equipment is successfully enumerated; if the PCI-E device is successfully enumerated, distributing a new bus number for the PCI-E device, and skipping to the starting server again and determining the current bus number distributed by the PCI-E device connected in the current topological state until the PCI-E device is unsuccessfully enumerated, and determining the current bus number corresponding to the last time that the PCI-E device is successfully enumerated as the distributable bus number of the PCI-E card. Therefore, the bus number specification of the current slot can be detected from the PCI-E equipment side under the condition of not operating the server system, and the adaptation can be conveniently carried out according to the actual condition. On the basis, functions such as self-adaptation can be further developed.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 is a schematic diagram of a PCI-E topology disclosed herein;

FIG. 2 is a schematic diagram of an internal structure of a PCI-E Switch according to the present disclosure;

FIG. 3 is a flow chart of a method for determining a bus assignable to a PCI-E card according to the present disclosure;

FIG. 4 is a flowchart of a specific PCI-E card assignable bus determination method disclosed herein;

FIG. 5 is a schematic structural diagram of a bus determination apparatus for PCI-E card distribution according to the present disclosure;

fig. 6 is a block diagram of an electronic device disclosed in the present application.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Currently, for a particular slot to be able to perform the most, it is necessary to be able to detect the range of bus numbers that the slot can support. The scheme which can be realized at present refers to the hardware design and software scheme of host to obtain the knowledge range, or refers to the information such as topology and the like on the host system to deduce. However, there are problems that it is not easy to refer, hardware design data is not necessarily available, because software bios is closed source, and a host system needs to be operated.

Therefore, the bus specification capability of the current slot can be detected from the equipment side under the condition that a host system is not operated, and adaptation can be conveniently carried out according to the actual condition.

The embodiment of the invention discloses a bus determining method for PCI-E card distributable, which is applied to the PCI-E card and shown in figure 3, and comprises the following steps:

step S11: the server is started and the current number of allocated buses of the PCI-E devices connected in the current topology state is determined.

In the embodiment of the application, in order to detect the bus number capability that the system can provide, the simulation state of the PCI-E card is changed for a plurality of times, that is, an initial number of bus numbers is first specified, the number of bus numbers is used as the number of currently allocated bus numbers, the number of currently allocated bus numbers corresponds to a simulated topology state, and the topology state indicates that complete enumeration is successful and the number of currently allocated bus numbers needs to be obtained from the server.

Step S12: enumerating the PCI-E device through a basic input and output system, and then judging whether the PCI-E device is successfully enumerated.

In the embodiment of the application, the server is started, and whether the system supports the bus number specification is identified according to whether the enumeration stage can be completed or not through the enumeration stage of the basic input/output system. It can be understood that, for a specific server, due to hardware implementation limitation, the number of available bus numbers of a certain slot is limited, and when the number of bus numbers cannot meet the requirement of an access card, the basic input/output system may not be started. That is, when the number of the buses exceeds the system support range, the buses may be stuck or fall into an exception such as a cycle restart. Therefore, the determining whether the enumeration of the PCI-E device is successful includes: if the server is not abnormal due to the number of the currently allocated bus numbers in the process of starting the server, judging that the enumeration of the PCI-E equipment is successful; and if the server is abnormal due to the number of the currently allocated bus numbers in the process of starting the server, judging that the enumeration of the PCI-E equipment fails.

It should be noted that, in this embodiment of the present application, each PCI-E device is allocated with a bus number, so that when enumerating the PCI-E device, only the bus number that was enumerated last time is read from the PCI-E card, which is the bus number specification capability of the system.

Step S13: if the enumeration of the PCI-E equipment is successful, distributing a new bus number for the PCI-E equipment, and skipping to the starting server again and determining the number of the current bus numbers distributed by the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the distributable bus numbers of the PCI-E card.

In the embodiment of the application, if the PCI-E device can successfully enumerate the currently allocated bus number, it indicates that the currently allocated bus number is valid in the current simulation state and does not exceed the bus number specification capability of the system, at this time, a new bus number is allocated to the PCI-E device, the number of the next secondary simulation bus number is set, then the server is restarted, and enumeration is performed again until the PCI-E device is unsuccessfully enumerated, and the corresponding currently allocated bus number is the number of the assignable bus numbers of the PCI-E card when the last enumeration is successful.

It will be appreciated that when allocating a new bus number to a PCI-E device, the number of bus numbers may be changed by incrementing or decrementing, for example, by incrementing the number of bus numbers from small to large, and if the number of currently allocated bus numbers is n, then the next allocated number of bus numbers may be simulated as n +1 when allocating the new bus number. If the number of the bus numbers is changed from large to small, or other sequences, the purpose can be achieved as long as the number is converged to a value finally.

The method is applied to the PCI-E card, a server is started, and the number of the currently allocated bus numbers of the PCI-E equipment connected in the current topological state is determined; enumerating the PCI-E equipment through a basic input and output system, and then judging whether the enumeration of the PCI-E equipment is successful; if the PCI-E device is successfully enumerated, distributing a new bus number for the PCI-E device, and skipping to the starting server again and determining the current bus number distributed by the PCI-E device connected in the current topological state until the PCI-E device is unsuccessfully enumerated, and determining the current bus number corresponding to the last time that the PCI-E device is successfully enumerated as the distributable bus number of the PCI-E card. Therefore, the bus number specification of the current slot can be detected from the PCI-E equipment side under the condition of not operating the server system, and the adaptation can be conveniently carried out according to the actual condition. On the basis, functions such as self-adaptation can be further developed.

The embodiment of the application discloses a specific PCI-E card assignable bus determination method, which is applied to a PCI-E card and is shown in figure 4, and the method comprises the following steps:

step S21: the server is started and the number of currently assigned bus numbers of the connected PCI-E devices in the current topology state is determined.

Step S22: enumerating the PCI-E device through a basic input and output system, and then judging whether the enumeration of the PCI-E device is successful.

For more specific processing procedures of the step S21 and the step S22, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.

Step S23: if the enumeration of the PCI-E equipment is successful, executing a command for detecting the number of the currently allocated bus numbers in the PCI-E card Option ROM so as to allocate new bus numbers to the PCI-E equipment, and jumping to the starting server again and determining the number of the current bus numbers allocated to the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the allocable bus numbers of the PCI-E card.

In this embodiment of the present application, if the PCI-E device is successfully enumerated, which indicates that the number of currently allocated bus numbers is valid in the current simulation state, a command for detecting the number of currently allocated bus numbers in the PCI-E card Option ROM is further executed. That is, the Option ROM notifies the PCI-E card that enumeration is successful, so that a signal that the PCI-E device sent by the Option ROM successfully enumerates is obtained, if the signal that the PCI-E device sent by the Option ROM successfully enumerates is obtained, it indicates that the simulated topology state of the current device is normal, and the bus number consumed by the current simulated topology state is within the allowable range of the server slot, and then a new bus number is allocated to the PCI-E device.

In the embodiment of the application, after a new bus number is allocated to the PCI-E device, the Option ROM informs the device to generate a new simulated topology state, prepares to continuously detect the number of bus numbers in the next simulated topology state, then restarts the server by using the Option ROM, and completes the restart of the server after monitoring that the server is normally started. It can be understood that, if the Option ROM is not used, the server may be restarted by a mode including manual control instead, and the restarting is completed after the server is judged to be normally started.

In addition, in the embodiment of the application, the Option ROM informs the PCI-E card that the enumeration is successful, and the bus number range is valid. If the PCI-E is not used, the notification may be performed by other methods, such as sending a command manually, or the transmission of a PCI-E packet (e.g., presenting a network card, detecting a packet related to network service transmission) detected by the PCI-E card outside enumeration may be automatically determined. And is not particularly limited herein.

The method is applied to the PCI-E card, a server is started, and the number of the currently allocated bus numbers of the PCI-E equipment connected in the current topological state is determined; enumerating the PCI-E equipment through a basic input and output system, and then judging whether the enumeration of the PCI-E equipment is successful; if the enumeration of the PCI-E equipment is successful, executing a command for detecting the number of the currently allocated bus numbers in the PCI-E card Option ROM so as to allocate new bus numbers to the PCI-E equipment, and jumping to the starting server again and determining the number of the current bus numbers allocated to the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the allocable bus numbers of the PCI-E card. Therefore, the bus number specification of the current slot can be detected from the PCI-E equipment side under the condition of not operating the server system, and the adaptation can be conveniently carried out according to the actual condition. On the basis, functions such as self-adaptation can be further developed.

Correspondingly, an embodiment of the present application further discloses a device for determining a bus to which a PCI-E card can be assigned, and as shown in fig. 5, the device includes:

a current allocated bus number determining module 11, configured to start a server and determine the current allocated bus number of the PCI-E device connected in the current topology state;

a device enumeration module 12, configured to enumerate the PCI-E device through a basic input/output system, and then determine whether the PCI-E device is successfully enumerated;

an allocable bus number determining module 13, configured to, if the PCI-E device is successfully enumerated, allocate a new bus number to the PCI-E device, and jump to the boot server again and determine the number of current bus numbers allocated to the PCI-E device connected in the current topology state until the PCI-E device is unsuccessfully enumerated, and determine the number of currently allocated bus numbers corresponding to the PCI-E device that is successfully enumerated for the last time as the number of allocable bus numbers of the PCI-E card.

For more specific working processes of the modules, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.

Therefore, the scheme of the embodiment is applied to the PCI-E card, the server is started, and the number of the currently allocated bus numbers of the PCI-E equipment connected in the current topological state is determined; enumerating the PCI-E equipment through a basic input and output system, and then judging whether the enumeration of the PCI-E equipment is successful; if the enumeration of the PCI-E equipment is successful, distributing a new bus number for the PCI-E equipment, and skipping to the starting server again and determining the number of the current bus numbers distributed by the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the distributable bus numbers of the PCI-E card. Therefore, the bus number specification of the current slot can be detected from the PCI-E equipment side under the condition of not operating the server system, and the adaptation can be conveniently carried out according to the actual condition. On the basis, functions such as self-adaptation can be further developed.

In a specific embodiment, the device enumeration module 12 includes:

an enumeration success determining module, configured to determine that enumeration of the PCI-E device is successful if the number of the currently allocated bus numbers does not cause an exception to occur to the server in a process of starting the server;

an enumeration failure determination module, configured to determine that enumeration of the PCI-E device fails if the server is abnormal due to the number of the currently allocated bus numbers in a process of starting the server.

In a specific embodiment, the assignable bus number determining module 13 includes:

and the Option ROM command execution module is used for executing a command used for detecting the number of the currently allocated bus numbers in the PCI-E card Option ROM so as to allocate new bus numbers to the PCI-E device if the enumeration of the PCI-E device is successful.

In a specific embodiment, the assignable bus number determining module 13 further includes:

and the server restarting unit is used for restarting the server by using the Option ROM, and completing the restarting of the server after the server is monitored to be normally started.

and the distributable bus number determining unit is used for acquiring a signal which is sent by the Option ROM and used for successfully enumerating the PCI-E device and distributing a new bus number for the PCI-E card if the PCI-E device is successfully enumerated.

Further, an electronic device is disclosed in the embodiments of the present application, and fig. 6 is a block diagram of an electronic device 20 according to an exemplary embodiment, which should not be construed as limiting the scope of the application.

Fig. 6 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present disclosure. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input output interface 25, and a communication bus 26. The memory 22 is used for storing a computer program, and the computer program is loaded and executed by the processor 21 to implement relevant steps in the PCI-E card assignable bus determining method disclosed in any of the foregoing embodiments. In addition, the electronic device 20 in the present embodiment may be a computer.

In this embodiment, the power supply 23 is configured to provide a working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and an external device, and a communication protocol followed by the communication interface is any communication protocol applicable to the technical solution of the present application, and is not specifically limited herein; the input/output interface 25 is configured to obtain external input data or output data to the outside, and a specific interface type thereof may be selected according to specific application requirements, which is not specifically limited herein.

In addition, the memory 22 is used as a carrier for storing resources, and may be a read-only memory, a random access memory, a magnetic disk, an optical disk, or the like, the resources stored thereon may include an operating system 221, a computer program 222, data 223, and the like, and the data 223 may include various data. The storage means may be a transient storage or a permanent storage.

The operating system 221 is used for managing and controlling each hardware device on the electronic device 20 and the computer program 222, and may be Windows Server, netware, unix, linux, or the like. The computer program 222 may further include a computer program that can be used to perform other specific tasks in addition to the computer program that can be used to perform the PCI-E card assignable bus determination method disclosed in any of the foregoing embodiments and executed by the electronic apparatus 20.

Further, embodiments of the present application disclose a computer-readable storage medium, where the computer-readable storage medium includes a Random Access Memory (RAM), a Memory, a Read-Only Memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a magnetic disk, or an optical disk or any other form of storage medium known in the art. Wherein the computer program realizes the bus determination method for distributing the PCI-E card when being executed by a processor. For the specific steps of the method, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not repeated here.

In the present specification, the embodiments are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same or similar parts between the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

The steps of a PCI-E card assignable bus determination or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

Finally, it should also be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The present invention provides a PCI-E card distributable bus determining method, apparatus, device and storage medium, which are introduced in detail above, and a specific example is applied in this document to explain the principle and implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A PCI-E card distributable bus determination method is applied to a PCI-E card and comprises the following steps:

if the enumeration of the PCI-E equipment is successful, distributing a new bus number for the PCI-E equipment, and skipping to the starting server again and determining the number of the current bus numbers distributed by the PCI-E equipment connected in the current topological state until the enumeration of the PCI-E equipment is failed, and determining the number of the current bus numbers corresponding to the last successful enumeration of the PCI-E equipment as the number of the distributable bus numbers of the PCI-E card.

2. The method of claim 1, wherein the determining whether the enumeration of the PCI-E device is successful comprises:

3. The method of claim 1, wherein if the PCI-E device enumerates successfully, assigning a new bus number to the PCI-E device comprises:

and if the PCI-E equipment is enumerated successfully, executing a command for detecting the number of the currently allocated bus numbers in the PCI-E card Option ROM so as to allocate new bus numbers for the PCI-E equipment.

4. The method for determining the assignable bus of the PCI-E card according to claim 3, wherein the skipping to the step of determining the number of the currently assigned bus numbers again until the PCI-E device enumeration fails further comprises:

5. The PCI-E card assignable bus determining method according to claim 1, wherein each of said PCI-E devices is assigned a bus number.

6. The method for determining the assignable bus of any one of claims 1 to 5, wherein said assigning a new bus number to the PCI-E card if the enumeration of the PCI-E device is successful comprises:

if the PCI-E equipment is enumerated successfully, distributing a new bus number for the PCI-E card by a preset distribution method; wherein the preset allocation method is to change the number of the bus numbers by an increment or decrement method.

7. A PCI-E card distributable bus determination device is applied to a PCI-E card and comprises the following components:

the device enumeration module is used for enumerating the PCI-E device through a basic input and output system and then judging whether the enumeration of the PCI-E device is successful;

8. The device of claim 7, wherein the assignable bus number determining module is configured to execute a command in the PCI-E card Option ROM for detecting the number of currently assigned bus numbers to assign a new bus number to the PCI-E device if the PCI-E device enumerates successfully.

9. An electronic device, wherein the electronic device comprises a processor and a memory; wherein the memory is used for storing a computer program which is loaded and executed by the processor to realize the PCI-E card allocable bus determination method of any claim 1 to 6.

10. A computer-readable storage medium for storing a computer program; wherein the computer program when executed by a processor implements the PCI-E card assignable bus determination method according to any one of claims 1 to 6.