CN111337543A - Sampling device and sampling test method for resistivity test of polycrystalline silicon ingot - Google Patents

Abstract

The invention discloses a sampling device and a sampling test method for testing resistivity of a polycrystalline silicon ingot, which comprises a sampling plate, wherein the sampling plate is of a square structure formed by welding n x n silicon ingot grooves; the silicon ingot groove is of a hollow rectangular structure with an opening on the surface; the opening directions of all silicon ingot groove surfaces of the sampling plates are the same. The method comprises the steps of stipulating and solidifying a polycrystalline silicon ingot resistivity sampling test method, and designing a corresponding sampling device for matching use; the method has the advantages that the size and the distribution of the resistivity values are monitored in the testing process of the polycrystalline silicon ingot, the abnormal part of the silicon ingot is accurately and effectively fed back, and the unqualified part is removed, so that the effect of ensuring the stable electrical property and quality of the polycrystalline silicon ingot is achieved.

Description

A sampling device and sampling test method for resistivity test of polycrystalline silicon ingot

technical field

The invention belongs to the field of performance testing of polycrystalline silicon ingots in photovoltaic industry. More specifically, the present invention relates to a sampling device and a sampling test method for resistivity testing of polycrystalline silicon ingots.

Background technique

At present, the photovoltaic industry is developing rapidly, and the previous G4 and G5 ingots cannot meet the development needs. In order to reduce costs, G6 and G7 ingots are mainly used in the industry, and the quality of the ingots is based on the wafer efficiency as an important basis for evaluating the quality of wafers. , The resistivity distribution trend and standard range of silicon ingots are very important to the efficiency. The resistivity performance monitoring of polycrystalline silicon ingots should be established, and the appropriate sampling point method should be used for testing.

The existing testing and sampling methods are often to randomly take the cut silicon ingots for sampling. There is no fixed sampling method, and the variables cannot be effectively controlled so as to reduce the errors caused by different sampling methods in multiple tests; For the resistivity test of the silicon ingot, the prior art often adopts the method of randomly picking points on the surface of the silicon ingot for testing. The existing sampling plan is very random, cannot accurately reflect the resistivity trend and range of the entire ingot, the control direction of the ingot quality is unclear, lacks data support, and cannot accurately determine the efficiency fluctuation of silicon ingots/wafers The impact on the input of raw materials for ingots cannot be accurately judged. The resistivity performance is one of the important indicators of ingot quality and silicon wafer efficiency. It is impossible to calculate trace elements in the ingot casting process after repeated use of silicon blocks.

Therefore, it is very necessary to design a fixed and scientific method of sampling and testing points, as well as the corresponding sampling device.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a sampling device and a sampling test method for the resistivity test of polycrystalline silicon ingots. Monitor the size and distribution of the resistivity value during the test, accurately and effectively feed back the abnormal part of the silicon ingot and remove the unqualified part, so as to ensure the stable electrical performance and quality of the polycrystalline silicon ingot.

In order to realize the above technical features, the technical solution adopted in the present invention is: a sampling device for resistivity testing of polycrystalline silicon ingots, which includes a sampling plate, and the sampling plate is a square structure formed by welding n*n silicon ingot grooves ; The silicon ingot groove is a hollow rectangular structure with an open surface; all the silicon ingot grooves of the sampling plate have the same opening direction on the surface.

The size of the silicon ingot groove in the sample plate is determined by the size of the tested polycrystalline silicon ingot; the size of the inside of the silicon ingot groove is the same as that of the polycrystalline silicon ingot.

The silicon ingot groove on a diagonal line of the sampling plate is a sampling groove, and the outer surface of the sampling groove is coated with pigment, and the color of the coated pigment is different from the surface color of the remaining silicon ingot grooves.

A partition is connected inside the sampling tank, and the partition is parallel to the bottom plate of the sampling tank; a hollow sandwich structure is formed between the partition plate and the bottom plate of the sampling tank.

A positioning device is arranged in the sandwich structure, and the positioning device is connected with the bottom plate of the sampling tank.

The number of the positioning devices is five, and the five positioning devices form a straight line and are located on the midline of the side edge of the bottom plate of the sampling tank; wherein the positioning devices near the two ends of the bottom plate of the sampling tank are 10 mm away from the edges on both sides of the bottom plate of the sampling tank; the remaining three Each positioning device divides the length in the middle into four equal parts.

The positioning device comprises a limiting cylinder with a hollow cylindrical structure, the limiting cylinder is connected to the bottom plate of the sampling tank; a spring is connected in the limiting cylinder, and one end of the spring is connected with an ejector rod.

The top end of the ejector rod passes through the hole reserved on the surface of the partition plate and extends into the interior of the sampling slot; the top end of the ejector rod is connected with a marker tip.

The above-mentioned sampling test method for a sampling device for resistivity testing of polycrystalline silicon ingots, is characterized in that it comprises the following steps:

S1, cut the polycrystalline silicon ingot to be tested, cut it into n*n silicon ingot blocks, and then fill the n*n silicon ingot grooves of the sampling plate according to the corresponding position after cutting; the silicon ingot specification is G4 , G5, G6...Gn corresponds to the number of tested silicon ingots: 4*4, 5*5, 6*6...n*n blocks;

S2, extracting the silicon ingot filled in the sampling slot on the diagonal as the extracted test silicon ingot;

S3, under the action of the spring, the ejector pin in the sampling slot presses the surface of the filled silicon ingot, and marks five marking points for resistivity test on the surface of the silicon ingot through the marker tip of the ejector pin; two marking points at both ends They are 10mm away from the side edge of the silicon ingot, and the three marking points in the middle are equally spaced;

S4, use a resistivity testing device to test the resistivity of the extracted silicon ingot to be tested through the five marked points, and record the corresponding data to make a graph.

A sampling device for resistivity testing of polycrystalline silicon ingots, comprising a sampling plate, wherein the sampling plate is a square structure formed by welding n*n silicon ingot grooves; the silicon ingot groove is a hollow rectangular structure with an open surface; All ingot groove surfaces of the sampling plate have the same opening direction. The invention specifies and solidifies the method for sampling and testing the resistivity of polycrystalline silicon ingots, and designs a corresponding sampling device for use; monitors the size and distribution of the resistivity value during the testing process of polycrystalline silicon ingots, and accurately and effectively measures the abnormal parts of the silicon ingots. Feedback and remove unqualified parts to achieve the effect of ensuring stable electrical performance and quality of polycrystalline silicon ingots.

In a preferred solution, the size of the silicon ingot groove in the sampling plate is determined by the size of the tested polycrystalline silicon ingot; the size of the inside of the silicon ingot groove is the same as that of the polycrystalline silicon ingot. The structure is simple. When in use, the inner size of the silicon ingot groove is cast in advance according to the size of the polycrystalline silicon ingot after ingot slitting on the product line, so that the polycrystalline silicon ingot can be placed inside the silicon ingot groove.

In a preferred solution, the silicon ingot groove on a diagonal line of the sampling plate is a sampling groove, and the outer surface of the sampling groove is coated with pigment, and the color of the coated pigment is different from the surface color of the remaining silicon ingot grooves. The structure is simple. When used, the sampling method of the diagonal silicon ingot is selected to make the sampled sample fully representative, which can evenly reflect the change of the resistivity of the head and tail of the silicon block in the whole ingot. Trend for ingot quality monitoring; different colors are designed to facilitate the extraction of silicon ingots in diagonal positions.

In a preferred solution, a partition is connected inside the sampling tank, and the partition is parallel to the bottom plate of the sampling tank; a hollow sandwich structure is formed between the partition plate and the bottom plate of the sampling tank; a positioning device is arranged in the sandwich structure, and the positioning device is connected to the bottom plate of the sampling tank connect. The structure is simple. When in use, the positioning device inside the sampling tank is used to mark the test position on the surface of the silicon ingot tank, and the automatic marking and marking operation can be completed during the process of placing the silicon ingot in the sampling plate, avoiding the subsequent operation. The process of manually measuring and selecting test points improves the test efficiency.

In a preferred solution, the number of positioning devices is five, and the five positioning devices form a straight line and are located on the midline of the side edge of the bottom plate of the sampling slot; wherein the positioning devices close to both ends of the bottom plate of the sampling slot are separated from the edges of both sides of the bottom plate of the sampling slot 10mm; the other three positioning devices divide the length in the middle into four equal parts. The structure is simple. When used, the design of test points with a distance of 10mm at both ends is beneficial to reflect the resistivity distribution trend of the head and tail of the silicon ingot. The 3 test points designed in the middle avoid the human error caused by random selection, and can be divided into The resistivity value is recorded in the segment, which provides important data support for the control of the resistivity performance of the ingot, and improves the accuracy of the test.

In a preferred solution, the positioning device includes a limit cylinder with a hollow cylindrical structure, the limit cylinder is connected to the bottom plate of the sampling tank; a spring is connected in the limit cylinder, one end of the spring is connected with a push rod, and the top end of the push rod passes through the surface of the partition plate The reserved hole extends into the interior of the sampling slot; the top of the ejector rod is connected with a marker tip. The structure is simple. When in use, the top of the ejector sticks out under the action of the spring. When the silicon ingot is placed in the sampling groove, the marker on the top of the ejector pin is positioned on the surface of the silicon ingot under the pressure of the spring. The lower ejector is retracted into the sandwich structure without occupying the internal space of the sampling tank; thus, convenient automatic marking can be realized. When the resistivity is tested subsequently, it is only necessary to test according to the marking on the surface of the silicon ingot, and there is no need to manually mark one by one through measurement. , to avoid human error caused by repeated operations.

In a preferred solution, the above-mentioned sampling test method for a sampling device for resistivity testing of polycrystalline silicon ingots is characterized in that it comprises the following steps:

S1, cut the polycrystalline silicon ingot to be tested, cut it into n*n silicon ingot blocks, and then fill the n*n silicon ingot grooves of the sampling plate according to the corresponding position after cutting; the silicon ingot specification is G4 , G5, G6...Gn corresponds to the number of tested silicon ingots: 4*4, 5*5, 6*6...n*n blocks;

S2, extracting the silicon ingot filled in the sampling slot on the diagonal as the extracted test silicon ingot;

S3, under the action of the spring, the ejector pin in the sampling slot presses the surface of the filled silicon ingot, and marks five marking points for resistivity test on the surface of the silicon ingot through the marker tip of the ejector pin; two marking points at both ends They are 10mm away from the side edge of the silicon ingot, and the three marking points in the middle are equally spaced;

S4, use a resistivity testing device to test the resistivity of the extracted silicon ingot to be tested through the five marked points, and record the corresponding data to make a graph.

The beneficial effects of the present invention are:

1, the present invention has changed the sampling test method that adopts different random methods every time in the prior art, and the sampling method of resistivity test is specified and solidified, so as to ensure that the same sampling method is adopted every time the test sampling is carried out, The test error caused by different sampling methods is avoided, and the test accuracy is greatly improved on the basis of ensuring randomness.

2. The present invention adopts the sampling test method of selecting the diagonal silicon ingots after the ingot is cut as the test sample, and the sampling position is fully representative, which can evenly reflect the change of the resistivity of the head and tail of the silicon ingot in the whole ingot, thereby targeting the head of the silicon ingot. The change trend of the resistivity of the tail is used to monitor the quality of the ingot.

3. The present invention improves the method of randomly taking 5 points on the surface of the silicon ingot for testing in the prior art, and uses 5 points on the surface of the silicon ingot for testing. A fixed point-taking method in which the remaining length is divided into three points for the point-taking test; the accuracy and uniformity of the test points are effectively ensured, the errors caused by randomness are reduced, and the segmental resistivity value can be uniformly reflected. Controlling the resistivity performance provides important data support, which can accurately and effectively feed back the abnormal part of the silicon block and remove the unqualified part according to the standard.

4. The present invention also designs a special sampling device used in conjunction with the sampling test method - a sampling plate welded from a silicon ingot slot; wherein the silicon ingot slot at the diagonal position in the sampling plate is improved into a sampling slot, and the inside of the sampling slot is improved. A test point positioning device with a pre-set position is provided to automatically mark the resistivity test points of the filled silicon ingots, which saves the subsequent process of manually selecting test points on the surface of the silicon ingots and avoids multiple repetitions. The measurement error caused by human operation further controls the environmental variables and improves the accuracy of the resistivity test.

Description of drawings

The present invention will be further described below with reference to the accompanying drawings and embodiments.

Figure 1 is a schematic diagram of the position of the sampling slot in the sampling plate in the present invention (taking G6 ingot as an example);

Fig. 2 is the external structure schematic diagram of sampling tank in the present invention;

Fig. 3 is the schematic diagram of the positioning device in the sampling tank in the present invention;

Fig. 4 is the schematic diagram of selecting resistivity test point on the surface of silicon ingot in the present invention;

Fig. 5 is the resistivity test I-MR control chart that adopts fixed sampling method in the present invention;

Fig. 6 adopts the resistivity test I-MR control chart of random sampling method in the present invention;

The reference numerals in the figure are: sampling plate 1 , silicon ingot groove 2 , sampling groove 21 , partition plate 3 , sandwich structure 4 , positioning device 5 , limiting cylinder 51 , spring 52 , and ejector rod 53 .

Detailed ways

In FIG. 1, the hatched portion indicates the sampling slot 21. As shown in FIG.

As shown in Figures 1 to 4, a sampling device for resistivity testing of polycrystalline silicon ingots includes a sampling plate 1. Since the existing G7 ingot is commonly used, the sampling plate 1 is welded with 7*7 silicon ingot grooves 2. The silicon ingot groove 2 is a hollow rectangular structure with an open surface; all the silicon ingot grooves 2 of the sampling plate 1 have the same opening direction on the surface. The invention specifies and solidifies the method for sampling and testing the resistivity of polycrystalline silicon ingots, and designs a corresponding sampling device for use; monitors the size and distribution of the resistivity value during the testing process of polycrystalline silicon ingots, and accurately and effectively measures the abnormal parts of the silicon ingots. Feedback and remove unqualified parts to achieve the effect of ensuring stable electrical performance and quality of polycrystalline silicon ingots.

Example 1:

In a preferred solution, the size of the silicon ingot groove 2 in the sampling plate 1 is determined by the size of the polycrystalline silicon ingot to be tested; the internal size of the silicon ingot groove 2 is the same as that of the polycrystalline silicon ingot. The structure is simple, and in use, the inner size of the silicon ingot groove 2 is cast in advance according to the size of the polycrystalline silicon ingot after slicing on the product line, so that the polycrystalline silicon ingot can be just placed inside the silicon ingot groove 2 .

In a preferred solution, a silicon ingot slot 2 on a diagonal line of the sampling plate 1 is a sampling slot 21 , and the outer surface of the sampling slot 21 is coated with paint, and the painted pigment is different from the surface color of the remaining silicon ingot slots 2 . The structure is simple. When used, the sampling method of the diagonal silicon ingot is selected to make the sampled sample fully representative, which can evenly reflect the change of the resistivity of the head and tail of the silicon block in the whole ingot. Trend for ingot quality monitoring; different colors are designed to facilitate the extraction of silicon ingots in diagonal positions.

In a preferred solution, a partition 3 is connected inside the sampling tank 21, and the partition 3 is parallel to the bottom plate of the sampling tank 21; a hollow sandwich structure 4 is formed between the partition plate 3 and the bottom plate of the sampling tank 21; the sandwich structure 4 is provided with a positioning device 5. The positioning device 5 is connected to the bottom plate of the sampling tank 21 . The structure is simple. When in use, the positioning device 5 inside the sampling tank 21 is used to mark the test position on the surface of the silicon ingot tank 2, and the automatic marking and marking operation can be completed during the process of placing the silicon ingot in the sampling plate 1. , avoiding the subsequent process of artificially measuring and selecting test points, and improving the test efficiency.

In a preferred solution, the number of positioning devices 5 is five, and the five positioning devices 5 are in a straight line and are located on the midline of the side edge of the bottom plate of the sampling slot 21; wherein the positioning devices 5 near the two ends of the bottom plate of the sampling slot 21 and the bottom plate of the sampling slot 21 The distance between the two sides of the edge is 10mm; the other three positioning devices 5 divide the length in the middle into four equal parts. The structure is simple. When used, the design of test points with a distance of 10mm at both ends is beneficial to reflect the resistivity distribution trend of the head and tail of the silicon ingot. The 3 test points designed in the middle avoid the human error caused by random selection, and can be divided into The resistivity value is recorded in the segment, which provides important data support for the control of the resistivity performance of the ingot, and improves the accuracy of the test.

In a preferred solution, the positioning device 5 includes a limiting cylinder 51 with a hollow cylindrical structure, and the limiting cylinder 51 is connected to the bottom plate of the sampling tank 21; The top end of the rod 53 passes through the hole reserved on the surface of the partition plate 3 and extends into the interior of the sampling slot 21; the top end of the ejector rod 53 is connected with a marker tip. The structure is simple. When in use, the top of the ejector rod 53 is protruded under the action of the spring 52. When the silicon ingot is placed in the sampling groove 21, under the pressure of the spring 52, the marker on the top of the ejector rod 53 is positioned on the surface of the silicon ingot. At the same time, the ejector rod 53 is retracted into the sandwich structure 4 under the action of pressure, and does not occupy the internal space of the sampling tank 21; thus, convenient automatic marking is realized, and the subsequent resistivity test only needs to be tested according to the mark on the surface of the silicon ingot. , there is no need to manually mark one by one through measurement, avoiding the human error caused by repeated operations.

In a preferred solution, the above-mentioned sampling test method for a sampling device used for resistivity testing of polycrystalline silicon ingots is characterized in that it comprises the following steps:

S1, since the silicon ingot specifications are G4, G5, G6...Gn, the number of silicon ingots to be tested is 4*4, 5*5, 6*6...n*n blocks; the polycrystalline silicon ingots to be tested are subjected to G7 Cut the ingot, cut it into 7*7 silicon ingot blocks, and then fill in the 7*7 silicon ingot grooves 2 of the sampling plate 1 according to the corresponding position after cutting;

S2, extracting the silicon ingot filled in the sampling slot 21 on the diagonal line as the extracted test silicon ingot;

S3, under the action of the spring 52, the ejector rod 53 in the sampling tank 21 presses the surface of the filled silicon ingot, and marks five resistivity test marks on the surface of the silicon ingot through the marker tip of the ejector rod 53; The two marking points are respectively 10mm away from the side edge of the silicon ingot, and the three marking points in the middle are equally spaced;

S4, use a resistivity testing device to test the resistivity of the extracted silicon ingot to be tested through the five marked points, and record the corresponding data to make a graph.

Example 2:

In a preferred solution, the size of the silicon ingot groove 2 in the sampling plate 1 is determined by the size of the polycrystalline silicon ingot to be tested; the internal size of the silicon ingot groove 2 is the same as that of the polycrystalline silicon ingot. The structure is simple, and in use, the inner size of the silicon ingot groove 2 is cast in advance according to the size of the polycrystalline silicon ingot after slicing on the product line, so that the polycrystalline silicon ingot can be just placed inside the silicon ingot groove 2 .

In a preferred solution, the seven silicon ingot grooves 2 on the sampling plate 1 are randomly selected as the sampling grooves 21 ; and they are randomly selected before each test.

In a preferred solution, the positioning device 5 is not arranged inside the sampling tank 21 , and the structure of the sampling tank 21 is the same as that of the general silicon ingot tank 2 .

In a preferred solution, the above-mentioned sampling test method for a sampling device used for resistivity testing of polycrystalline silicon ingots is characterized in that it comprises the following steps:

S1, since the silicon ingot specifications are G4, G5, G6...Gn, the number of silicon ingots to be tested is 4*4, 5*5, 6*6...n*n blocks; the polycrystalline silicon ingots to be tested are subjected to G7 Cut the ingot, cut it into 7*7 silicon ingot blocks, and then fill in the 7*7 silicon ingot grooves 2 of the sampling plate 1 according to the corresponding position after cutting;

S2, randomly extract the silicon ingots in 7 silicon ingot slots 2 as the extracted test silicon ingots;

S3, randomly mark 5 marking points on the surface of the selected silicon ingot for testing as the position of the resistivity test;

S4, use a resistivity testing device to test the resistivity of the extracted silicon ingot to be tested through the five marked points, and record the corresponding data to make a graph.

In Fig. 5～Fig. 6, it is the resistivity test I-MR control chart obtained by adopting embodiment 1 and embodiment 2 to carry out multiple tests respectively:

5 shows the fixed sampling method provided by the present invention and the experimental method for fixed selection of test points in Example 1. The obtained control chart has no discriminant points or very few different points, the data trend is stable, and the whole ingot can be fed back. Trend change in resistivity;

Fig. 6 adopts the traditional random sampling method and the test method of randomly selecting test points in Example 2. There are many discriminative points on the result control chart obtained by multiple tests, and the data is unstable, and it is impossible to determine whether it is a test problem or a silicon ingot There is a problem in itself, which shows that the traditional random test method is unreasonable, and thus proves that the present invention effectively improves the accuracy and data stability of the resistivity test.

The above-mentioned embodiments are only the preferred technical solutions of the present invention, and should not be regarded as limitations of the present invention. The embodiments and features in the present application may be arbitrarily combined with each other without conflict. The protection scope of the present invention shall take the technical solutions described in the claims, including the equivalent alternatives of the technical features in the technical solutions described in the claims, as the protection scope. That is, equivalent replacements and improvements within this scope are also within the protection scope of the present invention.

Claims (9)

1. A sampling device for testing the resistivity of a polycrystalline silicon ingot is characterized in that: the device comprises a sampling plate (1), wherein the sampling plate (1) is a square structure formed by connecting n × n silicon ingot grooves (2); the silicon ingot groove (2) is of a hollow block structure with an opening on one side surface; the opening directions of all silicon ingot grooves (2) of the sampling plate (1) are the same.

2. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 1, wherein: the size of the silicon ingot groove (2) in the sampling plate (1) is determined by the size of the tested polycrystalline silicon ingot; the size of the inner part of the silicon ingot groove (2) is the same as that of the polycrystalline silicon ingot.

3. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 1, wherein: the silicon ingot groove (2) on one diagonal line of the sampling plate (1) is a sampling groove (21), the outer surface of the sampling groove (21) is coated with pigment, and the color of the coated pigment is different from that of the surfaces of the rest silicon ingot grooves (2).

4. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 3, wherein the sampling device comprises: the sampling groove (21) is internally connected with a partition plate (3), and the partition plate (3) is parallel to the bottom of the sampling groove (21); a hollow sandwich structure (4) is formed between the partition plate (3) and the bottom of the sampling groove (21).

5. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 4, wherein the sampling device comprises: and a positioning device (5) is arranged in the interlayer structure (4), and one end of the positioning device (5) is connected to the bottom plate of the sampling groove (21).

6. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 5, wherein: the number of the positioning devices (5) is five, and the five positioning devices (5) form a straight line; wherein the distance between the positioning devices (5) close to the two side edges of the bottom plate of the sampling groove (21) and the two side edges of the bottom plate of the sampling groove (21) is 10 mm; the other three positioning devices (5) equally divide the length in the middle into four equal parts.

7. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 5, wherein: the positioning device (5) comprises a limiting cylinder (51) with a hollow cylindrical structure, and the limiting cylinder (51) is connected to the bottom plate of the sampling groove (21); a spring (52) is arranged in the limiting cylinder (51), one end of the spring (52) is fixed on the bottom plate of the sampling groove (21), and the other end of the spring (52) is connected with a push rod (53).

8. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 7, wherein: one end of the ejector rod (53) penetrates through a hole reserved in the surface of the partition plate (3) and extends into the sampling groove (21); the top end of the ejector rod (53) is connected with a marking pen point.

9. The sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot according to the claims 1 to 8, characterized by comprising the following steps:

s1, slicing the polycrystalline silicon ingot to be tested into n × n silicon ingot blocks, and then sequentially filling the sliced corresponding positions into a square array consisting of n × n silicon ingot grooves (2) of the sampling plate (1) from top to bottom and from left to right; the silicon ingot specification is G4, G5 and G6 … … Gn, the number of the silicon ingot blocks corresponding to the test is 4 x 4, 5 x 5, 6 x 6 … … n x n blocks, and the number of the silicon ingot grooves (2) in the sampling plate (1) also corresponds to the number of the silicon ingot grooves (2);

s2, extracting the silicon ingot filled in the diagonal sampling groove (21) as an extracted test silicon ingot;

s3, in the process of filling the silicon ingot into the sampling plate (1), the ejector rod (53) in the sampling groove (21) compresses the surface of the filled silicon ingot under the action of the spring (52), and five marking points for resistivity test are marked on the surface of the silicon ingot through the marking pen point at the top end of the ejector rod (53); wherein two marking points at two ends are respectively 10mm away from the side edge of the silicon ingot, and three marking points in the middle are distributed at equal intervals;

and S4, performing resistivity test on the extracted silicon ingot to be tested through the five marked points by using a resistivity testing device, and recording corresponding data to make a chart.

Images