CN111337543A - Sampling device and sampling test method for resistivity test of polycrystalline silicon ingot - Google Patents
Sampling device and sampling test method for resistivity test of polycrystalline silicon ingot Download PDFInfo
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Abstract
The invention discloses a sampling device and a sampling test method for testing resistivity of a polycrystalline silicon ingot, which comprises a sampling plate, wherein the sampling plate is of a square structure formed by welding n x n silicon ingot grooves; the silicon ingot groove is of a hollow rectangular structure with an opening on the surface; the opening directions of all silicon ingot groove surfaces of the sampling plates are the same. The method comprises the steps of stipulating and solidifying a polycrystalline silicon ingot resistivity sampling test method, and designing a corresponding sampling device for matching use; the method has the advantages that the size and the distribution of the resistivity values are monitored in the testing process of the polycrystalline silicon ingot, the abnormal part of the silicon ingot is accurately and effectively fed back, and the unqualified part is removed, so that the effect of ensuring the stable electrical property and quality of the polycrystalline silicon ingot is achieved.
Description
Technical Field
The invention belongs to the field of performance test of polycrystalline silicon ingots in the photovoltaic industry. More particularly, the invention relates to a sampling device and a sampling test method for testing resistivity of a polycrystalline silicon ingot.
Background
At present, the photovoltaic industry develops rapidly, the conventional G4 and G5 ingots cannot meet the development requirements, in order to reduce the cost, the G6 and G7 ingots are mainly used in the industry, the quality of the ingot is based on the silicon wafer efficiency as an important basis for evaluating the silicon wafer quality, the resistivity distribution trend and the standard range of the silicon ingot are critical to the efficiency, the resistivity performance monitoring of the polycrystalline silicon ingot is required to be established, and a proper sampling point-taking method is adopted for testing.
The existing test sampling method is that split silicon ingots are taken randomly for sampling, a fixed sampling method is not available, and variables cannot be controlled effectively so as to reduce errors caused by different sampling methods in multiple tests; for the resistivity test of the silicon ingot after sampling, the prior art often adopts a method of randomly taking points on the surface of the silicon ingot for testing. The existing sampling scheme has high randomness, can not accurately reflect the resistivity trend and range of the whole ingot, has unclear control direction on the ingot quality, lacks data support, can not accurately judge the efficiency fluctuation influence of a silicon ingot/a silicon wafer, can not accurately judge the investment influence on the raw material of the ingot, has the resistivity performance which is one of important indexes of the ingot quality and the silicon wafer efficiency, and can not calculate trace elements in the ingot casting process when the silicon ingot is used for multiple times.
Therefore, it is necessary to design a fixed and scientific sampling and testing point-taking method and a corresponding matched sampling device.
Disclosure of Invention
The invention aims to provide a sampling device and a sampling test method for testing the resistivity of a polycrystalline silicon ingot, wherein the method for testing the resistivity of the polycrystalline silicon ingot by sampling is regulated and solidified, and a corresponding sampling device is designed to be matched for use; the method has the advantages that the size and the distribution of the resistivity values are monitored in the testing process of the polycrystalline silicon ingot, the abnormal part of the silicon ingot is accurately and effectively fed back, and the unqualified part is removed, so that the effect of ensuring the stable electrical property and quality of the polycrystalline silicon ingot is achieved.
In order to realize the technical characteristics, the invention adopts the technical scheme that: a sampling device for testing the resistivity of a polycrystalline silicon ingot comprises a sampling plate, wherein the sampling plate is in a square structure formed by welding n x n silicon ingot grooves; the silicon ingot groove is of a hollow rectangular structure with an opening on the surface; the opening directions of all silicon ingot groove surfaces of the sampling plates are the same.
The size of the silicon ingot groove in the sampling plate is determined by the size of the tested polycrystalline silicon ingot; the size of the inside of the silicon ingot groove is the same as that of the polycrystalline silicon ingot.
The silicon ingot groove on one diagonal line of the sampling plate is a sampling groove, the outer surface of the sampling groove is coated with pigment, and the color of the coated pigment is different from that of the surfaces of the rest silicon ingot grooves.
The sampling groove is internally connected with a partition plate which is parallel to a sampling groove bottom plate; a hollow sandwich structure is formed between the partition plate and the sampling groove bottom plate.
And a positioning device is arranged in the interlayer structure and is connected with the bottom plate of the sampling tank.
The number of the positioning devices is five, and the five positioning devices are in a straight line and are positioned on the central line of the side edge of the sampling groove bottom plate; wherein, the distance between the positioning devices close to the two ends of the sampling groove bottom plate and the two side edges of the sampling groove bottom plate is 10 mm; the other three positioning devices equally divide the middle length into four equal parts.
The positioning device comprises a limiting cylinder with a hollow cylindrical structure, and the limiting cylinder is connected to the bottom plate of the sampling groove; the limiting cylinder is internally connected with a spring, and one end of the spring is connected with a mandril.
The top end of the ejector rod penetrates through a hole reserved in the surface of the partition plate and extends into the sampling groove; the top end of the ejector rod is connected with a marking pen point.
The sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot is characterized by comprising the following steps of:
s1, slicing the polycrystalline silicon ingot to be tested into n × n silicon ingot blocks, and filling the silicon ingot blocks into n × n silicon ingot grooves of the sampling plate according to the corresponding positions after slicing; the silicon ingot specification is G4, G5 and G6 … … Gn, and the number of the silicon ingot blocks corresponding to the test is 4 x 4, 5 x 5 and 6 x 6 … … n x n blocks;
s2, extracting the silicon ingot filled in the sampling groove on the diagonal line as an extracted test silicon ingot;
s3, the ejector rod in the sampling groove compresses the surface of the filled silicon ingot under the action of a spring, and five mark points for resistivity test are marked on the surface of the silicon ingot through the mark pen point of the ejector rod; wherein two marking points at two ends are respectively 10mm away from the side edge of the silicon ingot, and three marking points in the middle are distributed at equal intervals;
and S4, performing resistivity test on the extracted silicon ingot to be tested through the marked five mark points by using the resistivity testing device, and recording corresponding data to prepare a chart.
A sampling device for testing the resistivity of a polycrystalline silicon ingot comprises a sampling plate, wherein the sampling plate is in a square structure formed by welding n x n silicon ingot grooves; the silicon ingot groove is of a hollow rectangular structure with an opening on the surface; the opening directions of all silicon ingot groove surfaces of the sampling plates are the same. The method comprises the steps of stipulating and solidifying a polycrystalline silicon ingot resistivity sampling test method, and designing a corresponding sampling device for matching use; the method has the advantages that the size and the distribution of the resistivity values are monitored in the testing process of the polycrystalline silicon ingot, the abnormal part of the silicon ingot is accurately and effectively fed back, and the unqualified part is removed, so that the effect of ensuring the stable electrical property and quality of the polycrystalline silicon ingot is achieved.
In a preferred embodiment, the size of the ingot groove in the sampling plate is determined by the size of the multicrystalline silicon ingot to be tested; the size of the inside of the silicon ingot groove is the same as that of the polycrystalline silicon ingot. The silicon ingot groove casting device is simple in structure, and when the silicon ingot groove casting device is used, the inner size of the silicon ingot groove is cast in advance according to the size of a polycrystalline silicon ingot after ingot splitting on a product line, so that the polycrystalline silicon ingot can be placed in the silicon ingot groove right.
In a preferred scheme, the silicon ingot groove on one diagonal line of the sampling plate is a sampling groove, and the outer surface of the sampling groove is coated with pigment which has a different color from the surface of the rest silicon ingot grooves. The structure is simple, when the device is used, the sampling mode of the diagonal silicon ingot block is selected, so that the extracted sample has sufficient representativeness, the change of the resistivity of the head and the tail of the silicon ingot in the whole ingot can be uniformly reflected, and the ingot casting quality is monitored according to the change trend of the resistivity of the head and the tail of the silicon ingot; the design of different colors is convenient for operators to extract the silicon ingot blocks at diagonal positions.
In a preferred scheme, a partition plate is connected inside the sampling groove and is parallel to a bottom plate of the sampling groove; a hollow sandwich structure is formed between the partition plate and the sampling groove bottom plate; and a positioning device is arranged in the sandwich structure and is connected with the bottom plate of the sampling tank. Simple structure, during the use, the positioner of sampling inslot portion is used for testing the position to silicon ingot groove surface and beats a mark, can accomplish the operation that automatic marking was got a point at the in-process of arranging the silicon ingot piece in the sampling board, has avoided follow-up artificial measurement to select the process of test point, has improved efficiency of software testing.
In a preferred scheme, the number of the positioning devices is five, and the five positioning devices are in a straight line and are positioned on the midline of the side edge of the sampling groove bottom; wherein, the distance between the positioning devices close to the two ends of the sampling groove bottom plate and the two side edges of the sampling groove bottom plate is 10 mm; the other three positioning devices equally divide the middle length into four equal parts. Simple structure, during the use, the test point design of 10mm apart from both ends does benefit to the resistivity distribution trend that reflects silicon ingot head afterbody, and 3 test points of middle equipartition design have avoided the personal error because of getting the point at random and bring, can segmentation record resistivity value, provide important data support for ingot control resistivity performance, have improved the accuracy of test.
In a preferred scheme, the positioning device comprises a limiting cylinder with a hollow cylinder structure, and the limiting cylinder is connected to a bottom plate of the sampling groove; a spring is connected in the limiting cylinder, one end of the spring is connected with a top rod, and the top end of the top rod penetrates through a hole reserved in the surface of the partition plate and extends into the sampling groove; the top end of the ejector rod is connected with a marking pen point. The structure is simple, when the silicon ingot sampling device is used, the top end of the ejector rod extends out under the action of the spring, when a silicon ingot is placed in the sampling groove, the marking pen point at the top end of the ejector rod performs dotting positioning on the surface of the silicon ingot under the pressure of the spring, and meanwhile, the ejector rod retracts into the sandwich structure under the action of the pressure, so that the internal space of the sampling groove is not occupied; therefore, convenient and fast automatic dotting marking is realized, the resistivity is tested only according to the marks on the surface of the silicon ingot block during subsequent resistivity testing, manual marking one by one through measurement is not needed, and human errors caused by repeated operation are avoided.
In a preferred embodiment, the sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot is characterized by comprising the following steps:
s1, slicing the polycrystalline silicon ingot to be tested into n × n silicon ingot blocks, and filling the silicon ingot blocks into n × n silicon ingot grooves of the sampling plate according to the corresponding positions after slicing; the silicon ingot specification is G4, G5 and G6 … … Gn, and the number of the silicon ingot blocks corresponding to the test is 4 x 4, 5 x 5 and 6 x 6 … … n x n blocks;
s2, extracting the silicon ingot filled in the sampling groove on the diagonal line as an extracted test silicon ingot;
s3, the ejector rod in the sampling groove compresses the surface of the filled silicon ingot under the action of a spring, and five mark points for resistivity test are marked on the surface of the silicon ingot through the mark pen point of the ejector rod; wherein two marking points at two ends are respectively 10mm away from the side edge of the silicon ingot, and three marking points in the middle are distributed at equal intervals;
and S4, performing resistivity test on the extracted silicon ingot to be tested through the marked five mark points by using the resistivity testing device, and recording corresponding data to prepare a chart.
The invention has the beneficial effects that:
the invention changes the sampling test method which adopts different random modes each time in the prior art, regulates and solidifies the sampling method of the resistivity test, ensures that the same sampling method is adopted each time of test sampling, avoids the test error caused by different sampling modes, and greatly improves the test accuracy on the basis of ensuring the randomness.
2, the invention adopts a sampling test method of selecting the diagonal silicon ingot after ingot splitting as a test sample, the sampling position has sufficient representativeness, and the change of the resistivity of the head and the tail of the silicon ingot in the whole ingot can be uniformly reflected, thereby monitoring the quality of the ingot casting aiming at the change trend of the resistivity of the head and the tail of the silicon ingot.
3, the invention improves the point taking mode of randomly taking 5 points on the surface of the silicon ingot block for testing in the prior art, and changes the fixed point taking mode of taking 5 points on the surface of the silicon ingot block for testing, setting the point taking at the head and the tail to be respectively and later extended by 10mm for testing, and equally dividing the residual length by three points in the middle to carry out the point taking test; the accuracy and the uniformity of point taking in the test are effectively guaranteed, errors caused by randomness are reduced, the segmented resistivity values can be uniformly reflected, important data support is provided for the resistivity performance of ingot management and control, abnormal parts of the silicon blocks can be accurately and effectively fed back, and unqualified parts can be removed according to the standard.
4, the invention also designs special sampling equipment matched with the sampling test method, namely a sampling plate welded by silicon ingot grooves; the silicon ingot groove at the diagonal position in the sampling plate is improved into the sampling groove, the testing point positioning device with the position set in advance is arranged in the sampling groove, the resistivity testing point is automatically marked on the filled silicon ingot, the subsequent procedure of manually selecting the testing point on the surface of the silicon ingot is omitted, the measuring error caused by repeated manual operation is avoided, the environment variable is further controlled, and the accuracy of the resistivity testing is improved.
Drawings
The invention is further illustrated by the following figures and examples.
FIG. 1 is a schematic diagram of the position of a sampling slot in a sampling plate (taking an ingot G6 as an example) in the invention;
FIG. 2 is a schematic view showing an external structure of a sampling tank according to the present invention;
FIG. 3 is a schematic view of a positioning device in the sampling tank of the present invention;
FIG. 4 is a schematic diagram of a selected resistivity test point on the surface of a silicon ingot in accordance with the present invention;
FIG. 5 is a chart of resistivity test I-MR control using a fixed sampling method in accordance with the present invention;
FIG. 6 is a chart of resistivity test I-MR control using a random sampling method in accordance with the present invention;
the reference numbers in the figures are: the sampling device comprises a sampling plate 1, a silicon ingot groove 2, a sampling groove 21, a partition plate 3, a sandwich structure 4, a positioning device 5, a limiting cylinder 51, a spring 52 and a push rod 53.
Detailed Description
As in fig. 1, the hatched portion indicates the sampling slot 21.
As shown in fig. 1 to 4, a sampling device for resistivity test of polycrystalline silicon ingot comprises a sampling plate 1, wherein the sampling plate 1 adopts a square structure formed by welding 7 × 7 silicon ingot grooves 2 as a conventional G7 ingot; the silicon ingot groove 2 is of a hollow rectangular structure with an opening on the surface; the opening directions of all the surfaces of the silicon ingot grooves 2 of the sampling plate 1 are the same. The method comprises the steps of stipulating and solidifying a polycrystalline silicon ingot resistivity sampling test method, and designing a corresponding sampling device for matching use; the method has the advantages that the size and the distribution of the resistivity values are monitored in the testing process of the polycrystalline silicon ingot, the abnormal part of the silicon ingot is accurately and effectively fed back, and the unqualified part is removed, so that the effect of ensuring the stable electrical property and quality of the polycrystalline silicon ingot is achieved.
Example 1:
in a preferred scheme, the size of the silicon ingot groove 2 in the sampling plate 1 is determined by the size of the tested polycrystalline silicon ingot; the size of the inside of the silicon ingot groove 2 is the same as that of the polycrystalline silicon ingot. The silicon ingot groove 2 is simple in structure, and when the silicon ingot groove is used, the inner size of the silicon ingot groove 2 is cast in advance according to the size of a polycrystalline silicon ingot split on a product line, so that the polycrystalline silicon ingot can be just placed in the silicon ingot groove 2.
In a preferred scheme, the silicon ingot groove 2 on one diagonal line of the sampling plate 1 is a sampling groove 21, and the outer surface of the sampling groove 21 is coated with pigment which has a color different from the surface color of the rest silicon ingot grooves 2. The structure is simple, when the device is used, the sampling mode of the diagonal silicon ingot block is selected, so that the extracted sample has sufficient representativeness, the change of the resistivity of the head and the tail of the silicon ingot in the whole ingot can be uniformly reflected, and the ingot casting quality is monitored according to the change trend of the resistivity of the head and the tail of the silicon ingot; the design of different colors is convenient for operators to extract the silicon ingot blocks at diagonal positions.
In a preferable scheme, a partition plate 3 is connected inside the sampling groove 21, and the partition plate 3 is parallel to the bottom plate of the sampling groove 21; a hollow sandwich structure 4 is formed between the partition plate 3 and the bottom plate of the sampling groove 21; a positioning device 5 is arranged in the sandwich structure 4, and the positioning device 5 is connected with the bottom plate of the sampling groove 21. Simple structure, during the use, positioner 5 inside sampling groove 21 is used for carrying out the test position to silicon ingot groove 2 surface and beats some marks, can accomplish the operation that automatic marking was beaten at the in-process of placing the silicon ingot piece in sampling plate 1, has avoided follow-up artificial measurement to select the process of test point, has improved efficiency of software testing.
In a preferred embodiment, the number of the positioning devices 5 is five, and the five positioning devices 5 are in a straight line and are positioned on the midline of the side edge of the bottom plate of the sampling slot 21; wherein the distance between the positioning devices 5 close to the two ends of the bottom plate of the sampling groove 21 and the two side edges of the bottom plate of the sampling groove 21 is 10 mm; the remaining three positioning devices 5 equally divide the length of the middle into four equal parts. Simple structure, during the use, the test point design of 10mm apart from both ends does benefit to the resistivity distribution trend that reflects silicon ingot head afterbody, and 3 test points of middle equipartition design have avoided the personal error because of getting the point at random and bring, can segmentation record resistivity value, provide important data support for ingot control resistivity performance, have improved the accuracy of test.
In a preferred scheme, the positioning device 5 comprises a limiting cylinder 51 with a hollow cylindrical structure, and the limiting cylinder 51 is connected to the bottom plate of the sampling groove 21; a spring 52 is connected in the limiting cylinder 51, one end of the spring 52 is connected with a top rod 53, and the top end of the top rod 53 penetrates through a hole reserved on the surface of the partition plate 3 and extends into the sampling groove 21; the top end of the ejector rod 53 is connected with a marking pen point. The structure is simple, when the silicon ingot sampling device is used, the top end of the ejector rod 53 extends out under the action of the spring 52, when a silicon ingot is placed in the sampling groove 21, a marking pen point at the top end of the ejector rod 53 is used for dotting and positioning on the surface of the silicon ingot under the pressure of the spring 52, and meanwhile, the ejector rod 53 retracts into the sandwich structure 4 under the pressure, so that the internal space of the sampling groove 21 is not occupied; therefore, convenient and fast automatic dotting marking is realized, the resistivity is tested only according to the marks on the surface of the silicon ingot block during subsequent resistivity testing, manual marking one by one through measurement is not needed, and human errors caused by repeated operation are avoided.
In a preferred embodiment, the sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot is characterized by comprising the following steps:
s1, the number of the silicon ingot blocks corresponding to the test with the silicon ingot specification of G4, G5 and G6 … … Gn is 4 x 4, 5 x 5, 6 x 6 … … n x n blocks; g7 splitting the polycrystalline silicon ingot to be tested into 7 × 7 silicon ingot blocks, and then filling the split corresponding positions into 7 × 7 silicon ingot grooves 2 of the sampling plate 1;
s2, extracting the silicon ingot filled in the diagonal sampling groove 21 as an extracted test silicon ingot;
s3, the ejector rod 53 in the sampling groove 21 compresses the surface of the filled silicon ingot under the action of the spring 52, and five mark points for resistivity test are marked on the surface of the silicon ingot through the mark pen point of the ejector rod 53; wherein two marking points at two ends are respectively 10mm away from the side edge of the silicon ingot, and three marking points in the middle are distributed at equal intervals;
and S4, performing resistivity test on the extracted silicon ingot to be tested through the marked five mark points by using the resistivity testing device, and recording corresponding data to prepare a chart.
Example 2:
in a preferred scheme, the size of the silicon ingot groove 2 in the sampling plate 1 is determined by the size of the tested polycrystalline silicon ingot; the size of the inside of the silicon ingot groove 2 is the same as that of the polycrystalline silicon ingot. The silicon ingot groove 2 is simple in structure, and when the silicon ingot groove is used, the inner size of the silicon ingot groove 2 is cast in advance according to the size of a polycrystalline silicon ingot split on a product line, so that the polycrystalline silicon ingot can be just placed in the silicon ingot groove 2.
In the preferred scheme, 7 silicon ingot grooves 2 on a sampling plate 1 are randomly selected as sampling grooves 21; and random selection was performed before each test.
In a preferred embodiment, the positioning device 5 is not provided in the sampling tank 21, and the structure of the sampling tank 21 is the same as that of the general silicon ingot tank 2.
In a preferred embodiment, the sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot is characterized by comprising the following steps:
s1, the number of the silicon ingot blocks corresponding to the test with the silicon ingot specification of G4, G5 and G6 … … Gn is 4 x 4, 5 x 5, 6 x 6 … … n x n blocks; g7 splitting the polycrystalline silicon ingot to be tested into 7 × 7 silicon ingot blocks, and then filling the split corresponding positions into 7 × 7 silicon ingot grooves 2 of the sampling plate 1;
s2, randomly extracting silicon ingots in 7 silicon ingot grooves 2 to serve as extracted test silicon ingots;
s3, randomly punching 5 marking points on the surface of the extracted silicon ingot for testing as the positions for resistivity testing;
and S4, performing resistivity test on the extracted silicon ingot to be tested through the marked five mark points by using the resistivity testing device, and recording corresponding data to prepare a chart.
As shown in fig. 5 to 6, the resistivity test I-MR control charts obtained by performing a plurality of experiments using example 1 and example 2 respectively are shown:
fig. 5 is a graph showing no or few different points in the control chart obtained by using the fixed sampling method and the experimental method for fixedly selecting the test points provided by the present invention in embodiment 1, and the data trend is stable, and the trend change of the resistivity of the whole ingot can be fed back;
fig. 6 shows that in example 2, by using the conventional random sampling method and the test method of randomly selecting test points, a result control chart obtained by multiple tests has many different points, data is unstable, and it cannot be determined whether a test problem or a silicon ingot itself exists, which indicates that the conventional random test method is unreasonable, thereby proving that the accuracy and data stability of the resistivity test are effectively improved.
The above-described embodiments are merely preferred embodiments of the present invention, and should not be construed as limiting the present invention, and features in the embodiments and examples in the present application may be arbitrarily combined with each other without conflict. The protection scope of the present invention is defined by the claims, and includes equivalents of technical features of the claims. I.e., equivalent alterations and modifications within the scope hereof, are also intended to be within the scope of the invention.
Claims (9)
1. A sampling device for testing the resistivity of a polycrystalline silicon ingot is characterized in that: the device comprises a sampling plate (1), wherein the sampling plate (1) is a square structure formed by connecting n × n silicon ingot grooves (2); the silicon ingot groove (2) is of a hollow block structure with an opening on one side surface; the opening directions of all silicon ingot grooves (2) of the sampling plate (1) are the same.
2. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 1, wherein: the size of the silicon ingot groove (2) in the sampling plate (1) is determined by the size of the tested polycrystalline silicon ingot; the size of the inner part of the silicon ingot groove (2) is the same as that of the polycrystalline silicon ingot.
3. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 1, wherein: the silicon ingot groove (2) on one diagonal line of the sampling plate (1) is a sampling groove (21), the outer surface of the sampling groove (21) is coated with pigment, and the color of the coated pigment is different from that of the surfaces of the rest silicon ingot grooves (2).
4. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 3, wherein the sampling device comprises: the sampling groove (21) is internally connected with a partition plate (3), and the partition plate (3) is parallel to the bottom of the sampling groove (21); a hollow sandwich structure (4) is formed between the partition plate (3) and the bottom of the sampling groove (21).
5. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 4, wherein the sampling device comprises: and a positioning device (5) is arranged in the interlayer structure (4), and one end of the positioning device (5) is connected to the bottom plate of the sampling groove (21).
6. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 5, wherein: the number of the positioning devices (5) is five, and the five positioning devices (5) form a straight line; wherein the distance between the positioning devices (5) close to the two side edges of the bottom plate of the sampling groove (21) and the two side edges of the bottom plate of the sampling groove (21) is 10 mm; the other three positioning devices (5) equally divide the length in the middle into four equal parts.
7. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 5, wherein: the positioning device (5) comprises a limiting cylinder (51) with a hollow cylindrical structure, and the limiting cylinder (51) is connected to the bottom plate of the sampling groove (21); a spring (52) is arranged in the limiting cylinder (51), one end of the spring (52) is fixed on the bottom plate of the sampling groove (21), and the other end of the spring (52) is connected with a push rod (53).
8. The sampling device for testing the resistivity of the polycrystalline silicon ingot according to claim 7, wherein: one end of the ejector rod (53) penetrates through a hole reserved in the surface of the partition plate (3) and extends into the sampling groove (21); the top end of the ejector rod (53) is connected with a marking pen point.
9. The sampling test method of the sampling device for testing the resistivity of the polycrystalline silicon ingot according to the claims 1 to 8, characterized by comprising the following steps:
s1, slicing the polycrystalline silicon ingot to be tested into n × n silicon ingot blocks, and then sequentially filling the sliced corresponding positions into a square array consisting of n × n silicon ingot grooves (2) of the sampling plate (1) from top to bottom and from left to right; the silicon ingot specification is G4, G5 and G6 … … Gn, the number of the silicon ingot blocks corresponding to the test is 4 x 4, 5 x 5, 6 x 6 … … n x n blocks, and the number of the silicon ingot grooves (2) in the sampling plate (1) also corresponds to the number of the silicon ingot grooves (2);
s2, extracting the silicon ingot filled in the diagonal sampling groove (21) as an extracted test silicon ingot;
s3, in the process of filling the silicon ingot into the sampling plate (1), the ejector rod (53) in the sampling groove (21) compresses the surface of the filled silicon ingot under the action of the spring (52), and five marking points for resistivity test are marked on the surface of the silicon ingot through the marking pen point at the top end of the ejector rod (53); wherein two marking points at two ends are respectively 10mm away from the side edge of the silicon ingot, and three marking points in the middle are distributed at equal intervals;
and S4, performing resistivity test on the extracted silicon ingot to be tested through the five marked points by using a resistivity testing device, and recording corresponding data to make a chart.
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| CN112067663A (en) * | 2020-08-05 | 2020-12-11 | 山东天岳先进材料科技有限公司 | Method and device for detecting resistivity of high-purity silicon carbide crystal |
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| CN112067663A (en) * | 2020-08-05 | 2020-12-11 | 山东天岳先进材料科技有限公司 | Method and device for detecting resistivity of high-purity silicon carbide crystal |
| CN112067663B (en) * | 2020-08-05 | 2024-01-26 | 山东天岳先进科技股份有限公司 | Method and device for detecting resistivity of high-purity silicon carbide crystal |
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| CN111337543B (en) | 2022-06-17 |
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