CN111326433B - Semiconductor inspection apparatus and inspection method - Google Patents
Semiconductor inspection apparatus and inspection method Download PDFInfo
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- CN111326433B CN111326433B CN201811544127.4A CN201811544127A CN111326433B CN 111326433 B CN111326433 B CN 111326433B CN 201811544127 A CN201811544127 A CN 201811544127A CN 111326433 B CN111326433 B CN 111326433B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims abstract description 53
- 238000007689 inspection Methods 0.000 title claims abstract description 49
- 230000007547 defect Effects 0.000 claims abstract description 130
- 230000003287 optical effect Effects 0.000 claims abstract description 130
- 238000001514 detection method Methods 0.000 claims abstract description 50
- 230000008569 process Effects 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims description 57
- 239000000463 material Substances 0.000 claims description 39
- 239000013078 crystal Substances 0.000 claims description 24
- 238000009826 distribution Methods 0.000 claims description 17
- 238000003384 imaging method Methods 0.000 claims description 15
- 230000010287 polarization Effects 0.000 claims description 13
- 150000001875 compounds Chemical class 0.000 claims description 12
- 230000004044 response Effects 0.000 claims description 12
- 230000007704 transition Effects 0.000 claims description 12
- 230000005684 electric field Effects 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 6
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910002601 GaN Inorganic materials 0.000 claims description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 5
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 5
- 238000012806 monitoring device Methods 0.000 claims description 4
- 238000012544 monitoring process Methods 0.000 claims description 4
- 238000012360 testing method Methods 0.000 claims description 3
- 230000006698 induction Effects 0.000 claims 6
- 239000003989 dielectric material Substances 0.000 description 8
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 7
- 230000001066 destructive effect Effects 0.000 description 5
- 238000011897 real-time detection Methods 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000003949 trap density measurement Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
Abstract
A semiconductor inspection apparatus and inspection method. The semiconductor detection device includes: the wafer bearing device is used for bearing a wafer to be detected; the incident light system is used for emitting first incident light to the wafer to be detected, and the first incident light is reflected by the wafer to be detected to form first reflected light; an optical signal sorting system for sorting nonlinear optical signals from the first reflected light; and the control system is used for acquiring the first defect information of the wafer to be detected according to the nonlinear optical signal. The semiconductor detection device can realize nondestructive atomic-level defect detection in the process.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing technology, and in particular, to a semiconductor inspection apparatus and an inspection method.
Background
In the semiconductor manufacturing process, the yield of devices is easily reduced due to defects in the process or materials, and the production cost is increased. The conventional yield detection mode is divided into electrical detection and on-line quantity detection.
Wherein electrical inspection can be used to discover defects that affect the electrical performance of the device. However, conventional electrical inspection can only be applied to Back End Of Line (BEOL) or package testing, and cannot be solved by finding problems in real time during the process. Namely, the period from the occurrence of the electrical detection to the detection can be overlong, the waste of invalid processes is easily caused, the detection speed is low, and the batch detection can not be realized.
Another conventional in-line volume inspection is capable of real-time inspection during the process, such as scanning electron microscope inspection, optical bright field inspection, etc., but the inspection type has limitations. In particular, in-line volume inspection is generally applicable to macroscopic physical defects such as particles (partics) and pattern defects (pattern defects), and once the inspection requirements enter atomic-size-level defects, the in-line volume inspection cannot meet the inspection requirements.
In summary, the real-time detection of atomic-level defect problems caused by the adoption of novel materials and process flows in the prior process development and production is one of the problems to be solved in the field of semiconductor yield detection at present.
Disclosure of Invention
The invention provides a semiconductor detection device and a detection method, which are used for realizing nondestructive atomic-level defect detection in a process.
In order to solve the above problems, the present invention provides a semiconductor inspection apparatus comprising: the wafer bearing device is used for bearing a wafer to be detected; the incident light system is used for emitting first incident light to the wafer to be detected, and the first incident light is reflected by the wafer to be detected to form first reflected light; an optical signal sorting system for sorting nonlinear optical signals from the first reflected light; and the control system is used for acquiring the first defect information of the wafer to be detected according to the nonlinear optical signal.
Optionally, the nonlinear optical signal includes a second harmonic signal, a third harmonic signal, a sum frequency response signal, and a difference frequency response signal.
Optionally, the method further comprises: a wafer alignment focus system comprising: the imaging unit is used for acquiring imaging patterns at different positions on the surface of the wafer to be detected; and the sensor is used for acquiring the position information of the wafer to be tested in a first direction, and the first direction is perpendicular to the surface of the wafer to be tested.
Optionally, the control system includes: the imaging operation unit is used for acquiring the position information of the wafer to be detected according to imaging patterns of different positions on the surface of the wafer to be detected; and the first position control unit is used for moving the wafer bearing device along the direction parallel to a reference plane according to the position information, and the reference plane is parallel to the surface of the wafer to be tested.
Optionally, the control system includes: and the second position control unit is used for moving the wafer bearing device according to the position information in the first direction so as to realize focusing of the first incident light on the surface of the wafer to be tested.
Optionally, the incident light system includes: a first light source for emitting a first initial incident light; and the first incident light modulation unit is used for modulating the first initial incident light to form the first incident light emitted to the wafer.
Optionally, the first light source comprises a laser emitter.
Optionally, the first incident light modulation unit: modulating means for changing one or more of the intensity, polarization parameter and focal length of the initial incident light; and the monitoring device is used for monitoring the incident light information of the first incident light and feeding the incident light information back to the control system.
Optionally, the incident light information includes: power, light intensity, polarization parameters, and light pulse parameters.
Optionally, the incident light system further includes: and the second light source is used for emitting second incident light to the wafer to be detected, and the second incident light is reflected by the wafer to be detected to form second reflected light.
Optionally, the method further comprises: and the additional signal acquisition system is used for acquiring an additional optical signal according to the second reflected light and transmitting the additional optical signal to the control system.
Optionally, the incident light system further includes: the second incident light modulation unit is used for modulating the second incident light and then transmitting the modulated second incident light to the surface of the wafer to be detected.
Optionally, the method further comprises: and the additional signal acquisition system is used for acquiring an additional optical signal from the first reflected light and transmitting the additional optical signal to the control system.
Optionally, the method further comprises: and the main signal acquisition system is used for acquiring the nonlinear optical signal and transmitting the nonlinear optical signal to the control system.
Optionally, the optical signal sorting system includes: a filter for forming a first transition optical signal by a portion of the first reflected light having a preset wavelength range; and a polarizer for passing the first transition optical signal having a preset polarization parameter to form the nonlinear optical signal.
Optionally, the optical signal sorting system includes: a polarizer for passing a portion of the first reflected light having a predetermined polarization parameter to form a second transition optical signal; and a filter for passing the second transition optical signal having a preset wavelength range to form the nonlinear optical signal.
Optionally, the carrying device includes: the bearing disc is used for bearing the wafer to be detected; the fixing device is arranged on the bearing disc and used for fixing the wafer to be detected on the surface of the bearing disc; and the mechanical moving assembly is used for driving the bearing disc to move.
Optionally, the fixing device is a vacuum chuck or a buckle fixed on the edge of the bearing disc.
Optionally, the method further comprises: focusing unit: for focusing the first incident light on the surface of the unit to be inspected.
Optionally, the method further comprises: an optical collimation unit: the optical signal sorting system is used for collimating the first reflected light and enabling the collimated first reflected light to be incident to the optical signal sorting system.
Correspondingly, the invention also provides a detection method by adopting the semiconductor detection device, which comprises the following steps: providing a wafer to be detected; emitting first incident light to the wafer to be detected, wherein the first incident light is reflected by the wafer to be detected to form first reflected light; acquiring the first reflected light and sorting nonlinear optical signals from the first reflected light; and acquiring first defect information of the wafer to be detected according to the nonlinear optical signal.
Optionally, the wafer to be tested includes: the substrate and the dielectric layer positioned on the surface of the substrate.
Optionally, the first defect information includes an interface electrical attribute defect at an interface between the substrate and the dielectric layer; the interface electrical property defect comprises: interface state charge well defects, intrinsic charge distribution of a dielectric layer, defects and doping concentration of a substrate semiconductor.
Optionally, the wafer to be tested includes: a substrate, and a semiconductor layer located on the surface of the substrate; the semiconductor layer is made of a compound semiconductor material or an elemental semiconductor material.
Alternatively, the compound semiconductor material includes gallium arsenide, gallium nitride, or silicon carbide; the forming process of the semiconductor layer includes an epitaxial process.
Optionally, the first defect information includes: crystal structure defects, stress distribution within the semiconductor layer, and epitaxial thickness of the semiconductor layer.
Compared with the prior art, the technical scheme of the invention has the following advantages:
according to the technical scheme of the semiconductor detection device, the nonlinear optical signals for detection can be sorted out from the first reflected light reflected by the surface of the wafer to be detected. The nonlinear optical signal can be used for characterizing interface state charge well defects, intrinsic charges of a dielectric layer, defects or semiconductor crystal structure defects. Thus realizing the non-destructive atomic-level defect detection of the semiconductor device in real time in the semiconductor manufacturing process. In addition, the real-time semiconductor detection device can realize batch detection, and is beneficial to shortening the semiconductor manufacturing period and reducing the cost.
According to the detection method, the interface state charge potential well defect, the inherent charge of the dielectric layer and the defect or the defect of the semiconductor crystal structure can be represented by the nonlinear optical signals separated from the first reflected light, so that nondestructive atomic-scale defect detection of the semiconductor device in the semiconductor process is realized in real time, the semiconductor process period is shortened, the cost is reduced, and batch defect detection is realized.
Drawings
Fig. 1 to 8 are schematic structural views of a semiconductor inspection device according to various embodiments of the present invention;
fig. 9 is a flow chart of a detection method according to an embodiment of the invention.
Detailed Description
As described in the background art, the implementation of real-time atomic-level defect detection in the process is one of the problems to be solved in the field of semiconductor yield detection.
In order to solve the problem of real-time detection of atomic defects in the development and production of semiconductor advanced processes due to novel materials and process flows, the embodiment of the invention provides a semiconductor detection device and a detection method. In the semiconductor detection device, nonlinear optical signals for detection can be sorted out from the first reflected light, so that interface state charge potential well defects, medium layer inherent charges and defects or semiconductor crystal structure defects are represented, and nondestructive atomic-level defect detection of the semiconductor device is realized.
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings.
Fig. 1 to 8 are schematic structural views of a semiconductor inspection device according to an embodiment of the present invention.
Referring to fig. 1, the structure of the semiconductor inspection device includes:
a wafer carrying device 100 for carrying a wafer 101 to be inspected;
an incident light system 200, configured to emit first incident light 210 to the wafer to be inspected, where the first incident light 210 is reflected by the wafer to be inspected to form first reflected light 211;
an optical signal sorting system 300 for sorting nonlinear optical signals 212 from said first reflected light 211;
the control system 400 is configured to obtain first defect information of the wafer 101 to be inspected according to the nonlinear optical signal 212.
The following detailed description will be given with reference to the accompanying drawings.
The semiconductor inspection apparatus is capable of characterizing atomic level defects within the wafer 101 to be inspected by the nonlinear optical signal 212, thereby achieving non-destructive acquisition of atomic level defects or crystal defects within the wafer in real time during a process.
Specifically, by the first incident light 210 being incident to the to-be-detected position on the surface of the wafer 101 to be detected, the material of the wafer 101 to be detected interacts with the light field emission of the first incident light 210 to generate an optical response, and the nonlinear optical signal 212 in the optical response can be used to characterize the atomic-level defect in the wafer 101 to be detected. Because an optical detection means is adopted, destructive detection of the wafer 101 to be detected is not required, and the optical detection can be performed at some key nodes in the process, so that real-time detection of defects is realized and the process is improved in time.
The nonlinear optical signal 212 includes sum frequency response (SFG), difference frequency response (DFG), second harmonic Signal (SHG), third harmonic signal (THG), and higher order nonlinear optical signals.
In this embodiment, referring to fig. 2, the wafer 101 to be inspected includes: a substrate 110, and a dielectric layer 111 on the surface of the substrate 110; in this embodiment, the material of the substrate 110 is monocrystalline silicon, and the material of the dielectric layer 111 is silicon oxide. In other embodiments, the substrate 110 material can also be other semiconductor materials with central symmetry; the material of the dielectric layer 111 is other dielectric materials, such as silicon nitride, silicon oxynitride, high-K dielectric material (dielectric constant greater than 3.9), low-K dielectric material (dielectric constant greater than 2.5 and less than 3.9), or ultra-low-K dielectric material (dielectric constant less than 2.5).
The nonlinear optical signal 212 is capable of characterizing interface state charge well defects (Dit: interfacial trap density) at the interface between the dielectric layer 111 and the substrate 110, as well as intrinsic charges and defects within the dielectric layer. Wherein the interface state charge well defects are distributed at the interface of the semiconductor and the oxide film; the intrinsic charges and defects in the dielectric layer are distributed inside the dielectric layer, and the intrinsic charges and defects of the dielectric layer 111 are intrinsic defects introduced by process factors in the film forming process of the dielectric layer 111, and can also be damaged by materials caused by subsequent processes. The interface state charge well defect or the intrinsic charge of the dielectric layer and the defect may cause deterioration of electrical properties between the dielectric layer 111 and the substrate 110.
Specifically, since the material of the substrate 110 is monocrystalline silicon, and the monocrystalline silicon is a central symmetry material, when an interface state charge a exists at the interface between the dielectric layer 111 and the substrate 110, or an intrinsic charge B exists in the dielectric layer 111, the interface state charge a or the intrinsic charge B induces a change in space charge distribution in the substrate 110. Once the space charge distribution within the substrate changes, it results in an electric field induced signal from the disruption of the central symmetry of the single crystal silicon material. After the nonlinear optical signal 212 is coupled with the electric field induced signal, the change of space charge distribution in the substrate 110 can be reflected, so as to characterize the defect distribution of interface state charge potential well at the interface between the dielectric layer 111 and the substrate 110, or the inherent charge and defect distribution in the dielectric layer 111.
In one embodiment, the dielectric layer 111 is patterned. In another embodiment, the dielectric layer 111 is not patterned.
In another embodiment, referring to fig. 3, the wafer 100 to be tested includes: a substrate 120, and a semiconductor layer 121 on a surface of the substrate 120; the material of the semiconductor layer 121 is a compound or simple substance semiconductor material; the compound semiconductor material comprises gallium arsenide, gallium nitride and silicon carbide. The nonlinear optical signal 212 is capable of responding to crystal structure defects in the compound semiconductor material, thereby enabling real-time monitoring of the crystal quality of the semiconductor layer 121.
In this embodiment, the semiconductor layer is formed on the substrate surface in an epitaxial process, and when the epitaxial process causes crystal structure defects in the semiconductor layer, the crystal structure defects are coupled with the nonlinear optical signal 212, so that the nonlinear optical signal 212 can characterize the lattice defects or crystal uniformity defects. Wherein the crystal structure defect includes a lattice defect or a crystal uniformity defect, and the crystal uniformity defect refers to a defect at which the ordered arrangement of the lattice is distorted.
In one embodiment, the semiconductor layer 121 is patterned. In another embodiment, the semiconductor layer 121 is not patterned.
The optical signal sorting system 300 is used to separate the nonlinear optical signal 212 from the first reflected light 211.
Referring to fig. 4, the optical signal sorting system 300 includes: a filter 301 and a polarizer 302. In this embodiment, the optical filter 301 is configured to pass a portion of the first reflected light 211 having a predetermined wavelength range to form a first transition optical signal; the polarizer 302 is configured to pass the first transition optical signal having a predetermined polarization parameter to form the nonlinear optical signal 212. That is, the first reflected light 211 is filtered by the filter 301, and then passes through the polarizer 302 to filter the nonlinear optical signal 212 with the preset polarization parameter.
Referring to fig. 5, in another embodiment, the polarizer 302 is configured to pass a portion of the first reflected light having a predetermined polarization parameter to form a second transition optical signal; the optical filter 301 is configured to pass the second transition optical signal having a predetermined wavelength range to form the nonlinear optical signal 212.
With continued reference to fig. 1, in the present embodiment, the semiconductor inspection apparatus further includes a wafer alignment focusing system 500, where the wafer alignment focusing system 500 is used to align and focus the first incident light 210 at the to-be-inspected position on the surface of the wafer 100.
The wafer alignment focusing system 500 includes: an imaging unit 501, configured to obtain imaging patterns at different positions on the surface of the wafer 101 to be tested; and a sensor 502, configured to obtain positional information of the wafer 101 to be tested in a first direction Z, where the first direction Z is perpendicular to the surface of the wafer 101 to be tested.
In this embodiment, the control system 400 includes: an imaging operation unit 401, configured to obtain position information of a wafer to be tested according to imaging patterns at different positions on a surface of the wafer to be tested 101; a first position control unit 402, configured to move the wafer carrier 100 along a direction parallel to a reference plane XY according to the position information, where the reference plane XY (i.e. a plane formed by an X coordinate and a Y coordinate) is parallel to the surface of the wafer 101 to be measured, so as to implement alignment of the wafer 101 to be measured.
After the imaging unit 501 obtains imaging patterns of different positions on the surface of the wafer 101 to be tested, the control system 400 can obtain the position information of the wafer 101 to be tested through the imaging patterns, so as to control the wafer carrier 100 to move to a desired position for alignment.
In this embodiment, the control system 400 further includes: a second position control unit 403, configured to move the wafer carrier 100 according to the position information of the wafer 101 to be tested in the first direction Z.
After the sensor 502 obtains the position information of the wafer 101 to be tested in the first direction Z, the position information is sent to the second position control unit 403, and the second position control unit 403 moves the wafer carrier 100 according to the position information in the first direction Z until the first incident light 210 can be focused at the designated height on the surface of the wafer 101 to be tested.
The incident light system 200 includes: a first light source 201 for emitting a first initial incident light; the first incident light modulation unit 202 is configured to modulate the first initial incident light to form the first incident light 210 emitted to the wafer 101.
In this embodiment, the first light source 201 comprises a laser emitter.
Referring to fig. 6, in the present embodiment, the first incident light modulation unit 202 includes: a modulation device 220 for changing one or more of a light intensity, a polarization parameter, and a focal length of the initial incident light 222; the monitoring device 221 is configured to monitor incident light information of the first incident light 210, and feed back the incident light information to the control system 400.
Wherein the incident light information includes: power, light intensity, polarization parameters, and focal length, etc. The modulation device 220 is used for adjusting and controlling the optical parameter of the first incident light 210 incident on the surface of the wafer 101 to be measured. The monitoring device 221 can monitor the parameter of the first incident light 210 in real time, and feed the monitored incident light information back to the control system 400, and the control system 400 can control the modulating device to adjust the optical parameter of the first incident light 210 according to the obtained incident light information.
With continued reference to fig. 1, in this embodiment, the semiconductor inspection apparatus further includes an additional signal acquisition system 600. The first incident light 210 generates additional reflected light 213 in addition to the first reflected light 211 generated on the surface of the wafer 101 to be measured; the additional signal acquisition system 600 is configured to acquire an additional optical signal 214 from the additional reflected light 213 and transmit the additional optical signal 214 to the control system 400. The additional optical signal 214 can be used to characterize the second defect information, by which the complementation with the first defect information is achieved, resulting in a more comprehensive detection result.
In an embodiment, the nonlinear optical signal 212 is used to characterize a first type of defect and the additional optical signal 214 is used to characterize a second type of defect, so that the nonlinear optical signal 212 and the additional optical signal 214 are capable of achieving complementation of the detection result.
In another embodiment, the additional optical signal 214 is responsive to both a third type of defect and a fourth type of defect, however, the additional optical signal 214 is unable to distinguish between the third type of defect and the fourth type of defect. The nonlinear optical signal 212 is capable of responding to the third type defect but not the fourth type defect, so that the detection result of the additional optical signal 214 can be classified by the nonlinear optical signal 212, and the accuracy of the detection result is improved.
In this embodiment, the additional signal collecting system 600 obtains an additional optical signal through the additional reflected light 213, that is, the additional signal collecting system 600 and the optical signal sorting system 300 obtain reflected or scattered light that is formed by reflecting or scattering the incident light provided by the same light source.
In another embodiment, the additional signal acquisition system 600 and the optical signal sorting system 300 acquire reflected or scattered light reflected or scattered by incident light provided by different light sources.
Specifically, referring to fig. 7, the incident light system 200 further includes: the second light source 203 is configured to emit a second incident light 215 to the wafer 101 to be inspected, where the second incident light 215 is reflected by the wafer to be inspected to form a second reflected light 216. In one embodiment, the incident light system 200 further comprises: the second incident light modulation unit 204 is configured to modulate the second incident light 215, and then emit the modulated second incident light 215 to the surface of the wafer 101 to be inspected. An additional signal acquisition system 600 is used to acquire additional optical signals from the second reflected light 216 and transmit the additional optical signals to the control system 400.
In this embodiment, further comprising: a main signal acquisition system 310 for acquiring the nonlinear optical signal 212 and transmitting the nonlinear optical signal to the control system 400.
The carrying device 100 includes: a carrying tray for carrying the wafer 101 to be inspected; the fixing device is arranged on the bearing plate and is used for fixing the wafer 101 to be detected on the surface of the bearing plate; and the mechanical moving assembly is used for driving the bearing disc to move. Wherein, fixing device is vacuum chuck or is fixed in the buckle of loading tray edge. The mechanical movement assembly is capable of moving the carrier platter to a designated position based on signals provided by the first position control unit 402 (shown in fig. 1) or the second position control unit 403 (shown in fig. 1).
Referring to fig. 8, the semiconductor inspection apparatus further includes: a focusing unit 230, configured to focus the first incident light 210 on the surface of the wafer 101 to be inspected; an optical collimating unit 231, configured to collimate the first reflected light 211, and make the collimated first reflected light 211 incident on the optical signal sorting system 300.
Correspondingly, the embodiment of the invention also provides a method for detecting by adopting the semiconductor detection device. Referring to fig. 9, fig. 9 is a flow chart of a detection method according to an embodiment of the invention, including:
step S1, providing a wafer to be detected;
s2, emitting first incident light to the wafer to be detected, wherein the first incident light is reflected by the wafer to be detected to form first reflected light;
s3, acquiring the first reflected light, and sorting nonlinear optical signals from the first reflected light;
and S4, acquiring first defect information of the wafer to be detected according to the nonlinear optical signal.
The following detailed description will be given with reference to the accompanying drawings.
Referring to fig. 1, 2 and 5 in combination, a wafer 101 to be inspected is provided.
In this embodiment, the wafer to be inspected 101 includes: a substrate 110, and a dielectric layer 111 on the surface of the substrate 110; in this embodiment, the material of the substrate 110 is monocrystalline silicon, and the material of the dielectric layer 111 is silicon oxide. In other embodiments, the substrate 110 material can also be other semiconductor materials with central symmetry; the material of the dielectric layer 111 is other dielectric materials, such as silicon nitride, silicon oxynitride, high-K dielectric material (dielectric constant greater than 3.9), low-K dielectric material (dielectric constant greater than 2.5 and less than 3.9), or ultra-low-K dielectric material (dielectric constant less than 2.5).
Wherein, the interface between the dielectric layer 111 and the substrate 110 has an interface state charge well defect (Dit: interfacial trap density); alternatively, the dielectric layer has intrinsic charges and defects therein. The interface state charge well defects are distributed at the interface of the semiconductor and the oxide film; the intrinsic charges and defects in the dielectric layer 111 are distributed inside the dielectric layer 111, and the intrinsic charges and defects of the dielectric layer 111 are intrinsic defects introduced by process factors in the film forming process of the dielectric layer 111, and can also be damaged by materials caused by subsequent processes. The interface state charge well defect or the intrinsic charge of the dielectric layer 111 and the defect may cause deterioration of electrical properties between the dielectric layer 111 and the substrate 110.
In another embodiment, referring to fig. 1, 3 and 5 in combination, the wafer 100 to be tested includes: a substrate 120, and a semiconductor layer 121 on a surface of the substrate 120; the material of the semiconductor layer 121 is a compound or simple substance semiconductor material; the compound semiconductor material comprises gallium arsenide, gallium nitride and silicon carbide; the forming process of the semiconductor layer includes an epitaxial process.
Referring to fig. 5 and 1 in combination, a first incident light 210 is emitted to the wafer 101 to be inspected, and the first incident light 210 is reflected by the wafer to be inspected to form a first reflected light 211.
Referring to fig. 5 and 1 in combination, the first reflected light 211 is acquired and a nonlinear optical signal 212 is sorted from the first reflected light 211.
The nonlinear optical signal 212 characterizes atomic-level defects within the wafer 101 to be inspected, thereby enabling non-destructive acquisition of atomic-level defects or crystal defects within the wafer in real-time during a process.
Specifically, by the first incident light 210 being incident to the to-be-detected position on the surface of the wafer 101 to be detected, the material of the wafer 101 to be detected interacts with the light field emission of the first incident light 210 to generate an optical response, and the nonlinear optical signal 212 in the optical response can be used to characterize the atomic-level defect in the wafer 101 to be detected. Because an optical detection means is adopted, destructive detection of the wafer 101 to be detected is not required, and the optical detection can be performed at key nodes in the process, so that real-time detection of defects is realized and the process is improved in time.
The nonlinear optical signal 212 includes sum frequency response (SFG), difference frequency response (DFG), second harmonic Signal (SHG), third harmonic signal (THG), and higher order nonlinear optical signals.
In this embodiment, referring to fig. 2, the wafer 101 to be inspected includes: a substrate 110, and a dielectric layer 111 on the surface of the substrate 110.
The nonlinear optical signal 212 is capable of characterizing interface state charge well defects (Dit: interfacial trap density) at the interface between the dielectric layer 111 and the substrate 110, as well as intrinsic charges and defects within the dielectric layer. Wherein the interface state charge well defects are distributed at the interface of the semiconductor and the oxide film; the intrinsic charges and defects in the dielectric layer are distributed inside the dielectric layer, and the intrinsic charges and defects of the dielectric layer 111 are intrinsic defects introduced by process factors in the film forming process of the dielectric layer 111, and can also be damaged by materials caused by subsequent processes. The interface state charge well defect or the intrinsic charge of the dielectric layer and the defect may cause deterioration of electrical properties between the dielectric layer 111 and the substrate 110.
Specifically, since the material of the substrate 110 is monocrystalline silicon, and the monocrystalline silicon is a central symmetry material, when an interface state charge a exists at the interface between the dielectric layer 111 and the substrate 110, or an intrinsic charge B exists in the dielectric layer 111, the interface state charge a or the intrinsic charge B induces a change in space charge distribution in the substrate 110. Once the space charge distribution within the substrate changes, it results in an electric field induced signal from the disruption of the central symmetry of the single crystal silicon material. After the nonlinear optical signal 212 is coupled with the electric field induced signal, it can reflect the space charge distribution change in the substrate 110, so as to characterize whether an interface state charge exists at the interface between the dielectric layer 111 and the substrate 110 or whether an intrinsic charge exists in the dielectric layer 111.
In another embodiment, referring to fig. 3, the wafer 100 to be tested includes: a substrate 120, and a semiconductor layer 121 on a surface of the substrate 120; the material of the semiconductor layer 121 is a compound or simple substance semiconductor material; the compound semiconductor material comprises gallium arsenide, gallium nitride and silicon carbide.
The nonlinear optical signal 212 is capable of responding to crystal structure defects in the compound semiconductor material, thereby enabling real-time monitoring of the crystal quality of the semiconductor layer 121.
In this embodiment, the semiconductor layer is formed on the substrate surface in an epitaxial process, and when the epitaxial process causes crystal structure defects in the semiconductor layer, the crystal structure defects are coupled with the nonlinear optical signal 212, so that the nonlinear optical signal 212 can characterize the lattice defects or crystal uniformity defects. Wherein the crystal structure defect includes a lattice defect or a crystal uniformity defect, and the crystal uniformity defect refers to a defect at which the ordered arrangement of the lattice is distorted.
Referring to fig. 5 and fig. 1 in combination, first defect information of the wafer 101 to be inspected is obtained according to the nonlinear optical signal 212.
In this embodiment, as shown in fig. 2, the wafer 101 to be inspected includes: a substrate 110, and a dielectric layer 111 on the surface of the substrate 110; the first defect information comprises an interface electrical attribute defect at an interface between the substrate and the dielectric layer; the interface electrical property defect comprises: interface state charge well defects, intrinsic charge distribution of a dielectric layer and defects, and doping concentration of a substrate semiconductor.
In another embodiment, as shown in fig. 3, the wafer 100 to be tested includes: a substrate 120, and a semiconductor layer 121 on a surface of the substrate 120; the first defect information includes: crystal structure defects, stress distribution within the semiconductor layer, and epitaxial thickness of the semiconductor layer.
The first incident light 210 generates additional reflected light 213 in addition to the first reflected light 211 generated on the surface of the wafer 101 to be measured; the detection method further comprises the following steps: an additional optical signal 214 is acquired from the additional reflected light 213 and second defect information is acquired from the additional optical signal 214. And the second defect information is used for realizing complementation with the first defect information, so that the detection result is more comprehensive.
In this embodiment, the additional optical signal 214 and the nonlinear optical signal 212 are both reflected from the first incident light 210 provided by the first light source 201.
In another embodiment, referring to fig. 7, the detection method includes: transmitting second incident light 215 to the wafer 101 to be detected, wherein the second incident light 215 forms second reflected light 216 through reflection or scattering of the wafer 101 to be detected; an additional optical signal is acquired from the second reflected light 216 and second defect information is acquired from the additional optical signal.
In this embodiment, before the second incident light 215 is emitted to the wafer to be inspected, the second incident light 215 may also be modulated, and then the modulated second incident light 215 may be emitted to the surface of the wafer 101 to be inspected.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.
Claims (25)
1. A semiconductor inspection apparatus, comprising:
the wafer bearing device is used for bearing a wafer to be detected;
the incident light system is used for emitting first incident light to the wafer to be detected, and the first incident light is reflected by the wafer to be detected to form first reflected light;
the optical signal sorting system is used for sorting nonlinear optical signals from the first reflected light, wherein the nonlinear optical signals are coupled with an electric field induction signal generated by the wafer to be detected, and the electric field induction signal is generated due to the change of space charge distribution in an interface state charge or an inherent charge induction substrate;
the control system is used for acquiring first defect information of the wafer to be detected according to the nonlinear optical signal, wherein the first defect information comprises interface electrical attribute defects, and the interface electrical attribute defects comprise: interface state charge well defects, dielectric layer intrinsic charge distribution and defects, and substrate semiconductor doping concentration, the control system comprising: the imaging operation unit is used for acquiring the position information of the wafer to be detected according to imaging patterns of different positions on the surface of the wafer to be detected; and the first position control unit is used for moving the wafer bearing device along the direction parallel to a reference plane according to the position information, and the reference plane is parallel to the surface of the wafer to be tested.
2. The semiconductor inspection device of claim 1, wherein the nonlinear optical signal comprises a second harmonic signal, a third harmonic signal, a sum frequency response signal, and a difference frequency response signal.
3. The semiconductor inspection device according to claim 1, further comprising: a wafer alignment focus system comprising: the imaging unit is used for acquiring imaging patterns at different positions on the surface of the wafer to be detected; and the sensor is used for acquiring the position information of the wafer to be tested in a first direction, and the first direction is perpendicular to the surface of the wafer to be tested.
4. The semiconductor inspection device of claim 3, wherein the control system comprises: and the second position control unit is used for moving the wafer bearing device according to the position information in the first direction so as to realize focusing of the first incident light on the surface of the wafer to be tested.
5. The semiconductor inspection apparatus of claim 1, wherein the incident light system comprises: a first light source for emitting a first initial incident light; and the first incident light modulation unit is used for modulating the first initial incident light to form the first incident light emitted to the wafer.
6. The semiconductor inspection device of claim 5, wherein the first light source comprises a laser emitter.
7. The semiconductor detection device according to claim 5, wherein the first incident light modulation unit: modulating means for changing one or more of the intensity, polarization parameter and focal length of the initial incident light; and the monitoring device is used for monitoring the incident light information of the first incident light and feeding the incident light information back to the control system.
8. The semiconductor inspection device according to claim 7, wherein the incident light information includes: power, light intensity, polarization parameters, and light pulse parameters.
9. The semiconductor inspection apparatus of claim 5, wherein the incident light system further comprises: and the second light source is used for emitting second incident light to the wafer to be detected, and the second incident light is reflected by the wafer to be detected to form second reflected light.
10. The semiconductor inspection device according to claim 9, further comprising: and the additional signal acquisition system is used for acquiring an additional optical signal according to the second reflected light and transmitting the additional optical signal to the control system.
11. The semiconductor inspection apparatus of claim 9, wherein the incident light system further comprises: the second incident light modulation unit is used for modulating the second incident light and then transmitting the modulated second incident light to the surface of the wafer to be detected.
12. The semiconductor inspection device according to claim 1, further comprising: and the additional signal acquisition system is used for acquiring an additional optical signal from the first reflected light and transmitting the additional optical signal to the control system.
13. The semiconductor inspection device according to claim 1, further comprising: and the main signal acquisition system is used for acquiring the nonlinear optical signal and transmitting the nonlinear optical signal to the control system.
14. The semiconductor inspection apparatus of claim 1, wherein the optical signal sorting system comprises: a filter for forming a first transition optical signal by a portion of the first reflected light having a preset wavelength range; and a polarizer for passing the first transition optical signal having a preset polarization parameter to form the nonlinear optical signal.
15. The semiconductor inspection apparatus of claim 1, wherein the optical signal sorting system comprises: a polarizer for passing a portion of the first reflected light having a predetermined polarization parameter to form a second transition optical signal; and a filter for passing the second transition optical signal having a preset wavelength range to form the nonlinear optical signal.
16. The semiconductor inspection device according to claim 1, wherein the carrier device comprises: the bearing disc is used for bearing the wafer to be detected; the fixing device is arranged on the bearing disc and used for fixing the wafer to be detected on the surface of the bearing disc; and the mechanical moving assembly is used for driving the bearing disc to move.
17. The semiconductor inspection device of claim 16, wherein the securing means is a vacuum chuck or a snap fit secured to an edge of the carrier plate.
18. The semiconductor inspection device according to claim 1, further comprising: focusing unit: for focusing the first incident light on the surface of the unit to be inspected.
19. The semiconductor inspection device according to claim 1, further comprising: an optical collimation unit: the optical signal sorting system is used for collimating the first reflected light and enabling the collimated first reflected light to be incident to the optical signal sorting system.
20. A detection method using the semiconductor detection device according to any one of claims 1 to 19, comprising:
providing a wafer to be detected;
transmitting first incident light to the wafer to be detected, wherein the first incident light is reflected by the wafer to be detected to form first reflected light, the nonlinear optical signal is coupled with an electric field induction signal generated in the wafer to be detected, and the electric field induction signal is generated due to the change of space charge distribution in an interface state charge or an inherent charge induction substrate;
acquiring the first reflected light and sorting nonlinear optical signals from the first reflected light;
acquiring first defect information of the wafer to be detected according to the nonlinear optical signal, wherein the first defect information comprises interface electrical attribute defects, and the interface electrical attribute defects comprise: interface state charge well defects, intrinsic charge distribution of the dielectric layer and defects, and substrate semiconductor doping concentration.
21. The inspection method of claim 20, wherein the wafer under test comprises: the substrate and the dielectric layer positioned on the surface of the substrate.
22. The inspection method of claim 21, wherein the first defect information includes an interface electrical property defect at an interface between the substrate and a dielectric layer.
23. The inspection method of claim 20, wherein the wafer under test comprises: a substrate, and a semiconductor layer located on the surface of the substrate; the semiconductor layer is made of a compound semiconductor material or an elemental semiconductor material.
24. The method of detecting according to claim 23, wherein the compound semiconductor material comprises gallium arsenide, gallium nitride, or silicon carbide; the forming process of the semiconductor layer includes an epitaxial process.
25. The inspection method of claim 23, wherein the first defect information includes: crystal structure defects, stress distribution within the semiconductor layer, and epitaxial thickness of the semiconductor layer.
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| CN112485272B (en) * | 2020-12-14 | 2021-11-09 | 紫创(南京)科技有限公司 | Semiconductor detection device and detection method |
| CN112986191A (en) * | 2021-02-23 | 2021-06-18 | 紫创(南京)科技有限公司 | Semiconductor detection device and detection method |
| CN113325004B (en) * | 2021-07-07 | 2023-03-31 | 上海超硅半导体股份有限公司 | Method and device for detecting surface defects of semiconductor wafer |
| CN115266758B (en) * | 2022-09-27 | 2022-12-23 | 苏州高视半导体技术有限公司 | Wafer detection system, wafer detection method, electronic device and storage medium |
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| CN1496478A (en) * | 2001-02-14 | 2004-05-12 | Ӧ�ò��Ϲ�˾ | Laser scanning wafer inspection using nonlinear optical phenomena |
| JP2007040909A (en) * | 2005-08-05 | 2007-02-15 | Hitachi High-Technologies Corp | Apparatus and method for inspecting defect |
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