CN111307956B - Guided wave signal excitation circuit based on linear frequency modulation signal - Google Patents

Abstract

The invention discloses a guided wave signal excitation circuit based on a linear frequency modulation signal, namely a programmable, high-power, high-amplitude and easy-to-use guided wave excitation circuit capable of exciting a wideband linear Chirp signal, which comprises a Chirp signal waveform synthesis circuit, a passive low-pass filter circuit, a gain amplification circuit, a power amplification circuit, a switch direct current boost circuit (boost circuit) and an FPGA control circuit. The Chirp signal waveform synthesis circuit may output an original linear Chirp signal. The original linear Chirp signal is taken as input to enter a passive low-pass filter circuit, so that spurious phenomena brought by a Chirp signal waveform synthesis circuit are eliminated, and the denoised linear Chirp signal is output. The linear Chirp signal after denoising is amplified in two stages through the gain amplifying circuit and the power amplifying circuit, and then the low voltage can be further stably increased to 300V high voltage through the boost circuit, and finally the linear Chirp signal after boosting is output. The circuit provides an effective technical means for realizing sweep frequency test and multi-mode and multi-frequency band detection by ultrasonic guided waves.

Description

A guided wave signal excitation circuit based on chirp signal

technical field

An ultrasonic guided wave excitation circuit that can generate linear frequency modulation signals for exciting piezoelectric transducers has been realized, which belongs to the field of nondestructive testing

Background technique

Ultrasonic guided wave testing technology is a long-distance, fast, and large-scale non-destructive testing method. It uses line scanning to detect the surface and internal conditions of the test piece, and can even detect special parts that cannot be reached by conventional testing methods. defect. At the same time, it has the advantages of short time, high efficiency, high flexibility, strong applicability, no harm to human body and environment, and can spread in liquid and solid. This technology has been applied to pipelines, road bridges, adhesive welding quality, Multiple testing fields such as composite materials. The core of this technology is to excite the ultrasonic guided wave suitable for propagating in the detection object. The common ultrasonic guided wave excitation signal is a sinusoidal signal modulated by a narrow-band window function to suppress the dispersion to the greatest extent, but the frequency range of the excitation signal is limited, which reduces the universality of the ultrasonic guided wave for complex components. Recently, there are two kinds of guided wave detection equipment widely used in the world, namely WaveMarker of British GUL Company and MsSR3030 guided wave detection system developed by Southwest Research Institute of the United States. Single modality to implement defect detection. Since the excitation circuits in these devices can only generate certain fixed types of narrow-band pulses, they do not have the function of exciting piezoelectric transducers to generate wide-frequency waveforms, which greatly limits the further development of guided wave detection technology. The frequency bandwidth of the linear Chirp signal can be obtained by post-processing the received echo signal, which is equivalent to the received echo signal when excited by the sine wave signal modulated by the window function, and the frequency of the modulated sine wave can be any frequency within the frequency band of the linear Chirp signal , to provide effective technical means for ultrasonic guided wave sweep test and multi-mode, multi-band detection.

Contents of the invention

The object of the present invention is to provide a guided-wave signal excitation circuit based on a chirp signal, that is, a programmable, high-power, high-amplitude, and easy-to-use guided-wave excitation circuit that can excite a broadband linear Chirp signal.

The design of guided wave signal excitation circuit based on chirp signal includes Chirp signal waveform synthesis circuit, passive low-pass filter circuit, gain amplifier circuit, power amplifier circuit and switching DC boost circuit (boost boost circuit), FPGA control circuit. The chirp signal waveform synthesis circuit can realize various functions such as mode selection, frequency modulation, phase modulation and amplitude modulation of the excitation signal, and output the original linear chirp signal. However, the chirp signal waveform synthesis circuit will introduce errors due to phase truncation, resulting in the original linear chirp signal being mixed with a large part of the noise signal. The passive low-pass filter circuit can realize the function of an elliptical low-pass filter. Its passband and stopband are jittered, but the transition band is relatively narrow and falls rapidly, which can eliminate the spurious excitation signal brought by the Chirp signal waveform synthesis circuit. Phenomenon, the original linear Chirp signal is input into the passive low-pass filter circuit, and the denoised linear Chirp signal will be output. At the same time, in order to meet the needs of large-scale and long-distance detection, it is necessary to ensure that a signal with greater energy is obtained. Therefore, the linear Chirp signal after denoising needs to be amplified in two stages through a gain amplification circuit and a power amplifier, and the amplified linear Chirp signal is output. The boost boost circuit can further increase the low-voltage amplified linear Chirp signal to a high voltage of 300V stably, and output the boosted linear Chirp signal, and the voltage can be realized by using the FPGA control circuit to adjust the PWM signal .

The FPGA control circuit controls the entire process of waveform data transmission, storage, waveform synthesis, and program-controlled amplification.

Described Chirp signal waveform synthesis circuit is characterized in that: high-speed, high-performance orthogonal digital-to-analog converter is arranged in the core chip in Chirp signal waveform synthesis circuit, can generate original linear Chirp signal, the original linear Chirp signal voltage of output Amplitude is in the lower range.

The passive low-pass filter circuit is characterized in that: the passive low-pass filter circuit realizes the function of a 7-order elliptic low-pass filter, the low-pass bandwidth of the filter is greater than or equal to 10MHz, the cut-off frequency is high, and the attenuation is large, which can effectively Eliminate the signal spurious phenomenon introduced by the phase truncation phenomenon of the Chirp signal waveform synthesis circuit, and output the denoised linear Chirp signal.

The gain amplification circuit is characterized in that it can realize signal gain amplification of 0-30dB, amplify the voltage of the linear Chirp signal after denoising, and output the linear Chirp signal after the amplified voltage.

The power amplifying circuit is characterized in that the output voltage can reach plus or minus 225V during power supply, the power supply voltage is provided by a boost circuit, the output current can reach a higher level, and it has a high power supply voltage rejection ratio, which can ensure that the circuit is resistant to power supply noise. With effective suppression ability, the linear Chirp signal after amplifying the voltage is used as the input and output, and the amplified linear Chirp signal is finally output.

The power amplifying circuit is characterized in that: R95 and C112 are connected in series to the power amplifying circuit to form an external RC network of the power amplifying circuit to increase the stability of the operational amplifier and expand the frequency band, and the closed-loop bandwidth can reach at least 1MHz. One end of R94 is grounded, and the other end is connected to the output end of the amplified linear Chirp signal, which becomes a load resistor and improves the ability to drive the load.

The boost boost circuit is characterized in that: the linear Chirp signal after the amplification is used as the circuit input signal, and the output is the linear Chirp signal after the boost, and the voltage level of the linear Chirp signal after the boost is mainly determined by the PWM signal output by the FPGA control circuit. The duty cycle is determined, and the boost booster circuit is mainly composed of a digital signal isolation circuit, a feedback loop, a hardware PI circuit, a switching power supply circuit and a boost circuit.

The digital signal isolation circuit is characterized in that: the optocoupler device 6N137S is used to isolate signal transmission. The PWM signal is the signal output by the FPGA. The optocoupler output is inverted by the transistor Q7 and then output to the shaping circuit comparator TLC2272CD. Its output signal is passed through a passive low-pass filter to output a stable DC voltage to control U1. The size of U1 is related to the PWM duty. The ratio is linear.

The feedback loop is characterized in that: after the high-voltage input HIGH-VOLTAGE is divided by R74 and R79, it is input to the operational amplifier that can isolate the input and output as a voltage follower, eliminating the influence of the subsequent stage circuit on the voltage division of R74 and R79 .

The hardware PI circuit is characterized in that: the proportional integral circuit TLC2272CD principle is adopted, and the output voltage difference between the control U1 and the feedback loop determines the output value of the control voltage U2.

The FPGA control circuit and switching power supply circuit are characterized in that: the frequency of the PWM signal output by the FPGA control circuit is determined by C104 and R90, and the frequency of the output PWM can be adjusted by adjusting R25. When the internal transistor of TL494 is turned on, the power supply is 12V It is added to the base of the transistor Q9 through C1, E1 and R90, the transistor Q9 is turned on, Q8 is turned off, the U18 power transistor is turned on, and the PWM signal output is high. When the internal transistor is turned off, since the base current is zero, the triode Q9 is turned off, Q8 is turned on, the gate capacitance of the power tube is discharged through the collector junction path of Q8, and the PWM signal output is low.

The switching power supply circuit is characterized in that: the inductor L11 and C99, C100 form a filter circuit, and R75 is a load. When the PWM signal is low, the diode D23 is reverse-biased and cut off, and the 12V voltage charges L10. When the PWM signal is high, the diode D23 is forward-biased and turned on, and the 12V voltage and the induced electromotive force of L10 charge C7 through D23. Realize HIGH-VOLTAGE high voltage output.

The boost circuit is characterized in that: the inductor L11 and C99, C100 form a filter circuit, and R75 is a load. When the PWM signal is low, the diode D23 is reverse-biased and cut off, and the 12V voltage charges L10. When the PWM signal is high, the diode D23 is forward-biased and turned on, and the 12V voltage and the induced electromotive force of L10 charge C7 through D23. Realize HIGH-VOLTAGE high voltage output.

Description of drawings

Fig. 1 is a schematic block diagram of a guided wave signal excitation circuit based on a chirp signal;

Figure 2 Chirp signal waveform synthesis circuit design diagram

Figure 3 passive low-pass filter circuit;

Fig. 4 gain amplification circuit design diagram;

Figure 5 power amplifier circuit design diagram;

Fig. 6 Design diagram of digital signal isolation circuit;

Fig. 7 Feedback loop and hardware PI circuit design diagram;

Figure 8 Switching power supply circuit design diagram;

Figure 9 boost circuit design as shown in the figure;

Figure 10 Chirp signal test result diagram;

Figure 11 Chirp signal spectrum analysis diagram;

Detailed ways

Below in conjunction with accompanying drawing and embodiment the present invention will be further described:

The design of the guided wave signal excitation circuit based on the chirp signal includes a Chirp signal waveform synthesis circuit, a passive low-pass filter circuit, a gain amplifier circuit, a power amplifier circuit and a switch DC boost circuit

(boost step-up circuit), FPGA control circuit, and the principle block diagram of the guided wave signal excitation circuit based on the chirp signal is shown in Fig. 1 .

The FPGA in this embodiment is the Kintex-7XC7K70T chip of Xilinx Company. FPGA controls the entire process of waveform data transmission, storage, waveform synthesis, and program-controlled amplification. The core chip of the Chirp signal waveform synthesis circuit adopts AD9854, and its working mode is set to Chirp (Mode011) mode. The design diagram of the Chirp signal waveform synthesis circuit is shown in Figure 2. The Chirp signal waveform synthesis circuit has two 12-bit high-speed, high-performance orthogonal digital-to-analog converters, which can convert the signal into the original linear Chirp signal. At this time, the output signal voltage amplitude is about 0.3-0.5V, and due to its own circuit The existence of phase truncation will introduce signal errors, after which the original linear Chirp signal enters the passive low-pass filter circuit.

The passive low-pass filter circuit in this example implements the function of a 7th-order elliptic low-pass filter, and the passive low-pass filter circuit is shown in Figure 3. The low-pass bandwidth of the filter is 10MHz, and when the cutoff frequency is 12.1MHz, the attenuation is 70.3dB, which can effectively eliminate the spurious phenomenon of the excitation signal caused by the Chirp signal waveform synthesis circuit, and output the original linear Chirp signal as a denoised linear The chirp signal, and then the denoised linear chirp signal enters the gain amplifier circuit.

The core chip of the gain amplifier circuit in this example is MAX437. The circuit design is shown in Figure 4. This circuit can achieve a gain of 0-30dB for the excitation signal, and amplify the denoised linear Chirp signal with an original voltage amplitude of 0.3-0.5V. It is a voltage signal of 0-10V. In the guided wave detection process, the higher the excitation frequency, the higher the detection accuracy, and the faster the guided wave energy decays. In order to ensure that the signal has sufficient energy, the amplified 0-10V voltage signal will enter the power amplifier circuit.

The core chip used in the power amplifier circuit in this example is PA98. The design of the power amplifier circuit is shown in Figure 5, and the output signal is an amplified linear Chirp signal. The output voltage of PA98 double-terminal power supply can reach plus or minus 225V, the power supply voltage is provided by the boost circuit, the output current can reach 200mA, the slew rate under the external compensation capacitor is 400V/μs, and the maximum input offset voltage is 0.5mV, which has a high The power supply voltage rejection ratio can ensure that the circuit has an effective ability to suppress power supply noise. R95 and C112 in the circuit constitute the external RC network of PA85, which can increase the stability of the op amp and expand the frequency band. The values of phase compensation capacitor R95 and resistor C112 are 3.3pF and 100R respectively, and the closed-loop bandwidth can reach 1MHz. One end of R94 is grounded, and the other end is connected to the output end of the amplified linear Chirp signal. R93 is a current limiting resistor, and R94 is a load resistor. flow resistance, and ultimately limit the current to 165mA.

The voltage level of the boosted linear Chirp signal output by the boost boost circuit in this example is mainly determined by the duty cycle of the PWM output by the FPGA control circuit. This circuit is mainly composed of a digital signal isolation circuit, a feedback loop, a hardware PI circuit, and a switch. Power circuit and boost circuit.

The digital signal isolation circuit design in this example is shown in Figure 6. In order to prevent the subsequent circuit from interfering with the FPGA circuit, the optocoupler device 6N137S is used to isolate the signal transmission. The PWM signal is the signal output by the FPGA. The optocoupler output is inverted by the transistor Q7 and then output to the shaping circuit comparator TLC2272CD. Its output signal is passed through a passive low-pass filter to output a stable DC voltage to control U1. The size of U1 is related to the PWM duty. The ratio is linear.

The design diagram of the feedback loop and hardware PI circuit in this example is shown in Figure 7. After the high-voltage input HIGH-VOLTAGE of the feedback loop is divided by R74 and R79 with a resistance ratio of 100:1, it is input to the circuit that can isolate the input and output. Putting it as a voltage follower can eliminate the influence of the subsequent circuit on the voltage division of R74 and R79. The hardware PI circuit mainly uses the principle of the proportional integral circuit TLC2272CD to control the output voltage difference between U1 and the feedback loop to determine the output value of the control voltage U2.

The core of the switching power supply circuit in this example is TL494, and the circuit design is shown in Figure 8. The frequency of the output PWM signal is determined by C104 and R90, and the frequency of the output PWM can be adjusted by adjusting R25. When the internal transistor of TL494 is turned on, the power supply 12V is applied to the base of the transistor Q9 through C1, E1 and R90, and the transistor Q9 is turned on. Q8 is cut off, U18 power tube is turned on, and the PWM signal output is high. When the internal transistor is turned off, since the base current is zero, the triode Q9 is turned off, Q8 is turned on, the gate capacitance of the power tube is discharged through the collector junction path of Q8, and the PWM signal output is low.

The boost circuit design in this example is shown in Figure 9. Inductor L11 and C99, C100 form a filter circuit, and R75 is a load. When the PWM signal is low, the diode D23 is reverse-biased and cut off, and the 12V voltage charges L10. When the PWM signal is high, the diode D23 is forward-biased and turned on, and the 12V voltage and the induced electromotive force of L10 charge C7 through D23. Realize HIGH-VOLTAGE high voltage output.

Use the guided wave signal excitation circuit based on the chirp signal in this example to test. First, download the FPGA logic control program to the FPGA development board. By setting the excitation start frequency to 450kHz, the frequency resolution to 10kHz, and the stop frequency to 650kHz, the test The results are shown in Figure 10. See Figure 11 by performing spectrum analysis on the excited Chirp signal. It can be seen that the jitter is relatively large in the frequency band range of the signal, but the frequency band range is basically consistent with the set frequency band parameters.

Finally, it should be noted that the above embodiments only illustrate the present invention and do not limit the technical solutions described in the present invention. Therefore, although the specification has described the present invention in detail with reference to the above-mentioned embodiments, those of ordinary skill in the art It should be understood that the present invention can still be modified or equivalently replaced, and all technical solutions and improvements that do not depart from the spirit and scope of the invention should be covered by the claims of the present invention.

Claims (13)

1. The utility model provides a but, high-power, high-amplitude, easy-to-use guided wave excitation circuit of broadband linear Chirp signal can be excited to guided wave signal excitation circuit based on Chirp signal, includes Chirp signal waveform synthesis circuit, passive low pass filter circuit, gain amplifier circuit, power amplifier circuit and switch direct current boost circuit, FPGA control circuit, its characterized in that:

a) The Chirp signal waveform synthesis circuit can realize the functions of mode selection, frequency modulation, phase modulation and amplitude modulation of the excitation signal, output the original linear Chirp signal,

b) The passive low-pass filter circuit can realize the function of an elliptic low-pass filter, the passband and the stopband of the elliptic low-pass filter are jittering, but the transition band is narrower than the passband and drops rapidly, so that the signal spurious phenomenon brought by the Chirp signal waveform synthesis circuit can be eliminated, the original linear Chirp signal enters the passive low-pass filter circuit as input, the output denoised linear Chirp signal,

c) The denoised linear Chirp signal is used as input and sequentially enters a gain amplifying circuit and a power amplifying circuit,

realizes the two-stage amplification process of the denoised linear Chirp signal, outputs the amplified linear Chirp signal with larger energy, realizes the large-range long-distance detection,

the amplified linear Chirp signal is used as input to enter a switch direct current booster circuit, the low voltage is stably boosted to 300V high voltage, the boosted linear Chirp signal is output, and the voltage can be controlled by an FPGA (field programmable gate array) by utilizing the adjustment of PWM (pulse Width modulation) signals output by the FPGA control circuit.

2. The guided wave signal excitation circuit of claim 1, wherein: a core chip in the Chirp signal waveform synthesis circuit is provided with a high-speed and high-performance orthogonal digital-analog converter, so that an original linear Chirp signal is generated, and the voltage amplitude of the output original linear Chirp signal is reduced.

3. The guided wave signal excitation circuit of claim 1, wherein: the passive low-pass filter circuit realizes the function of a 7-order elliptic low-pass filter, the low-pass bandwidth of the filter is more than or equal to 10MHz, the cut-off frequency is high, the attenuation is large, the signal spurious phenomenon introduced by the Chirp signal waveform synthesis circuit due to phase truncation is removed, and the linear Chirp signal after noise removal is output.

4. The guided wave signal excitation circuit of claim 1, wherein: the gain amplifying circuit realizes gain amplification of 0-30 dB of the signal, amplifies the voltage of the linear Chirp signal after denoising, and outputs the amplified voltage of the linear Chirp signal.

5. The guided wave signal excitation circuit of claim 1, wherein: when the power amplifying circuit supplies power, the amplitude of the output voltage is positive and negative 225V, the power supply voltage is provided by the switch direct current booster circuit, the output current has high power supply voltage suppression ratio and is used for guaranteeing that the circuit has effective suppression capability on power supply noise, the amplified voltage is taken as an input and output linear Chirp signal, and finally the amplified linear Chirp signal is output.

6. The guided wave signal excitation circuit of claim 1 or 5, wherein: the power amplifying circuit R95 and the power amplifying circuit C112 are connected in series and then connected into the power amplifying circuit to form an external RC network of the power amplifying circuit, and the external RC network is used for increasing the stability of the operational amplifier and expanding the frequency band, and the bandwidth of the closed loop is larger than 1MHz; one end of the R94 is grounded, and the other end of the R94 is connected with the amplified linear Chirp signal output end to become a load resistor, so that the capacity of driving a load is improved.

7. The guided wave signal excitation circuit of claim 1, wherein: the switching direct current boost circuit is also called a boost circuit, the linear Chirp signal after the amplification of the switching direct current boost circuit is used as a circuit input signal and is output as a boosted linear Chirp signal, the voltage of the boosted linear Chirp signal is determined by the duty ratio of a PWM signal output by the FPGA control circuit, and the boost circuit consists of a digital signal isolation circuit, a feedback loop, a hardware PI circuit, a switching power supply circuit and a boost circuit.

8. The guided wave signal excitation circuit of claim 7, wherein: the digital signal isolation circuit adopts an optocoupler 6N137S to isolate signal transmission; the PWM signal is a signal output by the FPGA control circuit, the output of the optocoupler is inverted by the triode Q7 and then is output to the shaping circuit comparator TLC2272CD, the output signal of the optocoupler is subjected to passive low-pass filtering to output stable direct-current voltage control U1, and the size of the U1 and the duty ratio of the PWM signal are in a linear relation.

9. The guided wave signal excitation circuit of claim 7, wherein: after the HIGH-VOLTAGE input HIGH-VOLTAGE of the feedback loop is divided by R74 and R79, the HIGH-VOLTAGE input HIGH-VOLTAGE is input into an operational amplifier which can isolate input and output and is used as a VOLTAGE follower, and the influence of a later-stage circuit on the R74 and R79 VOLTAGE is eliminated.

10. The guided wave signal excitation circuit of claim 7, wherein: the hardware PI circuit adopts the principle of a proportional integral circuit TLC2272CD, and the output voltage difference value of the control U1 and the feedback loop determines the output size of the control voltage U2.

11. The guided wave signal excitation circuit of claim 7, wherein: the frequencies of PWM signals output by the FPGA control circuit in the FPGA control circuit and the switching power supply circuit are determined by C104 and R90, the frequency of PWM output can be adjusted by adjusting R25, when the transistor in TL494 is conducted, the power supply 12V is added to the base electrode of the triode Q9 through C1, E1 and R90, the triode Q9 is conducted, the Q8 is cut off, the U18 power tube is conducted, and the PWM signal output is high; when the internal transistor is turned off, the base current is zero, so that the triode Q9 is turned off, the triode Q8 is turned on, the grid capacitor of the power tube discharges through the collecting junction channel of the triode Q8, and the PWM signal output is low.

12. The guided wave signal excitation circuit of claim 7 or 10, wherein: the switching power supply circuit inductance L11, the C99 and the C100 form a filter circuit, and R75 is a load; when the PWM signal is low, diode D23 reverse biases off, 12V charges L10; when the PWM signal is high, the diode D23 is forward biased to be conducted, and the induced electromotive force of the voltage of 12V and the voltage of L10 charges C7 through the D23, so that high-voltage output is realized.

13. The guided wave signal excitation circuit of claim 7, wherein: the boost circuit comprises an inductor L11, a filter circuit formed by C99 and C100, and R75 is a load; when the PWM signal is low, the diode D23 is reversely biased and cut off, the 12V VOLTAGE is L10 to be charged, when the PWM signal is HIGH, the diode D23 is positively biased and conducted, the 12V VOLTAGE and the induced electromotive force of the L10 are charged to C7 through the D23, and HIGH-VOLTAGE output is achieved.