CN111307867B - Display panel, crack detection method thereof and display device - Google Patents
Display panel, crack detection method thereof and display device Download PDFInfo
- Publication number
- CN111307867B CN111307867B CN202010108123.2A CN202010108123A CN111307867B CN 111307867 B CN111307867 B CN 111307867B CN 202010108123 A CN202010108123 A CN 202010108123A CN 111307867 B CN111307867 B CN 111307867B
- Authority
- CN
- China
- Prior art keywords
- crack detection
- detection
- crack
- trace
- display panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Analytical Chemistry (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- Electrochemistry (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Position Input By Displaying (AREA)
Abstract
The invention provides a display panel, a crack detection method thereof and a display device, wherein the display panel comprises: the display area comprises an array substrate layer and a touch detection layer, and the array substrate layer is provided with data lines; the non-display area surrounds the display area, the non-display area comprises a first crack detection wire and a second crack detection wire, the first crack detection wire is arranged corresponding to the array substrate layer, the second crack detection wire is arranged corresponding to the touch detection layer, and the first end of the first crack detection wire and the first end of the second crack detection wire are both connected with the data line; the first input end is connected with the second end of the first crack detection wire through the control circuit, and the second input end is connected with the second end of the second crack detection wire through the control circuit. Therefore, the detection of the cracks of the array substrate layer and the touch detection layer can be realized at the same time, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of the crack detection of the display panel is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a display device and a crack detection method of the display panel.
Background
One of the disadvantages of the flexible AMOLED (Active-matrix organic light-emitting diode) is that the edge is weak and is prone to generate a Crack (i.e. Crack), and in order to detect the Crack of the display panel, the related art usually designs a Crack detection loop on the array substrate layer to detect the Crack of the display panel.
However, the related art has a problem in that only cracks on the array substrate layer can be detected, and cracks of the touch detection layer cannot be detected, so that crack detection of the display panel is not accurate.
Disclosure of Invention
The present invention is directed to solving, at least in part, one of the technical problems in the related art.
Therefore, a first objective of the present invention is to provide a display panel, so as to detect a crack of an array substrate layer and a crack of a touch detection layer, and improve the accuracy of crack detection of the display panel.
A second object of the present invention is to provide a display device.
The third objective of the present invention is to provide a crack detection method for a display panel.
To achieve the above object, an embodiment of a first aspect of the present invention provides a display panel, including: the display area comprises an array substrate layer and a touch detection layer, and the array substrate layer is provided with data lines; a non-display area surrounding the display area, the non-display area including a first crack detection trace arranged corresponding to the array substrate layer and a second crack detection trace arranged corresponding to the touch detection layer, a first end of the first crack detection trace and a first end of the second crack detection trace both connected to the data line; the first input end is connected with the second end of the first crack detection wire through the control circuit, and the second input end is connected with the second end of the second crack detection wire through the control circuit.
According to the display panel provided by the embodiment of the invention, the display area comprises the array substrate layer and the touch detection layer, the array substrate layer is provided with the data lines, the non-display area comprises the first crack detection line and the second crack detection line, the first crack detection line is arranged corresponding to the array substrate layer, the second crack detection line is arranged corresponding to the touch detection layer, the first end of the first crack detection line and the first end of the second crack detection line are both connected with the data lines, the first input end is connected with the second end of the first crack detection line through the control circuit, and the second input end is connected with the second end of the second crack detection line through the control circuit. Therefore, the display panel provided by the embodiment of the invention can simultaneously detect the cracks of the array substrate layer and the touch detection layer, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of crack detection of the display panel is improved.
According to an embodiment of the present invention, the second end of the second crack detection trace is also grounded.
According to an embodiment of the invention, the control circuit comprises: a first transistor, a first electrode of which is connected to a second end of the first crack detection trace, a second electrode of which is connected to the first input end, and a control electrode of which is connected to the second input end; a first pole of the second transistor is connected to a second end of the second crack detection trace, a second pole of the second transistor is connected to the second input end, and a control pole of the second transistor is connected to the first input end.
According to an embodiment of the present invention, the control circuit is configured to, in each detection frame period in the crack detection state, first write the first input signal received by the first input end into the second end of the first crack detection trace, and then write the second input signal received by the second input end into the second end of the second crack detection trace, or, the control circuit first writes the second input signal received by the second input end into the second end of the second crack detection trace, and then writes the first input signal received by the first input end into the second end of the first crack detection trace.
According to an embodiment of the present invention, the second crack detection trace includes a first detection section and a second detection section, the first detection section is disposed on the same layer as the first metal layer in the touch detection layer, the second detection section is disposed on the same layer as the second metal layer in the touch detection layer, a first end of the first detection section is used as a first end of the second crack detection trace, a second end of the first detection section is connected to the first end of the second detection section through a through hole, and a second end of the second detection section is used as a second end of the second crack detection trace.
According to one embodiment of the invention, the first detection segment and the second detection segment are arranged in parallel with respect to each other.
According to an embodiment of the present invention, the first crack detection trace, the second crack detection trace, and the control circuit are all multiple, a first end of the first crack detection trace and a first end of the second crack detection trace are respectively connected to the data lines in a one-to-one correspondence manner, and a second end of the first crack detection trace and a second end of the second crack detection trace are respectively connected to the control circuits in a one-to-one correspondence manner.
According to an embodiment of the present invention, the first crack detection trace and the second crack detection trace are two, the two first crack detection traces are symmetrically disposed about the display area, and the two second crack detection traces are symmetrically disposed about the display area.
In order to achieve the above object, a second embodiment of the invention provides a display device, which includes the display panel.
According to the display device provided by the embodiment of the invention, the detection of the cracks of the array substrate layer and the touch detection layer can be realized at the same time through the arranged display panel, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of the crack detection of the display panel is improved.
In order to achieve the above object, an embodiment of a third aspect of the present invention provides a crack detection method for a display panel, where the display panel includes a display area and a non-display area surrounding the display area, the display area includes an array substrate layer and a touch detection layer, the array substrate layer is provided with data lines, the non-display area includes first crack detection traces arranged corresponding to the array substrate layer and second crack detection traces arranged corresponding to the touch detection layer, a first end of each of the first crack detection traces and a first end of each of the second crack detection traces are connected to the data lines, and the method includes the following steps: determining that the display panel is in a crack detection state; in each detection frame period in the crack detection state, first writing a first input signal received by the first input end into the second end of the first crack detection trace, and then writing a second input signal received by the second input end into the second end of the second crack detection trace, or writing a second input signal received by the second input end into the second end of the second crack detection trace, and then writing a first input signal received by the first input end into the second end of the first crack detection trace.
According to the crack detection method of the display panel, the display panel is determined to be in a crack detection state, and in each detection frame period in the crack detection state, a first input signal received by a first input end is written into a second end of a first crack detection wire, and then a second input signal received by a second input end is written into a second end of a second crack detection wire, or a second input signal received by the second input end is written into a second end of the second crack detection wire, and then a first input signal received by the first input end is written into a second end of the first crack detection wire. Therefore, the method for detecting the cracks of the display panel can simultaneously detect the cracks of the array substrate layer and the cracks of the touch detection layer, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of detecting the cracks of the display panel is improved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a block diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is a circuit schematic diagram of a display panel according to one embodiment of the present invention;
FIG. 3 is a control timing diagram of a display panel according to an embodiment of the present invention;
fig. 4 (a) is a schematic view illustrating a crack detection effect of an array substrate layer and a touch detection layer of a display panel according to an embodiment of the invention;
fig. 4 (b) is a schematic diagram illustrating crack detection effects of an array substrate layer and a touch detection layer of a display panel according to another embodiment of the invention;
fig. 4 (c) is a schematic view illustrating a crack detection effect of an array substrate layer and a touch detection layer of a display panel according to another embodiment of the invention;
fig. 4 (d) is a schematic diagram illustrating crack detection effects of an array substrate layer and a touch detection layer of a display panel according to still another embodiment of the invention;
FIG. 5 is a schematic cross-sectional view illustrating a touch detection layer of a display panel according to an embodiment of the invention;
FIG. 6 is a schematic diagram illustrating a location of a first crack detection trace of a display panel according to an embodiment of the invention;
FIG. 7 is a schematic diagram illustrating a second crack detection trace of a display panel according to an embodiment of the invention;
FIG. 8 is a flowchart illustrating a crack detection method of a display panel according to an embodiment of the invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The following describes a display panel, a crack detection method thereof, and a display device according to an embodiment of the present invention with reference to the drawings.
Fig. 1 is a block diagram of a display panel according to an embodiment of the invention. As shown in fig. 1, the display panel according to the embodiment of the present invention includes: a display area 10, a non-display area 20, a first input PCD1, a second input PCD2 and a control circuit 50.
The display area 10 comprises an array substrate layer 101 and a touch detection layer 102, wherein the array substrate layer 101 is provided with a data line data; the non-display area 20 surrounds the display area 10, the non-display area 20 includes a first crack detection trace 201 arranged corresponding to the array substrate layer 101 and a second crack detection trace 202 arranged corresponding to the touch detection layer 102, and a first end of the first crack detection trace 201 and a first end of the second crack detection trace 202 are both connected to the data line data; the first input end PCD1 is connected to the second end of the first crack detection trace 201 through the control circuit 50, and the second input end PCD2 is connected to the second end of the second crack detection trace 202 through the control circuit 50.
It should be noted that, in the embodiment of the present invention, both the first crack detection trace 201 and the second crack detection trace 202 are designed as a loop.
Therefore, by controlling the time sequence of the signals input to the first input end PCD1 and the second input end PCD2, the detection of the crack of the array substrate layer 101 and the crack of the touch detection layer 102 can be simultaneously realized, so that the process risk caused by the crack of the touch detection layer can be reduced, and the accuracy of crack detection of the display panel can be improved.
Further, according to an embodiment of the present invention, as shown in fig. 2, the second end of the second crack detection trace 202 is also grounded to GND.
It can be understood that the second crack detection trace 202 of the embodiment of the invention further has an electrostatic protection function, and specifically, in a non-crack detection state, the second end of the second crack detection trace 202 is kept to be grounded to the GND signal, so as to play an electrostatic protection function.
Specifically, according to an embodiment of the present invention, as shown in fig. 2, the control circuit 50 includes: a first transistor T1 and a second transistor T2, wherein a first pole of the first transistor T1 is connected to the second end of the first crack detection trace 201, a second pole of the first transistor T1 is connected to the first input end PCD1, and a control pole of the first transistor T1 is connected to the second input end PCD2; a first pole of the second transistor T2 is connected to the second end of the second crack detection trace 202, a second pole of the second transistor T2 is connected to the second input end PCD2, and a control pole of the second transistor T2 is connected to the first input end PCD1.
As shown in fig. 2, the first end of the first crack detection trace 201 and the first end of the second crack detection trace 202 are both connected to the second pole of the third transistor T3, the first pole of the third transistor T3 is connected to the data line data, and the control pole of the third transistor T3 is connected to the first control signal terminal SW.
It should be noted that the transistors in the embodiment of the present invention, for example, the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4, may be PNP-type, that is, P-type transistors, or NPN-type, that is, N-type transistors, where the P-type transistors are turned on in a low level condition, and the N-type transistors are turned on in a high level condition, and the P-type transistors are taken as an example for the description of the present invention.
Further, according to an embodiment of the present invention, in each detection frame period in the crack detection state, the control circuit 50 is configured to write the first input signal PCD11 received by the first input terminal PCD1 into the second end of the first crack detection trace 201, and then write the second input signal PCD21 received by the second input terminal PCD2 into the second end of the second crack detection trace 202, or the control circuit 50 writes the second input signal PCD21 received by the second input terminal PCD2 into the second end of the second crack detection trace 202, and then writes the first input signal PCD11 received by the first input terminal PCD1 into the second end of the first crack detection trace 201.
The operation of the embodiment of fig. 2 will be described with reference to the timing diagram of fig. 3.
The PCD11 is a first input signal input by the first input terminal PCD1, the PCD21 is a second input signal input by the second input terminal PCD2, the SW1 is a first control signal input by the first control signal terminal SW, and the VGH1 is a third input signal input by the third input terminal VGH. Note that, in each detection frame period, the first control signal SW1 is always kept at the low potential, and the third input signal VGH1 is always kept at the high potential.
When the control circuit 50 first writes the first input signal PCD11 received by the first input end PCD1 into the second end of the first crack detection trace 201, and then writes the second input signal PCD21 received by the second input end PCD2 into the second end of the second crack detection trace 202:
in the first phase T1, i.e. the first half period of each detection frame period, the first input signal PCD11 is at a high level, the second input signal PCD21 is at a low level, at this time, as shown in fig. 2, the first transistor T1 is turned on, the second transistor T2 is turned off, the second input signal PCD21, i.e. the low level, received by the second input terminal PCD2 cannot be written into the second end of the second crack detection trace 202, the first input signal PCD11, i.e. the high level, received by the first input terminal PCD1 is written into the second end of the first crack detection trace 201 through the first transistor T1, when the array 101 has no crack, the high level of the second end of the first crack detection trace 201 may be written into the second pole of the third transistor T3, and the first control signal SW11 is at a low level in the whole detection frame period, so that the third transistor T3 is turned on, and the data line connected to the first pole of the third transistor T3 is written into a high level. According to the light emitting current calculation formula, when the signal written to the data line data is at a high level, the reflective current is almost zero and is displayed as black, so that the column of the data line data connected to the first electrode of the third transistor T3 is displayed as black.
When the array substrate layer 101 has a crack, the high level of the second end of the first crack detection trace 201 cannot be written into the second pole of the third transistor T3, so that the data line data connected to the first pole of the third transistor T3 is in a floating state, i.e., a low level. As can be seen from the light emission current calculation formula, when the signal written to the data line data is at a low level, the pixel in the column where the data line data connected to the first electrode of the third transistor T3 is located emits light.
In the second stage T2, that is, in the second half period of each detection frame period, the first input signal PCD11 is at a low level, and the second input signal PCD21 is at a high level, at this time, as shown in fig. 2, the first transistor T1 is turned off, the second transistor T2 is turned on, the first input signal PCD11 received by the first input terminal PCD1, that is, the low level signal cannot be written into the second end of the first crack detection trace 201, the second input signal PCD21 received by the second input terminal PCD2, that is, the high level signal is written into the second end of the second crack detection trace 202 through the second transistor T2, when the touch detection layer 102 has no crack, the high level of the second end of the second crack detection trace 202 can be written into the second pole of the third transistor T3, and the first control signal SW1 is at a low level in the whole detection frame period, so that the third transistor T3 is turned on, and the data line connected to the first pole of the third transistor T3 is written into a high level. As can be seen from the light emitting current calculation formula, when the signal written to the data line data is at a high level, the light reflecting current is almost zero, and the display is black, so that the column of the data line data connected to the first electrode of the third transistor T3 is black.
When the touch detection layer 102 has a crack, the high level of the second end of the second crack detection trace 202 cannot be written into the second pole of the third transistor T3, so that the data line data connected to the first pole of the third transistor T3 is in a floating state, i.e., a low level. As can be seen from the light emission current calculation formula, when the signal written to the data line data is at a low level, the pixel in the column where the data line data connected to the first electrode of the third transistor T3 is located emits light.
As can be seen from the above, as shown in fig. 4 (a), 4 (b), 4 (c) and 4 (d), when the array substrate layer 101 has a crack and the touch detection layer 102 has no crack, the level of the signal on the data line data connected to the first pole of the third transistor T3 is first low and then high in one detection frame period, and at this time, the picture shown in fig. 4 (a), i.e., the upper half of the picture, appears as a bright line according to the gate scanning direction. That is, when the upper half of the display screen is displayed as a bright line and the lower half is displayed as a black line, it is indicated that the array substrate layer 101 has a crack, and the touch detection layer 102 has no crack.
When the array substrate layer 101 has no crack and the touch detection layer 102 has a crack, the level of the signal on the data line data connected to the first pole of the third transistor T3 is high first and then low in one detection frame period, and at this time, a picture as shown in fig. 4 (b) appears according to the gate scanning direction, that is, the lower half of the picture is displayed as a bright line. That is, when the upper half of the display screen is displayed as black and the lower half is displayed as bright lines, it is indicated that the array substrate layer 101 has no crack and the touch detection layer 102 has a crack.
When the array substrate layer 101 has a crack and the touch detection layer 102 also has a crack, in a detection frame period, the level of the signal on the data line data connected to the first pole of the third transistor T3 is always floating, i.e., always low, and then according to the gate scanning direction, a picture as shown in fig. 4 (c) appears, i.e., the picture is a through bright line, at this time, the upper half of the picture is displayed as a bright line, and the lower half of the picture is also displayed as a bright line. That is, when the upper half of the display screen is displayed as a bright line and the lower half is also displayed as a bright line, it is described that the array substrate layer 101 has a crack and the touch detection layer 102 also has a crack.
When the array substrate layer 101 has no crack and the touch detection layer 102 has no crack, the level of the signal on the data line data connected to the first electrode of the third transistor T3 is always high in one detection frame period, and a frame as shown in fig. 4 (d) is displayed according to the gate scanning direction, that is, the frame is black, and the upper half of the frame is displayed as black and the lower half of the frame is also displayed as black. That is, when the upper half of the display screen is black and the lower half is also black, it indicates that there is no crack in the array substrate layer 101 and there is no crack in the touch detection layer 102.
Thus, by integrating the crack detection of the array substrate layer 101 and the crack detection of the touch detection layer 102, the crack condition of the array substrate layer 101 and the crack condition of the touch detection layer 102 can be detected simultaneously through one screen.
It should be noted that, under the condition that the control circuit 50 first writes the second input signal PCD2 received by the second input terminal PCD2 into the second end of the second crack detection trace 202, and then writes the first input signal PCD1 received by the first input terminal PCD1 into the second end of the first crack detection trace 201, the working principle of the embodiment of fig. 2 is the same as that under the condition that the control circuit 50 first writes the first input signal PCD1 received by the first input terminal PCD1 into the second end of the first crack detection trace 201, and then writes the second input signal PCD2 received by the second input terminal PCD2 into the second end of the second crack detection trace 202, and details thereof are not repeated here.
According to an embodiment of the invention, as shown in fig. 5, the second crack detection trace 202 includes a first detection section 2021 and a second detection section 2022, the first detection section 2021 is disposed on the same layer as the first metal layer 1021 in the touch detection layer 102, the second detection section 2022 is disposed on the same layer as the second metal layer 1022 in the touch detection layer 102, a first end of the first detection section 2021 is used as a first end of the second crack detection trace 202, a second end of the first detection section 2021 is connected to a first end of the second detection section 2022 through the through hole 60, and a second end of the second detection section 2022 is used as a second end of the second crack detection trace 202.
As shown in fig. 5, the second crack detection trace 202 further includes a third detection section 2023, the third detection section 2023 is disposed on the same layer as the first metal layer 1021 in the touch detection layer 102, a first end of the third detection section 2023 serves as a second end of the second crack detection trace 202, and a second end of the third detection section 2023 is connected to a second end of the second detection section 2022 through the via 60.
Wherein the first detection section 2021 and the second detection section 2022 are disposed relatively in parallel according to an embodiment of the present invention. The third detection section 2023 and the second detection section 2022 are arranged in parallel to each other.
According to an embodiment of the present invention, the first crack detection trace 201, the second crack detection trace 202 and the control circuit 50 are all multiple, the first ends of the first crack detection traces 201 and the first ends of the second crack detection traces 202 are respectively connected to the data lines data in a one-to-one correspondence, and the second ends of the first crack detection traces 201 and the second ends of the second crack detection traces 202 are respectively connected to the control circuits 50 in a one-to-one correspondence. Therefore, the cracks of the display panel can be more accurately detected through the plurality of first crack detection traces 201 and the plurality of second crack detection traces 202.
Specifically, as shown in fig. 2, the first ends of the first crack detection traces 201 and the first ends of the second crack detection traces 202 are respectively connected to the second poles of the third transistors T3 in a one-to-one correspondence manner, and the first poles of the third transistors T3 are respectively connected to the data lines data in a one-to-one correspondence manner.
It should be noted that, the display panel is removed from the data lines data connected to the first poles of the third transistors T3 in a one-to-one correspondence manner, the rest of the data lines data are connected to the first poles of the fourth transistors T4 in a one-to-one correspondence manner, the second poles of the fourth transistors T4 are connected to the third input terminals VGH in a one-to-one correspondence manner, and the control poles of the fourth transistors T4 are connected to the first control signal terminals SW in a one-to-one correspondence manner.
As can be seen from the timing diagram of fig. 3, in a detection frame period, since the first control signal SW1 input by the first control signal terminal SW is always at a low level and the third input signal VGH1 input by the third input terminal VGH is always at a high level, the plurality of fourth transistors T4 are always turned on in the detection frame period, and the high level is written into the plurality of data lines data connected to the first poles of the plurality of fourth transistors T4 in a one-to-one correspondence, so that the picture displayed in the row where the plurality of data lines data connected to the first poles of the plurality of fourth transistors T4 in a one-to-one correspondence is always black in the detection frame period.
Further, according to an embodiment of the present invention, as shown in fig. 6 and 7, the first crack detection trace 201 and the second crack detection trace 202 are two, two first crack detection traces 201 are symmetrically disposed about the display area 10, and two second crack detection traces 202 are symmetrically disposed about the display area 10.
In summary, according to the display panel of the embodiment of the invention, the display area includes the array substrate layer and the touch detection layer, the array substrate layer is provided with the data lines, the non-display area includes the first crack detection trace arranged corresponding to the array substrate layer and the second crack detection trace arranged corresponding to the touch detection layer, the first end of the first crack detection trace and the first end of the second crack detection trace are both connected to the data lines, the first input end is connected to the second end of the first crack detection trace through the control circuit, and the second input end is connected to the second end of the second crack detection trace through the control circuit. Therefore, the display panel provided by the embodiment of the invention can simultaneously detect the cracks of the array substrate layer and the touch detection layer, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of crack detection of the display panel is improved.
Based on the display panel of the above embodiment, an embodiment of the present invention further provides a display device, including the display panel.
According to the display device provided by the embodiment of the invention, the display panel can be arranged, so that the detection of the cracks of the array substrate layer and the touch detection layer can be realized at the same time, the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of the crack detection of the display panel can be improved.
Based on the display panel of the above embodiment, an embodiment of the present invention further provides a crack detection method for a display panel, where the display panel includes a display area and a non-display area surrounding the display area, the display area includes an array substrate layer and a touch detection layer, the array substrate layer is provided with data lines, the non-display area includes first crack detection traces arranged corresponding to the array substrate layer and second crack detection traces arranged corresponding to the touch detection layer, and both first ends of the first crack detection traces and first ends of the second crack detection traces are connected to the data lines.
Fig. 8 is a flowchart illustrating a method for detecting cracks in a display panel according to an embodiment of the invention, and as shown in fig. 8, the method for detecting cracks in a display panel according to an embodiment of the invention includes the following steps:
s1, determining that the display panel is in a crack detection state.
And S2, in each detection frame period in the crack detection state, writing a first input signal received by the first input end into the second end of the first crack detection wire, and then writing a second input signal received by the second input end into the second end of the second crack detection wire, or writing a second input signal received by the second input end into the second end of the second crack detection wire, and then writing a first input signal received by the first input end into the second end of the first crack detection wire.
In summary, according to the crack detection method of the display panel in the embodiment of the invention, it is first determined that the display panel is in the crack detection state, and in each detection frame period in the crack detection state, the first input signal received by the first input end is first written into the second end of the first crack detection trace, and then the second input signal received by the second input end is written into the second end of the second crack detection trace, or the second input signal received by the second input end is first written into the second end of the second crack detection trace, and then the first input signal received by the first input end is written into the second end of the first crack detection trace. Therefore, the method for detecting the cracks of the display panel can simultaneously detect the cracks of the array substrate layer and the cracks of the touch detection layer, so that the process risk caused by the cracks of the touch detection layer can be reduced, and the accuracy of detecting the cracks of the display panel is improved.
In the description of the specification, reference to the description of "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present invention.
The logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Further, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are well known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried out in the method of implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and the program, when executed, includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present invention may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (9)
1. A display panel, comprising:
the display device comprises a display area, a display unit and a display unit, wherein the display area comprises an array substrate layer and a touch detection layer, and the array substrate layer is provided with data lines;
a non-display area surrounding the display area, the non-display area including a first crack detection trace disposed corresponding to the array substrate layer and a second crack detection trace disposed corresponding to the touch detection layer, a first end of the first crack detection trace and a first end of the second crack detection trace both connected to the data line;
the first input end is connected with the second end of the first crack detection wire through the control circuit, and the second input end is connected with the second end of the second crack detection wire through the control circuit;
the control circuit is configured to, in each detection frame period in a crack detection state, first write a first input signal received by the first input terminal into the second end of the first crack detection trace, and then write a second input signal received by the second input terminal into the second end of the second crack detection trace, or the control circuit first writes a second input signal received by the second input terminal into the second end of the second crack detection trace, and then writes a first input signal received by the first input terminal into the second end of the first crack detection trace;
the first end of the first crack detection wire and the first end of the second crack detection wire are both connected with the second pole of a third transistor, the first pole of the third transistor is connected with the data line, and the control pole of the third transistor is connected with a first control signal end.
2. The display panel of claim 1, wherein the second end of the second crack detection trace is further grounded.
3. The display panel according to claim 1, wherein the control circuit comprises:
a first transistor, a first electrode of which is connected to a second end of the first crack detection trace, a second electrode of which is connected to the first input end, and a control electrode of which is connected to the second input end;
and a first pole of the second transistor is connected with a second end of the second crack detection wire, a second pole of the second transistor is connected with the second input end, and a control pole of the second transistor is connected with the first input end.
4. The display panel according to claim 1, wherein the second crack detection trace comprises a first detection segment and a second detection segment, the first detection segment is disposed on the same layer as a first metal layer in the touch detection layer, the second detection segment is disposed on the same layer as a second metal layer in the touch detection layer, a first end of the first detection segment is used as a first end of the second crack detection trace, a second end of the first detection segment is connected to the first end of the second detection segment through a through hole, and a second end of the second detection segment is used as a second end of the second crack detection trace.
5. The display panel according to claim 4, wherein the first and second detection sections are disposed in parallel with respect to each other.
6. The display panel of claim 1, wherein the first crack detection trace, the second crack detection trace, and the control circuit are each present in plurality,
the first ends of the first crack detection wires and the first ends of the second crack detection wires are respectively connected with the data lines in a one-to-one correspondence manner, and the second ends of the first crack detection wires and the second ends of the second crack detection wires are respectively connected with the control circuits in a one-to-one correspondence manner.
7. The display panel of claim 6, wherein the first crack detection trace and the second crack detection trace are two, two of the first crack detection traces are symmetrically disposed about the display area, and two of the second crack detection traces are symmetrically disposed about the display area.
8. A display device characterized by comprising the display panel according to any one of claims 1 to 7.
9. A crack detection method of a display panel is characterized in that the display panel comprises a display area and a non-display area surrounding the display area, the display area comprises an array substrate layer and a touch detection layer, the array substrate layer is provided with a data line, the non-display area comprises a first crack detection line and a second crack detection line, the first crack detection line is arranged corresponding to the array substrate layer, the second crack detection line is arranged corresponding to the touch detection layer, a first end of the first crack detection line and a first end of the second crack detection line are both connected with the data line, and the method comprises the following steps:
determining that the display panel is in a crack detection state;
in each detection frame period in the crack detection state, first writing a first input signal received by a first input end into the second end of the first crack detection trace, and then writing a second input signal received by a second input end into the second end of the second crack detection trace, or writing a second input signal received by the second input end into the second end of the second crack detection trace, and then writing a first input signal received by the first input end into the second end of the first crack detection trace.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010108123.2A CN111307867B (en) | 2020-02-21 | 2020-02-21 | Display panel, crack detection method thereof and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010108123.2A CN111307867B (en) | 2020-02-21 | 2020-02-21 | Display panel, crack detection method thereof and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111307867A CN111307867A (en) | 2020-06-19 |
| CN111307867B true CN111307867B (en) | 2022-12-02 |
Family
ID=71151342
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010108123.2A Active CN111307867B (en) | 2020-02-21 | 2020-02-21 | Display panel, crack detection method thereof and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111307867B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111739453B (en) * | 2020-06-28 | 2022-05-17 | 武汉天马微电子有限公司 | Display panel and display device |
| CN112150920B (en) * | 2020-08-27 | 2022-08-30 | 昆山国显光电有限公司 | Display panel and display device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105468202A (en) * | 2016-01-29 | 2016-04-06 | 上海中航光电子有限公司 | Array substrate, touch display panel and touch display device |
| CN106206654A (en) * | 2015-05-26 | 2016-12-07 | 三星显示有限公司 | Display device |
| CN108153017A (en) * | 2016-12-06 | 2018-06-12 | 三星显示有限公司 | Display device |
| CN108922909A (en) * | 2018-07-26 | 2018-11-30 | 京东方科技集团股份有限公司 | A kind of array substrate, display panel and display device |
| CN110136618A (en) * | 2019-05-31 | 2019-08-16 | 京东方科技集团股份有限公司 | A kind of display panel detection circuit, display device and display panel testing method |
| CN110333268A (en) * | 2019-07-11 | 2019-10-15 | 京东方科技集团股份有限公司 | A kind of display panel, display device and crack detecting method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102362189B1 (en) * | 2015-04-16 | 2022-02-11 | 삼성디스플레이 주식회사 | Organic light emitting diode display |
| KR102388711B1 (en) * | 2015-04-27 | 2022-04-20 | 삼성디스플레이 주식회사 | Display device |
-
2020
- 2020-02-21 CN CN202010108123.2A patent/CN111307867B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206654A (en) * | 2015-05-26 | 2016-12-07 | 三星显示有限公司 | Display device |
| CN105468202A (en) * | 2016-01-29 | 2016-04-06 | 上海中航光电子有限公司 | Array substrate, touch display panel and touch display device |
| CN108153017A (en) * | 2016-12-06 | 2018-06-12 | 三星显示有限公司 | Display device |
| CN108922909A (en) * | 2018-07-26 | 2018-11-30 | 京东方科技集团股份有限公司 | A kind of array substrate, display panel and display device |
| CN110136618A (en) * | 2019-05-31 | 2019-08-16 | 京东方科技集团股份有限公司 | A kind of display panel detection circuit, display device and display panel testing method |
| CN110333268A (en) * | 2019-07-11 | 2019-10-15 | 京东方科技集团股份有限公司 | A kind of display panel, display device and crack detecting method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111307867A (en) | 2020-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR102270632B1 (en) | Display panel, display device and mtehod for driving display panel | |
| JP2005181951A (en) | Self-light-emitting display module and method for verifying defect state of the same | |
| EP3113162A1 (en) | Display device, panel defect detection system, and panel defect detection method | |
| US11922840B2 (en) | Liquid crystal display device, image display system and vehicle | |
| CN111307867B (en) | Display panel, crack detection method thereof and display device | |
| EP1575022A2 (en) | Self light emitting display module, electronic equipment into which the same module is loaded, and inspection method of a defect state in the same module | |
| US8643574B2 (en) | Imaging device | |
| EP1580720A2 (en) | Self light emitting display module, electronic equipment into which the same module is loaded, and inspection method of defect state in the same module | |
| CN105609024A (en) | Testing method and apparatus for display panel | |
| CN112908262B (en) | Organic light emitting display device and driving method thereof | |
| US11355039B2 (en) | Display driving circuit including crack detector and display device including the display driving circuit | |
| KR20180025385A (en) | Data driver, organic light-emitting display device and method for driving thereof | |
| JP5443188B2 (en) | Display device | |
| US8896567B2 (en) | Pixel circuit and display apparatus including the same | |
| JP6806933B2 (en) | Test circuit for in-cell touch panel | |
| JP4107601B2 (en) | Array substrate inspection method and inspection apparatus | |
| CN113763881B (en) | Display device and driving method thereof | |
| CN115938256A (en) | Display device and display driving method | |
| US11281332B2 (en) | Touch display device, touch driving circuit, and touch sensing method | |
| US20140092073A1 (en) | Display device | |
| JP5401761B2 (en) | Display substrate defect inspection method, defect inspection apparatus, and display apparatus | |
| KR102654549B1 (en) | Data Driving Device For Determining Faulty Bonding And Display Device Including The Same | |
| CN111145673A (en) | Method of performing sensing operation in display device and display device | |
| KR20170064962A (en) | Organic light emitting display panel and organic light emitting display device | |
| KR20160078692A (en) | Organic light emitting display device and method for the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |