CN112150920B - Display panel and display device - Google Patents
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- CN112150920B CN112150920B CN202010879569.5A CN202010879569A CN112150920B CN 112150920 B CN112150920 B CN 112150920B CN 202010879569 A CN202010879569 A CN 202010879569A CN 112150920 B CN112150920 B CN 112150920B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The application provides a display panel and display device, wherein, display panel it includes: the display area comprises a plurality of sub-pixels, the anode of at least one sub-pixel passes through a corresponding detection unit, and the detection unit starts or stops detection according to a first detection control signal; and a detection line positioned in the non-display region and connected between the subpixel anode and the detection unit, the detection line extending from a first side of the display panel to a second side opposite to the first side of the display panel. Therefore, whether display cracks appear on the display panel is detected, and the failure analysis efficiency and the detection efficiency of defective products are improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the rapid development of the full-face screen, screen body cracks can be generated when abnormality occurs in each process stage, and then black spots appear on the screen body, so that the display panel crack detection technology is particularly important. However, at present, each data line needs to be connected with a detection switch, so that the wiring space is reduced. Therefore, a more applicable and reliable display panel crack detection method is needed.
Disclosure of Invention
The invention mainly provides a display panel for detecting whether cracks appear on the display panel or not so as to improve failure analysis efficiency and defective product detection efficiency.
In order to solve the above technical problems, a first technical solution provided by the present invention is: provided is a display panel, including:
a display area and a non-display area located at the periphery of the display area;
the display area comprises a plurality of sub-pixels, the anode of at least one sub-pixel receives a detection signal through a corresponding detection unit, and the detection unit starts or stops detection according to a first detection control signal;
and a detection line positioned in the non-display region and connected between the subpixel anode and the detection unit, the detection line extending from a first side of the display panel to a second side opposite to the first side of the display panel.
The detection unit is used for detecting the detection signal of the sub-pixel, and the detection unit is used for detecting the detection signal of the sub-pixel.
The detection device also comprises a detection starting unit, wherein the detection starting unit provides a first detection control signal for the detection unit according to a second detection control signal.
The control ends of the detection units corresponding to the sub-pixels positioned in the same row are connected to the same detection starting unit; and/or the control ends of the detection units corresponding to the sub-pixels positioned in the same column are connected to the same detection starting unit.
The display panel further comprises a plurality of power lines, the detection unit is connected between the power lines and the anodes of the sub-pixels, and the detection signals are power signals on the power lines.
The detection lines include first and second detection lines respectively located at third and fourth sides of the display panel opposite to each other.
The detection lines are arranged in a winding manner, each detection line comprises a first detection portion close to the display area and a second detection portion located on one side, far away from the display area, of the first detection portion, and the detection unit is connected with the first detection portion and the anode of the sub-pixel is connected with the second detection portion.
The display panel comprises a test pad positioned in the non-display area on the first side of the display panel, and the test pad is used for providing the first detection control signal.
Wherein the detection unit includes a first transistor; the first transistor comprises a first control end, a first path end and a second path end, the first path end is connected with the power line, the second path end is connected with the anode of the sub-pixel, and the first control end is connected with the test pad.
In order to solve the above technical problems, a second technical solution provided by the present invention is: there is provided a display device comprising the display panel of any one of the above.
The detection line is arranged between the anode of the sub-pixel and the detection unit, extends from the first side of the display panel to the second side opposite to the first side of the display panel, and can detect whether the detection line is broken after the detection is started by the detection unit according to the first detection control signal, so as to determine whether the screen body has cracks, and further improve the failure analysis efficiency and the detection efficiency of defective products.
Drawings
FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a display panel according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of another embodiment of a display panel according to the present invention;
FIG. 4 is a schematic structural diagram of a display panel according to another embodiment of the present invention;
FIG. 5 is a schematic structural diagram of another embodiment of a display panel according to the present invention
FIG. 6 is a functional block diagram of a pixel driving circuit of a display panel according to the present invention;
FIG. 7 is a schematic circuit diagram of a pixel driving circuit of a display panel according to the present invention;
FIG. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description and simplicity of description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; the specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
The invention provides a display panel, which comprises a display area and a non-display area positioned at the periphery of the display area, wherein the display area comprises a plurality of sub-pixels, the anode of at least one sub-pixel receives a detection signal through a corresponding detection unit, and the detection unit starts or stops detection according to a first detection control signal; and a detection line in the non-display region connected between the subpixel anode and the detection unit, the detection line extending from a first side of the display panel to a second side opposite to the first side of the display panel.
As shown in fig. 1 to 3, a detection line B is connected between the subpixel anode and the detection unit (first transistor M1), the detection line B extending from a first side of the display panel to a second side opposite to the first side of the display panel. Specifically, as shown in fig. 1 to 3, the detection lines B extend from the IC side of the display panel to the side opposite to the IC side, so that the sub-pixels can be connected to the detection lines B at the corresponding positions, thereby detecting whether the display panel has cracks. When the display panel is in a detection state, the detection unit starts detection according to the first detection control signal Test1 to detect whether the corresponding sub-pixels emit light or not, and further determines whether the detection lines connected with the sub-pixels break or not to detect whether cracks occur on the screen body of the display panel, so that the failure analysis efficiency and the detection efficiency of defective products are improved, and specifically, if at least part of the sub-pixels do not emit light, the detection lines break, and the display panel cracks; if the sub-pixel emits light, the detection line connected with the light-emitting sub-pixel part is intact, and no crack appears at the display panel corresponding to the detection line.
Specifically, referring to fig. 1 to 3, wherein the sub-pixels are arranged in an array, and the sub-pixels may be any one of red sub-pixels, green sub-pixels, and blue sub-pixels. In one embodiment, the sub-pixels are light emitting diodes. Anodes of sub-pixels (i.e., anodes of light emitting diodes) located in the same row and/or the same column receive detection signals through corresponding detection units. At this time, when whether cracks appear on the side of the screen body is tested, whether the detection line is broken can be judged through whether a single sub-pixel, a row of sub-pixels, a column of sub-pixels or all sub-pixels emit light, and therefore whether cracks appear on the display panel is identified.
In an embodiment, the display panel further includes a detection start unit for providing the first detection signal Test1 to the detection unit according to the second detection signal Test 2. As shown in fig. 2, the detecting unit and the detecting start-up unit are both MOS transistors for illustration, the detecting unit includes a first transistor M1, and the detecting start-up unit includes a second transistor M2. In the detection state, the second transistor M2 is turned on according to the second detection signal Test2, so that the control terminal of the first transistor M1 receives the first control signal Test1 and turns on the detection, and the detection signal can reach the anode of the sub-pixel through the first transistor M1, thereby driving the sub-pixel to emit light in the detection state; in the normal display state, the first transistor M1 is turned off by receiving the first detection control signal Test1, and in order to prevent the abnormal signal from turning on the first transistor M1, the second transistor M2 is turned off according to the second detection signal Test2, so that the first transistor M1 is prevented from being turned on again, and the normal display is prevented from being affected.
Alternatively, the sub-pixels of the same row may share one detection unit. Specifically, as shown in fig. 2, the control terminals of the first transistors M1 corresponding to the sub-pixels in the same row are connected to the first terminal of the same second transistor M2, the second terminal of the second transistor M2 receives the first Test control signal Test1, and the control terminal of the second transistor M2 receives the second Test control signal Test2, so that in the Test state, whether the sub-pixels emit light or not can be tested by row according to the second Test control signal Test 2.
Alternatively, the sub-pixels of the same column may share one detection-on unit. Specifically, as shown in fig. 3, the control terminals of the first transistors M1 corresponding to the pixels in the same column are all connected to the first pass terminal of one same second transistor M2, the second pass terminal of the second transistor M2 receives the first Test control signal Test1, and the control terminal of the second transistor M2 receives the second Test control signal Test2, so that in the Test state, whether the sub-pixels emit light or not can be tested in columns according to the second Test control signal Test 2.
Alternatively, all the sub-pixels in the display panel may share the same detection start-up unit. As shown in fig. 4, the control terminals of all the first transistors M1 in the display panel are connected to the first path terminal of one same second transistor M2, the second path terminal of the second transistor M2 receives the first Test control signal Test1, and the control terminal of the second transistor M2 receives the second Test control signal Test2, so that in the Test state, whether the sub-pixels of the entire display panel emit light can be tested according to the second Test control signal Test 2.
In one embodiment, the display panel includes a test pad located at a non-display area of a first side of the display panel, the test pad for providing the first detection control signal Tset 1. The first side and the first side where the detection lines extend from the first side of the display panel are the same, and may be specifically the upper side or the lower side of the display panel, the left side or the right side of the display panel, or any one of the side surfaces of the display panel. When the display panel has only the first transistor M1, the control terminal of the first transistor M1 is connected to the test pad; in the case where the display panel includes the second transistor M2, the second pass terminal of the second transistor M2 is connected to the test pad. Therefore, only one test pad needs to be arranged to provide a first detection control signal for the detection unit of the display panel, the number of the test pads and the number of the routing lines are effectively reduced, and the narrow frame of the display panel is favorably realized.
In an embodiment, the detection unit and the sub-pixel are disposed adjacent to each other, so as to realize a narrow frame of the display panel. Specifically, the detection line B is disposed in a frame of a non-display area of the display panel.
Specifically, in the prior art, data voltage is generally used as a detection signal, the detection unit is connected between a power line and an anode of a sub-pixel, and the detection signal is a power signal on the power line. Because the power supply voltage is lower than the data voltage, the risk that the detection line B is subjected to chemical corrosion at the position of the line changing hole can be reduced. When the display panel needs to be detected, the display panel is in a black picture to enter a detection state. At this time, in the sensing state, the sensing unit receives the first sensing control signal Test1 to turn on sensing, so that a path between the power line and the sub-pixel is turned on, and the power signal ELVDD is supplied to the anode of the sub-pixel through the sensing signal line B connected to the light emitting diode D1. In this case, if any one, one row, one column, or all of the subpixels in the display panel do not emit light, the detection line is broken, and the display panel is cracked.
Alternatively, when the sub-pixels in the same row share the same detection turn-on unit, as shown in fig. 2, all the first transistors M1 corresponding to the sub-pixels in the same row are connected in series in the row direction, the first pass terminal of the first transistor M1 corresponding to the sub-pixel in the row is connected to the power line for receiving the power signal ELVDD, and the control terminals of the first transistors M1 corresponding to the sub-pixel in the row are connected to the first pass terminal of the second transistor M2 corresponding to the sub-pixel in the row; and the second path terminal of the first transistor M1 at the extreme edge in the row direction is connected to the detection line B and to the anode of the sub-pixel through the detection line B. Or, in another embodiment, the first path terminals of all the first transistors M1 are connected to the power line for receiving the power signal ELVDD, the second path terminals of all the first transistors M1 corresponding to the sub-pixels in the same row are connected to the detection line B in the corresponding position and are connected to the anode of the sub-pixel through the detection line B, and the control terminals of all the first transistors M1 corresponding to the sub-pixel in the row are connected to the first path terminal of the second transistor M2 corresponding to the sub-pixel in the row.
Alternatively, when the sub-pixels in the same column share the same detection turn-on unit, as shown in fig. 3, all the first transistors M1 corresponding to the sub-pixels in the same row are connected in series along the row direction, the first path terminal of the first transistor M1 is connected to the power line for receiving the power supply signal ELVDD, and the control terminals of the first transistors M1 corresponding to the sub-pixels in the same column are connected to the first path terminal of the second transistor M2 corresponding to the sub-pixels in the column; and the second path terminal of the first transistor M1 at the extreme edge in the row direction is connected to the detection line B and to the anode of the sub-pixel through the detection line B. Alternatively, in another embodiment, the first path terminals of all the first transistors M1 are connected to the power line for receiving the power supply signal ELVDD, the second path terminals of all the first transistors M1 in the same row are connected to the detection line B at the corresponding position and are connected to the anode of the sub-pixel through the detection line B, and the control terminals of the first transistors M1 in the same column are connected to the first path terminals of the second transistors M2 of the sub-pixels corresponding to the column.
When all the sub-pixels of the display panel share the same detection start unit, as shown in fig. 4, all the first transistors M1 corresponding to the sub-pixels located in the same row are connected in series along the row direction, the first path terminal of the first transistor M1 is connected to the power line for receiving the power supply signal ELVDD, and the control terminals of all the first transistors M1 in the display panel are connected to the first path terminal of the second transistor M2; and the second path terminal of the first transistor M1 at the outermost edge in the row direction is connected to the detection line B and is connected to the anode of the sub-pixel through the detection line B, or in another embodiment, the second path terminal of the first transistor M1 at the outermost edge in the column direction may be connected to the detection line B and is connected to the anode of the light emitting diode through the detection line B. Alternatively, in another embodiment, the first path terminals of all the first transistors M1 are connected to the power line for receiving the power signal ELVDD, the second path terminals of all the first transistors M1 in the same row are connected to the detection line B at the corresponding position, and the control terminals of all the first transistors M1 in the display panel are connected to the first path terminal of the second transistor M2.
In one embodiment, as shown in fig. 1 to 4, the detection lines B are arranged in a winding manner, the detection lines B include a first detection section B1 near the display area and a second detection section B2 at a side of the first detection section B1 away from the display area, the detection unit (first transistor M1) is connected to the first detection section B1, and the subpixel anode is connected to the second detection section B2. Therefore, when the sub-pixel does not emit light, the fracture position of the detection line B can be accurately positioned. Specifically, referring to fig. 2 as an example, when the test is performed in the test state, the first transistor M1 and the second transistor M2 are turned on, and in the first row of pixels, the power signal ELVDD passes through the first transistor M1 in the first row and further passes through the node n 1 、n 2 The detection line therebetween is provided to the anodes of the first row of sub-pixels, so that the first row of sub-pixels emit light if the node n 1 And node n 2 When the detection line between the sub-pixels is broken, the sub-pixels in the first row do not emit light; for the pixel points of the second row, the power signal ELVDD passes through the first transistor M1 of the second row and further passes through the node n 3 、n 4 The detection line therebetween is provided to the anode of the sub-pixel of the second row to make the sub-pixel of the second row emit light, if the node n 3 And node n 4 When there is a break in the detection line in between, the sub-pixels of the second row do not emit light, so that the position where the detection line breaks is located between the sub-pixels of the first row and the sub-pixels of the second row. By analogy, for the M-th row pixel, the power signal ELVDD passes through the first transistor M1 of the M-th row and further passes through the node n m+1 And node n m+2 The detection line therebetween is provided to the m-th row subpixel anode to make the n-th row subpixel emit light, if node n m+1 And node n m+2 When there is a break in the detection line between the m-th sub-pixels, the m-th sub-pixel does not emit light.
The display panel shown in fig. 1 to 4 described above, wherein the detection lines B are located at the third side of the display panel and extend from the first side of the display panel to the second side opposite to the first side of the display panel. In another embodiment, the detection lines B may also be simultaneously located on a third side and a fourth side opposite to the third side of the display panel, and extend from the first side to a second side opposite to the first side of the display panel. Specifically, for example, the display panel is rectangular, as shown in fig. 1 to 4, the second side of the first side core may be the upper and lower sides of the display panel in the figure, and the third side and the fourth side may be the left and right sides of the display panel.
Referring to fig. 5, the detection lines B include a first detection line 11 and a second detection line 12, and the first detection line 11 and the second detection line 12 are respectively located on a third side and a fourth side of the display panel opposite to each other. Specifically, the first detection line 11 and the second detection line 12 are also arranged to be detoured, and include a first sensing segment B1 adjacent to and near the display region and a second sensing segment B2 located on a side of the first sensing segment B1 away from the display region, the sensing unit is connected to the first sensing segment B1, and the subpixel anode is connected to the second sensing segment B2. This embodiment all sets up detection line B in display panel's both sides for the screen body left and right sides reduces the detection line through the district of buckling, with this wiring space that has increased the district of buckling.
Fig. 6 is a schematic structural diagram of a pixel driving circuit of a sub-pixel of a display panel according to the present invention. Wherein, the pixel drive circuit of the sub-pixel includes: a power supply unit 13, a drive signal writing unit 14, a drive unit 15, and an initialization unit 16.
The power supply unit 13 is connected to the light-emitting enable signal line, receives the light-emitting enable signal, and provides a power supply signal for the light-emitting diode OLED (sub-pixel) according to the light-emitting enable signal; the driving signal writing unit 14 receives a scanning signal to write a driving signal to the light emitting diode OLED under the driving of the scanning signal; the driving unit 15 is connected to the driving signal writing unit 14 and the power supply unit 13 to write the stored driving signal and generate a driving current matching the driving signal using the power supply signal according to the driving signal, thereby driving the light emitting diode OLED using the driving current; the initialization unit 16 receives the initialization signal and receives the reference signal under the driving of the initialization signal; wherein the initialization unit 16 is connected to the driving unit 15 and the light emitting diode OLED to initialize the driving unit 15 and the light emitting diode OLED with the reference signal.
The detection unit 12 is connected to the anode of the light emitting diode OLED, the power supply unit 13, and the detection start unit 11.
Wherein, the driving signal writing unit 14 controls the display panel to enter the detection state by the driving signal.
Referring to fig. 7, the power supply unit 13 includes: an eighth transistor M8 and a ninth transistor M9. Wherein, the eighth transistor M8 includes a control terminal, a first path terminal and a second path terminal. A control terminal of the eighth transistor M8 is connected to the light emission enable signal line to receive the light emission enable signal EM, a first path terminal of the eighth transistor M8 is connected to the power supply line to receive the power supply signal ELVDD, a second path terminal of the eighth transistor M8 is connected to the driving unit 15, and in particular, a second path terminal of the eighth transistor M8 is connected to a first path terminal of the fifth transistor M5 of the driving unit 15. The ninth transistor M9 includes a control terminal, a first path terminal, and a second path terminal. A control terminal of the ninth transistor M9 is connected to the light emission enable signal line to receive the light emission enable signal EM, a first path terminal of the ninth transistor M9 is connected to the driving unit 15, specifically, a first path terminal of the ninth transistor M9 is connected to a second path terminal of the fifth transistor M5 of the driving unit 15, and a second path terminal of the ninth transistor M9 is connected to the light emitting diode D1.
Wherein the drive signal writing unit 14 includes: a third transistor M3 and a fourth transistor M4. The third transistor M3 includes a control terminal, a first path terminal, and a second path terminal. A control terminal of the third transistor M3 is connected to the scan signal line to receive the scan signal S1, a first path terminal of the third transistor M3 is connected to the driving signal line to receive the driving signal Data, a second path terminal of the third transistor M3 is connected to the eighth transistor M8, and specifically, a second path terminal of the third transistor M3 is connected to a second path terminal of the eighth transistor M8. The fourth transistor M4 includes a control terminal, a first path terminal, and a second path terminal. A control terminal of the fourth transistor M4 is connected to the scan signal line to receive the scan signal S1, a first path terminal of the fourth transistor M4 is connected to the ninth transistor M9, specifically, a first path terminal of the fourth transistor M4 is connected to a first path terminal of the ninth transistor M9, a second path terminal of the fourth transistor M4 is connected to the driving unit 15, specifically, a second path terminal of the fourth transistor M4 is connected to a control terminal of the fifth transistor M5 of the driving unit 15.
Wherein the driving unit 15 includes: the fifth transistor M5, the fifth transistor M5 includes a control terminal, a first path terminal, and a second path terminal. A control terminal of the fifth transistor M5 is connected to the fourth transistor M4, a first path terminal of the fifth transistor M5 is connected to the eighth transistor M8, and a second path terminal of the fifth transistor M5 is connected to the ninth transistor M9. Specifically, the control terminal of the fifth transistor M5 is connected to the second path terminal of the fourth transistor M4, the first path terminal of the fifth transistor M5 is connected to the second path terminal of the eighth transistor M8, and the second path terminal of the fifth transistor M5 is connected to the first path terminal of the ninth transistor M9.
Wherein, the initialization unit 16 includes: a sixth transistor M6 and a seventh transistor M7. Wherein the sixth transistor M6 includes a control terminal, a first path terminal and a second path terminal. The control terminal of the sixth transistor M6 is connected to the first initialization signal line for receiving the first initialization signal S2, and the first path terminal of the sixth transistor M6 is connected to the driving unit 15, specifically, the first path terminal of the sixth transistor M6 is connected to the control terminal of the fifth transistor M5 of the driving unit 15, and the second path terminal of the sixth transistor M6 is connected to the reference signal line for receiving the reference signal Verf. The seventh transistor M7 includes a control terminal, a first path terminal, and a second path terminal. The control terminal of the seventh transistor M7 is connected to the second initialization signal line for receiving the second initialization signal S3, the first path terminal of the seventh transistor M7 is connected to the light emitting diode D1, and the second path terminal of the seventh transistor M7 is connected to the reference signal line for receiving the reference signal Verf.
Specifically, in this embodiment, the detecting unit 12 is a first transistor M1, a first path terminal of the first transistor M1 is connected to a first path terminal of the eighth transistor M8, and is connected to a power line for receiving the power supply signal ELVDD, a second path terminal of the first transistor M1 is connected to a second path terminal of the ninth transistor M9 and is connected to the anode of the light emitting diode D1, the detection enabling unit 11 is a second transistor M2, a control terminal of the first transistor M1 is connected to the first path terminal of the second transistor M2, a control terminal of the second transistor M2 receives a second detection control signal Test2, and the second detection control signal Test2 may be a VGL signal, so that the second transistor M2 is in a normally-on state, and other routing signals are not required to be provided, the structure of the detecting circuit is simplified, and a second path terminal of the second transistor M2 is connected to a Test pad of the driving chip for receiving the detection control signal. The first transistor M1 and the second transistor M2 are both PMOS transistors.
In this embodiment, when the display panel is in the normal mode, the driving chip outputs a high-level detection control signal through the test pad, so that the first transistor M1 is not turned on, and the display panel emits light normally for displaying. When the display panel needs to be detected, the driving signal data of 7V is written through the third transistor M3 and the fourth transistor M4, so that the display panel is under a black picture to enter a detection state. At this time, in the inspection state, the driving chip outputs a low-level inspection control signal through the test pad to turn on the second transistor M2 and the first transistor M1, and the power signal ELVDD is transmitted to the anode of the light emitting diode D1 through the inspection signal line B connected to the light emitting diode D1, so that the light emitting diode D1 emits light in the inspection state, and at this time, if the non-light emitting diode D1 exists, a plurality of dark lines appear, which indicates that the inspection line is broken, and the display panel has cracks.
In this embodiment, when the first transistor M1 and the second transistor M2 are turned on, the detection line B passes through the power signal ELVDD, and normally, the voltage of the power signal ELVDD is 4.6V, whereas in the conventional display panel, the voltage of the detection line is generally 7V, which is likely to cause electrochemical corrosion in a high-temperature and high-humidity environment at the position of the wire replacement hole, and thus the detection line is broken. According to the display panel, the voltage of the detection line B is 4.6V, so that the possibility of electrochemical corrosion at the position of the line changing hole is reduced. In addition, the position and the length of the detection line B are not limited, the crack detection can be realized only by controlling the time sequence of the detection starting unit 11 through the driving chip, the driving chip only needs to reserve one output port, the detection lines passing through the bending area can be reduced on the left side and the right side of the screen body, and the wiring space of the bending area is increased.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the invention. Specifically, the display device provided by the present invention includes the display panel described in any one of fig. 1 to 7, and the detailed structure is not repeated herein.
In the display device provided by the embodiment, after the detection start unit receives the detection control signal, the first transistor M1 and the second transistor M2 are turned on, the power signal ELVDD of the power line is provided to the anode of the pixel (light emitting diode) through the detection line, and the light emitting diode emits light at this time. Specifically, if the light emitting diode at a certain position does not emit light, so that a dark line is generated at the position, it indicates that the detection line corresponding to the row of sub-pixels is broken, thereby improving the failure analysis efficiency and the defective product detection efficiency.
The display device provided by the invention can be any one of a double-sided display panel, a flexible display panel and a full-screen display panel. The flexible display panel can be applied to a curved electronic device; the double-sided display panel may be applied to a panel for enabling a person on both sides of the display panel to see the display contents; the full-screen display panel can be applied to a full-screen mobile phone or other devices, and is not limited herein.
The display panel can be applied to any products or components with display functions such as mobile phones, tablet computers, televisions, displays, notebook computers, digital photo frames, navigators and the like. Other essential components of the display panel are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention.
In the embodiments of the present invention, only a part of the related circuits are described in the display panel, and other structures are the same as those of the display panel in the prior art, which is not described herein again.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (7)
1. A display panel, comprising:
a display area and a non-display area located at the periphery of the display area;
the display area comprises a plurality of sub-pixels, anodes of the sub-pixels receive detection signals through detection units in one-to-one correspondence, and the detection units start or stop detection according to a first detection control signal; wherein the detection signal is a power signal on a power line;
a detection line positioned at the non-display region, connected between the subpixel anode and the detection unit, the detection line extending from a first side of the display panel to a second side opposite to the first side of the display panel such that the subpixels can each be connected with the detection line at corresponding positions; the detection lines are arranged in a winding manner, each detection line comprises a first detection part close to the display area and a second detection part located on one side, far away from the display area, of the first detection part, the detection unit is connected with the first detection part, and the anode of the sub-pixel is connected with the second detection part;
the display panel also comprises a detection starting unit, and the detection starting unit provides a first detection control signal for the detection unit according to a second detection control signal; the control ends of the detection units corresponding to the sub-pixels positioned in the same row are connected to the same detection starting unit; and/or
The control ends of the detection units corresponding to the sub-pixels positioned in the same column are connected to the same detection starting unit;
the display panel further comprises a test pad located at the non-display area on the first side of the display panel, the detection starting unit comprises a second transistor, and a second path end of the second transistor is connected to the test pad.
2. The display panel according to claim 1, wherein the sub-pixels are arranged in an array, and wherein anodes of the sub-pixels located in the same row and/or the same column receive the detection signals through the corresponding detection units.
3. The display panel according to claim 1, further comprising a plurality of the power lines, wherein the detection unit is connected between the power lines and the subpixel anodes.
4. The display panel of any of claims 1-3, wherein the detection lines comprise first and second detection lines located on third and fourth opposing sides of the display panel, respectively.
5. The display panel of claim 1, wherein the test pad is configured to provide the first detection control signal.
6. The display panel according to claim 5, wherein the detection unit includes a first transistor;
the first transistor comprises a first control end, a first path end and a second path end, the first path end is connected with the power line, and the second path end is connected with the anode of the sub-pixel.
7. A display device characterized by comprising the display panel according to any one of claims 1 to 6.
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