CN114093289B

CN114093289B - Display panel, crack detection method thereof and display device

Info

Publication number: CN114093289B
Application number: CN202111399962.5A
Authority: CN
Inventors: 李�杰; 史大为; 张伟; 齐智坚; 曾平川; 廖文理
Original assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Priority date: 2021-11-19
Filing date: 2021-11-19
Publication date: 2023-12-12
Anticipated expiration: 2041-11-19
Also published as: CN114093289A

Abstract

The application discloses a display panel, a crack detection method thereof and a display device, and relates to the technical field of display. The display panel comprises a plurality of detection circuits positioned in the peripheral area of the substrate base board, and each detection circuit can control an input signal line provided by an input signal line to be transmitted to a light-emitting control signal line under the action of a switch control signal provided by a switch control line. And determining that no crack exists at the edge of the display panel when a plurality of sub-pixels in the sub-pixel group emit light of a target color; when a plurality of sub-pixels in the sub-pixel group cannot emit light of a target color, determining that a crack exists at the edge of the display panel. Further, when the display panel has a crack, the position of the crack of the display panel can be quickly determined based on the position of the sub-pixel group that does not emit the light of the target color. Therefore, the preparation process of the display panel can be improved through the crack form in the display panel, so that the yield of the display panel obtained through subsequent preparation is ensured.

Description

Display panel, crack detection method thereof and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel, a crack detection method thereof and a display device.

Background

In the manufacturing process of the display panel, micro cracks, which are difficult to observe, may occur at the edge of the display panel, affecting the quality of the display panel.

In the related art, in order to detect whether or not a crack exists at the edge of a display panel, a panel crack detection (panel crack detection, PCD) trace is generally provided at the edge region of a substrate of the display panel. The PCD trace is a ring-shaped trace surrounding the display area of the substrate. One end and the other end of the PCD wiring are connected with the detection circuit to form a loop. The detection circuit is used for inputting a detection signal to one end of the PCD and detecting whether the detection signal can be received from the other end of the PCD wiring. If the detection circuit can receive the detection signal from the other end of the PCD wiring, determining that no crack exists at the edge of the display panel; if the detection circuit cannot receive the detection signal from the other end of the PCD wiring, the edge of the display panel is determined to have cracks.

However, the above method can only be used to determine whether or not there is a crack at the edge of the display panel, and cannot determine the position of the crack when the crack is present. Therefore, the manufacturing process of the display panel cannot be improved by determining the crack form, and cracks may still exist at the edge of the display panel manufactured later, so that the yield is low.

Disclosure of Invention

The application provides a display panel, a crack detection method thereof and a display device, which can solve the problem of lower yield of the display panel in the related technology. The technical scheme is as follows:

in one aspect, there is provided a display panel including:

a substrate having a display region and a peripheral region surrounding the display region;

at least one input signal line, at least one input signal line is positioned at one side of the substrate base plate and is positioned at the peripheral area;

a plurality of light emission control signal lines located at one side of the substrate base plate, each of the light emission control signal lines being located at the display region;

at least one switch control line, at least one switch control line is positioned at one side of the substrate base plate and is positioned at the peripheral area;

a plurality of detection circuits located on one side of the substrate base plate and located in the peripheral region; each detection circuit is electrically connected with one input signal line, one light-emitting control signal line and one switch control line respectively, and is used for responding to a switch control signal provided by the switch control line and controlling the input signal provided by the input signal line to be transmitted to the light-emitting control signal line;

And a plurality of sub-pixel groups, the plurality of sub-pixel groups being located at one side of the substrate and at the display area, each of the sub-pixel groups including a plurality of sub-pixels electrically connected to one of the emission control signal lines, the plurality of sub-pixels in each of the sub-pixel groups being configured to emit light of a target color upon receiving an input signal from the emission control signal line.

Optionally, the display panel further includes: the plurality of signal connecting wires are in one-to-one correspondence with the plurality of detection circuits, are positioned on one side of the substrate and are positioned in the peripheral area;

one end of each signal connecting wire is electrically connected with the input signal wire, the other end of each signal connecting wire is electrically connected with the corresponding detection circuit, and at least part of each signal connecting wire is far away from the display area relative to the input signal wire.

Optionally, the boundaries of the display area include a first boundary, a second boundary, a third boundary and a fourth boundary that are sequentially connected; the plurality of detection circuits comprises a plurality of first detection circuits and a plurality of second detection circuits; the at least one input signal line includes a first input signal line and a second input signal line; the at least one switch control line includes a first switch control line and a second switch control line; the plurality of signal connection lines comprise a plurality of first signal connection lines which are in one-to-one correspondence with the plurality of first detection circuits and a plurality of second signal connection lines which are in one-to-one correspondence with the plurality of second detection circuits;

The plurality of first detection circuits, the first input signal lines, the first switch control lines and the plurality of first signal connection lines are located in the peripheral area close to the second boundary of the display area, one end of each first signal connection line is electrically connected with the first input signal line, the other end of each first signal connection line is electrically connected with the corresponding first detection circuit, and the first detection circuits are also electrically connected with the first switch control lines;

the plurality of second detection circuits, the second input signal lines, the second switch control lines and the plurality of first signal connection lines are located in the peripheral area close to the fourth boundary of the display area, one end of each second signal connection line is electrically connected with the second input signal lines, the other end of each second signal connection line is electrically connected with the corresponding second detection circuit, and the second detection circuits are also electrically connected with the second switch control lines.

Optionally, the first target signal connection line of the plurality of first signal connection lines is further located in the peripheral area close to the third boundary of the display area, and the first target signal connection line is one of the plurality of first signal connection lines with the largest distance from the first boundary;

The second target signal connection line of the plurality of second signal connection lines is further located in the peripheral area close to the third boundary of the display area, and the second target signal connection line is one of the plurality of second signal connection lines, which has the largest distance from the first boundary.

Optionally, the plurality of first detection circuits are uniformly distributed in the peripheral area near the second boundary of the display area;

the plurality of second detection circuits are uniformly distributed in the peripheral area close to the fourth boundary of the display area.

Optionally, the range of the number of the first detection circuits included in the display panel and the range of the number of the second detection circuits included in the display panel are 1/20 to 1/6 of the number of the sub-pixel groups.

Optionally, each of the signal connection lines includes: a plurality of connecting line segments connected in sequence, wherein the extending directions of any two connecting line segments connected with each other are intersected;

at least one connecting line segment in the plurality of connecting line segments is far away from the display area relative to the input signal line.

Optionally, each of the input signal lines and each of the switch control lines extend along a first direction, and each of the light emission control signal lines extends along a second direction, and the second direction intersects the first direction;

The plurality of sub-pixel groups are arranged along the first direction, and the plurality of sub-pixels included in each sub-pixel group are arranged along the second direction.

Optionally, each of the detection circuits includes a first thin film transistor;

the grid electrode of the first thin film transistor is electrically connected with the switch control line, the first electrode of the first thin film transistor is electrically connected with the input signal line, and the second electrode of the first thin film transistor is electrically connected with the light-emitting control signal line.

Optionally, each of the sub-pixels includes a second thin film transistor; the grid electrode of the second thin film transistor is electrically connected with the light-emitting control signal line;

the second thin film transistor is used for being turned off when the input signal transmitted by the light-emitting control signal line is received, and is used for being turned on when the input signal transmitted by the light-emitting control signal line is not received.

Optionally, the target color is black.

In another aspect, there is provided a crack detection method of a display panel for detecting the display panel as described in the above aspect, the method comprising:

in a detection stage, for each detection circuit, the detection circuit controls transmission of an input signal of a first potential supplied from the input signal line to a light emission control signal line electrically connected to the detection circuit in response to a switch control signal of a second potential supplied from a switch control line;

Determining whether a plurality of sub-pixels in a sub-pixel group connected to the light emission control signal line emit light of a target color;

if a plurality of sub-pixels in the sub-pixel group connected with the light-emitting control signal line emit light of a target color, determining that the plurality of sub-pixels in the sub-pixel group connected with the light-emitting control signal line can receive an input signal from the light-emitting control signal line, wherein no crack exists in a neighboring area of the display panel, which is positioned in the detection circuit;

if a plurality of sub-pixels in the sub-pixel group connected with the light-emitting control signal line do not emit light of a target color, determining that the plurality of sub-pixels in the sub-pixel group connected with the light-emitting control signal line cannot receive an input signal from the light-emitting control signal line, wherein a crack exists in a neighboring area of the display panel, which is positioned in the detection circuit;

if a crack exists in the display panel in the vicinity of the detection circuit, determining the position of the crack in the display panel based on the position of the detection circuit.

Optionally, the determining the location of the crack in the display panel based on the location of the detection circuit includes:

and determining the position of the signal connection line connected with the detection circuit on the display panel as the position of the crack in the display panel.

Optionally, the method further comprises:

in the display stage, for each of the detection circuits, the detection circuit controls the input signal supplied from the input signal line not to be transmitted to the light emission control signal line in response to a switching control signal of a first potential supplied from the switching control line.

In still another aspect, there is provided a display device including: a power supply assembly and a display panel as described in the above aspects;

the power supply assembly is used for supplying power to the display panel.

The technical scheme provided by the application has the beneficial effects that at least:

the application provides a display panel, a crack detection method thereof and a display device. And determining that no crack exists at the edge of the display panel when a plurality of sub-pixels in the sub-pixel group emit light of a target color; when a plurality of sub-pixels in the sub-pixel group cannot emit light of a target color, determining that a crack exists at the edge of the display panel. Further, when the display panel has a crack, the position of the crack of the display panel can be quickly determined based on the position of the sub-pixel group that does not emit the light of the target color. Therefore, the preparation process of the display panel can be improved through the crack form in the display panel, so that the yield of the display panel obtained through subsequent preparation is ensured.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application;

FIG. 2 is a top view of a substrate base plate provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of another display panel according to an embodiment of the present application;

FIG. 4 is a schematic structural diagram of another display panel according to an embodiment of the present application;

FIG. 5 is a schematic diagram illustrating a detection effect of a display panel according to an embodiment of the present application;

FIG. 6 is a schematic diagram illustrating a detection effect of another display panel according to an embodiment of the present application;

FIG. 7 is a partial schematic view of the display panel of FIG. 4;

FIG. 8 is another partial schematic view of the display panel shown in FIG. 4;

FIG. 9 is a flowchart of a crack detection method for a display panel according to an embodiment of the present application;

Fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application. As can be seen with reference to fig. 1, the display panel 10 may include: a substrate 101, at least one input signal line 102, a plurality of light emission control signal lines 103, at least one switch control line 104, a plurality of detection circuits 105, and a plurality of sub-pixel groups 106. Of these, 1 input signal line 102,5, light emission control signal line 103,1, switch control line 104,5 detection circuits 105, and 5 subpixel group 106 are shown in fig. 1.

Fig. 2 is a top view of a substrate base plate according to an embodiment of the present application. Referring to fig. 2, the substrate 101 may have a display region 101a and a peripheral region 101b surrounding the display region 101a. In addition, referring to fig. 1 and 2, at least one input signal line 102 may be located at one side of the substrate 101 and located at the peripheral region 101b. The plurality of light emission control signal lines 103 may be located at one side of the substrate base 101, and each light emission control signal line 103 is located at the display region 101a. At least one switch control line 104 may be located at one side of the substrate 101 and at the peripheral region 101b. The plurality of detection circuits 105 may be located at one side of the substrate 101 and at the peripheral region 101b. The plurality of sub-pixel groups 106 may be located at one side of the substrate 101 and at the display area 101a. A plurality of sub-pixels 1061 included in each sub-pixel group 106 may be electrically connected to one light emission control signal line 103.

In the embodiment of the present application, each detection circuit 105 is electrically connected to one input signal line 102, one light emission control signal line 103, and one switch control line 104, respectively. Of course, each of the switch control lines 104 may be electrically connected to a plurality of the detection circuits 105, each of the input signal lines 102 may be electrically connected to a plurality of the detection circuits 105, and each of the light emission control signal lines 103 may be electrically connected to at least one of the detection circuits 105.

Each detection circuit 105 may be configured to control transmission of an input signal provided by one of its connected input signal lines 102 to one of its connected light emission control signal lines 103 in response to a switch control signal provided by one of its connected switch control lines 104. The plurality of sub-pixels 1061 in each sub-pixel group 106 are configured to emit light of a target color upon receiving an input signal from the light emission control signal line 103.

By designing the plurality of detection circuits 105 in the peripheral region 101b of the substrate 101, the detection circuits 105 can control the input signal line 102 provided by the input signal line 102 to be transmitted to the light emission control signal line 103 by the switching control signal provided by the switching control line 104. If each subpixel 1061 in the subpixel group 106 emits light of the target color, it indicates that the light emission control signal line 103 connected to the subpixel group 106 is capable of receiving the input signal transmitted from the input signal line 102, and further indicates that no crack (ack) exists at the edge of the display panel 10. If each sub-pixel 1061 in the sub-pixel group 106 cannot emit the light of the target color, it indicates that the light emission control signal line 103 cannot receive the input signal transmitted from the input signal line 102, and further indicates that the edge of the display panel 10 has a crack. That is, whether or not there is a crack at the edge of the display panel 10 may be determined by determining whether or not the sub-pixel 1061 in the sub-pixel group 106 emits light of the target color.

In addition, when it is determined that a crack exists at the edge of the display panel 10, the position of the detection circuit 105 connected to the sub-pixel group 106 can be determined by determining the position of the sub-pixel group 106 that does not emit light of the target color, and thus the position of the crack in the display panel 10 can be rapidly determined. After the position of the crack is determined, the preparation process of the display panel can be improved by determining the shape of the crack, and the preparation process can be optimized. Therefore, the problem that the yield of the display panel obtained by subsequent preparation is still low due to the defect of the preparation process can be avoided.

In summary, the embodiment of the application provides a display panel, which includes a plurality of detection circuits located in a peripheral area of a substrate, where each detection circuit can control an input signal line provided by an input signal line to transmit to a light emitting control signal line under the action of a switch control signal provided by a switch control line. And determining that no crack exists at the edge of the display panel when a plurality of sub-pixels in the sub-pixel group emit light of a target color; when a plurality of sub-pixels in the sub-pixel group cannot emit light of a target color, determining that a crack exists at the edge of the display panel. Further, when the display panel has a crack, the position of the crack of the display panel can be quickly determined based on the position of the sub-pixel group that does not emit the light of the target color. Therefore, the preparation process of the display panel can be improved through the crack form in the display panel, so that the yield of the display panel obtained through subsequent preparation is ensured.

As can be seen with reference to fig. 3, the display panel 10 may further comprise: a plurality of signal connection lines 107 corresponding to the plurality of detection circuits 105 one by one. The plurality of signal connection lines 107 may be located at one side of the substrate 101 and at the peripheral region 101b. One end of each signal connection line 107 may be electrically connected to the input signal line 102, and the other end may be electrically connected to the corresponding detection circuit 105. And, at least part of each signal connection line 107 is distant from the display area 101a with respect to the input signal line 102.

By designing the signal connection line 107 in the peripheral region 101b, the detection circuit 105 and the input signal line 102 are electrically connected through the signal connection line 107. If there is a crack at the position of the signal connection line 107, the input signal in the input signal line 102 cannot be transmitted from the signal connection line 107 to the detection circuit 105, and thus the detection circuit 105 cannot transmit the input signal to the subpixel group 106 through the light emission control signal line 103 under the control of the switch control signal provided by the switch control line 104. Therefore, the position of the signal connection line 107 can be determined by determining the position of the sub-pixel group 106 that does not emit light of the target color, and thus the position of the crack of the display panel 10.

Referring to fig. 2, it can be seen that the boundary of the display region 101a of the substrate 101 includes a first boundary 101a1, a second boundary 101a2, a third boundary 101a3, and a fourth boundary 101a4, which are sequentially connected. Fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the application. As can be seen with reference to fig. 4, the plurality of detection circuits 105 may include a plurality of first detection circuits 105a and a plurality of second detection circuits 105b. The at least one input signal line 102 may include a first input signal line 102a and a second input signal line 102b. The at least one switch control line 104 may include a first switch control line 104a and a second switch control line 104b. The plurality of signal connection lines 107 may include a plurality of first signal connection lines 107a in one-to-one correspondence with the plurality of first detection circuits 105a, and a plurality of second signal connection lines 107b in one-to-one correspondence with the plurality of second detection circuits 105b.

The plurality of first detection circuits 105a, the first input signal line 102a, the first switch control line 104a, and the plurality of first signal connection lines 107a are located in the peripheral area 101b near the second boundary 101a2 of the display area 101 a. One end of the first signal connection line 107a may be electrically connected to the first input signal line 102a, and the other end may be electrically connected to the corresponding first detection circuit 105a, and the first detection circuit 105a is also electrically connected to the first switch control line 104 a.

The plurality of second detection circuits 105b, the second input signal line 102b, the second switch control line 104b, and the plurality of first signal connection lines 107a are located in the peripheral region 101b near the fourth boundary 101a4 of the display region 101 a. One end of the second signal connection line 107b is electrically connected to the second input signal line 102b, the other end is electrically connected to the corresponding second detection circuit 105b, and the second detection circuit 105b is also electrically connected to the second switch control line 104 b.

In an embodiment of the present application, the first switch control signal provided by the first switch control line 104a may be used to control the states of the plurality of first detection circuits 105 a. Each of the plurality of first detection circuits 105a may control the first input signal provided by the first input signal line 102a to be transmitted to one of the light emission control signal lines 103 through one of the first signal connection lines 107a in response to the first switch control signal provided by the first switch control line 104 a. Thereby causing the sub-pixel 1061 in the sub-pixel group 106 connected to the light emission control signal line 103 to emit light of the target color.

If the sub-pixel 1061 in the sub-pixel group 106 connected to the emission control signal line 103 is not capable of emitting light of the target color, it is indicated that the first input signal supplied from the first input signal line 102a is not transmitted to the emission control signal line 103. This means that there is a possibility that a crack exists at the position of the first detection circuit 105a and the first signal connection line 107a connected to the light emission control signal line 103.

Accordingly, the second switch control signal provided by the second switch control line 104b may be used to control the states of the plurality of second detection circuits 105 b. The plurality of second detection circuits 105b may control the second input signal provided by the second input signal line 102b to be transmitted to one light emission control signal line 103 through the second signal connection line 107b in response to the second switch control signal provided by the second switch control line 104 b. Thereby causing the sub-pixel 1061 in the sub-pixel group 106 connected to the light emission control signal line 103 to emit light of the target color.

If the sub-pixel 1061 in the sub-pixel group 106 connected to the emission control signal line 103 is not capable of emitting light of the target color, it is indicated that the second input signal supplied from the second input signal line 102b is not transmitted to the emission control signal line 103. This means that there is a possibility that a crack exists at the position of the second detection circuit 105b and the second signal connection line 107b connected to the light emission control signal line 103.

In the embodiment of the present application, the number of the first detection circuits 105a may be the same as the number of the second detection circuits 105b in the display panel 10. Of course, the number of the first detection circuits 105a in the display panel 10 may be different from the number of the second detection circuits 105 b. The embodiment of the present application is not limited thereto.

In the display panel 10, the light emission control signal line 103 connected to the first detection circuit 105a may be the same as the light emission control signal line 103 connected to the second detection circuit 105 b. For example, in fig. 4, the plurality of first detection circuits 105a and the plurality of second detection circuits 105b in the display panel 10 are in one-to-one correspondence (the number of the first detection circuits 105a may be the same as the number of the second detection circuits 105 b), and the first detection circuits 105a and the corresponding second detection circuits 105b may be electrically connected to the same light emission control signal line 103. Of course, the light emission control signal line 103 connected to each first detection circuit 105a in the display panel 10 may be a different light emission control signal line 103 from the light emission control signal line 103 connected to any second detection circuit 105b, which is not limited in the embodiment of the present application.

In an embodiment of the present application, referring to fig. 4, the first target signal connection line 107a1 of the plurality of first signal connection lines 107a may also be located in the peripheral area 101b near the third boundary 101a3 of the display area 101 a. The first target signal connection line 107a1 is one first signal connection line 107a having the largest distance from the first boundary 101a1 among the plurality of first signal connection lines 107a.

Accordingly, the second target signal connection line 107b1 of the plurality of second signal connection lines 107b may also be located in the peripheral region 101b adjacent to the third boundary 101a3 of the display region 101 a. The second target signal connection line 107b1 is one second signal connection line 107b having the largest distance from the first boundary 101a1 among the plurality of second signal connection lines 107b.

If there is a crack at the position of the first signal connection line 107a, the sub-pixel group 106 connected to the first signal connection line 107a (the first signal connection line 107a passes through the first detection circuit 105a, the light emission control signal line 103, and the sub-pixel group 106) cannot emit light of the target color. Thus, the first target signal connection line 107a1 is also provided in the peripheral region 101b of the third boundary 101a3 adjacent to the display region 101a, and in the case where the subpixel group 106 connected to the first target signal connection line 107a1 cannot emit light of the target color, it can be determined that a crack may exist in the peripheral region 101b (region where the first target signal connection line 107a1 is provided) of the display panel 10 adjacent to the third boundary 101a3 of the display region 101 a.

Accordingly, if there is a crack at the position of the second signal connection line 107b, the sub-pixel group 106 connected to the second signal connection line 107b (the second signal connection line 107b passes through the second detection circuit 105b and the light emission control signal line 103 and the sub-pixel group 106) cannot emit the light of the target color. Thus, the second target signal connection line 107b1 is also provided in the peripheral region 101b near the third boundary 101a3 of the display region 101a, and in the case where the subpixel group 106 connected to the second target signal connection line 107b1 cannot emit light of the target color, it can be determined that there is a possibility that a crack may exist in the peripheral region 101b (the region where the first target signal connection line 107a1 is provided) near the third boundary 101a3 of the display region 101a in the display panel 10.

That is, in the embodiment of the present application, by designing the signal connection lines 107 (for example, the first signal connection line 107a and the second signal connection line 107 b) in the peripheral region 101b near the third boundary 101a3, it is possible to determine whether or not there is a crack in the peripheral region 101b near the third boundary 101a3 in the display panel 10 based on the light emission condition of the sub-pixel group 106 connected to the signal connection line 107.

In the embodiment of the present application, the plurality of first detection circuits 105a may be uniformly distributed in the peripheral area 101b near the second boundary 101a2 of the display area 101 a. The plurality of second detection circuits 105b may be uniformly distributed in the peripheral region 101b near the fourth boundary 101a4 of the display region 101 a.

In the case where the first detection circuit 105a and the second detection circuit 105b are uniformly distributed, if there is no crack at the edge of the display panel 10, the sub-pixel group 106 emitting the light of the target color should also be uniformly distributed. If the subpixel group 106 emitting the light of the target color is not uniformly distributed at a certain place, it can be determined that a crack exists in the area where the signal connection line 107 connected to the subpixel group 106 is located.

Thus, by uniformly distributing the first detection circuit 105a and the second detection circuit 105b, it is possible to quickly determine whether the sub-pixel group 106 emitting the light of the target color is also uniformly distributed. And the position of the sub-pixel group 106 which does not emit light of the target color can be quickly determined, so that quick positioning of cracks is realized. For example, in fig. 5, the sub-pixel groups 106 emitting light of the target color are uniformly distributed, and thus it can be determined that there is no crack at the edge of the display panel 10. In fig. 6, the sub-pixel groups 106 that emit light of the target color are not uniformly distributed at the target position a. It is thereby determined that one sub-pixel group 106 at the target position a is not capable of emitting light of the target color, and the position of the crack can be determined based on the position of the sub-pixel group 106.

Of course, the plurality of first detection circuits 105a and the plurality of second detection circuits 105b may be unevenly distributed, and the positions of the sub-pixel groups 106 connected to the first detection circuits 105a and the second detection circuits 105b may be determined before detection. The embodiment of the present application is not limited thereto.

Alternatively, since the plurality of first detection circuits 105a are connected to the plurality of first signal connection lines 107a in a one-to-one correspondence, in a case where the plurality of first detection circuits 105a are uniformly distributed in the peripheral region 101b near the second boundary 101a2 of the display region 101a, the plurality of first signal connection lines 107a may also be uniformly distributed in the peripheral region 101b near the second boundary 101a2 of the display region 101 a. Accordingly, since the plurality of second detection circuits 105b are connected to the plurality of second signal connection lines 107b in a one-to-one correspondence, in a case where the plurality of second detection circuits 105b are uniformly distributed in the peripheral region 101b near the fourth boundary 101a4 of the display region 101a, the plurality of second signal connection lines 107b may also be uniformly distributed in the peripheral region 101b near the fourth boundary 101a4 of the display region 101 a.

In the embodiment of the application, the greater the number of the first detection circuits 105a and the second detection circuits 105b, the higher the detection accuracy, and the faster the position of the crack can be determined. However, the number of the first detecting circuits 105a and the second detecting circuits 105b is too large, which may lead to a complicated wiring design. Accordingly, in order to balance the complexity of the wiring design and the detection accuracy, an appropriate number of the first detection circuits 105a and the second detection circuits 105b may be designed based on the resolution of the display panel 10.

Alternatively, the range of the number of the first detection circuits 105a included in the display panel 10 and the range of the number of the second detection circuits 105b included in the display panel 10 may each be 1/20 to 1/6 of the number of the sub-pixel groups 106.

Of course, the number of the first detection circuits 105a and the number of the second detection circuits 105b included in the display panel 10 may be the same as the number of the sub-pixel groups 106. That is, one first detection circuit 105a and one second detection circuit 105b may be connected to each sub-pixel group 106. In this case, if there is no crack at the edge of the display panel 10, the sub-pixel 1061 in each sub-pixel group 106 should emit light of a target color during the detection.

In the embodiment of the present application, each signal connection line 107 may include a plurality of connection line segments connected in sequence, and the extending directions of any two connected connection line segments intersect. At least one of the plurality of connection line segments is distant from the display area 101a with respect to the input signal line 102. By designing at least one connecting line segment relatively far from the display area 101a, whether or not there is a crack at the edge relatively far from the display area 101a in the display panel 10 can be judged by whether or not the sub-pixel 1061 in the sub-pixel group 106 emits light of the target color.

Alternatively, referring to fig. 7, for the other first signal connection lines 107a2 among the first signal connection lines 107a except for the first target signal connection line 107a1, each of the other first signal connection lines 107a2 includes a first connection line segment a1, a second connection line segment a2, a third connection line segment a3, a fourth connection line segment a4, and a fifth connection line segment a5, which are sequentially connected.

The first connection line segment a1 is electrically connected to the detection circuit 105, and the fifth connection line segment a5 is electrically connected to the first input signal line 102 a. The first connecting line segment a1 and the second connecting line segment a2 are located on one side of the first input signal line 102a close to the display area 101a, the fourth connecting line segment a4 and the fifth connecting line segment a5 are located on one side of the first input signal line 102a far away from the display area 101a, one end of the third connecting line segment a3 connected with the second connecting line segment a2 is located on one side of the first input signal line 102a close to the display area 101a, and one end of the third connecting line segment a3 connected with the fourth connecting line segment a4 is located on one side of the first input signal line 102a far away from the display area 101 a. The extending directions of the first connecting line segment a1, the third connecting line segment a3 and the fifth connecting line segment a5 are parallel to each other, and the extending directions of the second connecting line segment a2 and the fourth connecting line segment a4 are parallel to each other.

Alternatively, referring to fig. 8, for the first target signal connection line 107a1 of the first signal connection lines 107a, the first target signal connection line 107a1 includes a first connection line segment b1, a second connection line segment b2, a third connection line segment b3, a fourth connection line segment b4, a fifth connection line segment b5, a sixth connection line segment b6, and a seventh connection line segment b7, which are sequentially connected.

The first connecting line b1 is electrically connected to the detection circuit 105, and the seventh connecting line b7 is electrically connected to the first input signal line 102 a. The first connection line segment b1 and the second connection line segment b2 are located at a side of the first input signal line 102a near the display area 101a, and the sixth connection line segment b6 and the seventh connection line segment b7 are located at a side of the first input signal line 102a far from the display area 101 a. The third connecting line segment b3, the fourth connecting line segment b4, and the fifth connecting line segment b5 are located in the peripheral region 101b near the third boundary 101a3 of the display region 101 a. The extending directions of the first connecting line segment b1, the third connecting line segment b3, the fifth connecting line segment b5 and the seventh connecting line segment b7 are parallel to each other, and the extending directions of the second connecting line segment b2, the fourth connecting line segment b4 and the sixth connecting line segment b6 are parallel to each other.

Alternatively, for each first signal connection line 107a of the first signal connection lines 107a, the first signal connection line 107a may further include other numbers of connection line segments, which only needs to make more of the first signal connection lines 107a near the edge as possible.

In the embodiment of the present application, the shapes and arrangements of the second signal connection lines 107b2 of the second signal connection lines 107b except for the second target signal connection line 107b1 may be the same as those of the first signal connection lines 107a2 of the first signal connection lines 107a except for the first target signal connection line 107a1, which are not described herein. Accordingly, the second target signal connection line 107b1 in the second signal connection line 107b may be identical to the first target signal connection line 107a1 in the first signal connection line 107a in shape and arrangement, which is not described herein.

Referring to fig. 1, 3 and 4, each input signal line 102 and each switching control line 104 may extend in a first direction X, and each light emission control signal line 103 may extend in a second direction Y. Wherein the second direction Y may intersect the first direction X. For example, the second direction Y is perpendicular to the first direction X, and the first direction X may be a pixel column direction of the display panel 10, and the second direction Y may be a pixel row direction of the display panel 10. In addition, the plurality of sub-pixel groups 106 may be arranged in the first direction X, and the plurality of sub-pixels 1061 included in each sub-pixel group 106 may be arranged in the second direction Y.

In this case, referring to fig. 5, when there is no crack at the edge of the display panel 10, a plurality of lines of a target color arranged in the first direction X may be displayed in the display panel 10, and each line extends in the second direction Y.

In an embodiment of the present application, each detection circuit 105 may include a first thin film transistor (not shown in the drawings). The gate of the first thin film transistor may be electrically connected to the switch control line 104, the first electrode of the first thin film transistor may be electrically connected to the input signal line 102, and the second electrode of the first thin film transistor may be electrically connected to the light emission control signal line 103.

Wherein the first thin film transistor may be turned on or off under the control of a switch control signal provided by the switch control line 104. When the first thin film transistor is turned on, an input signal in the input signal line 102 can be transmitted to the light emission control signal line 103 through the turned-on first thin film transistor. In this case, the display panel 10 is in the detection stage, and whether or not there is a crack at the edge of the display panel 10 is determined by judging whether or not the sub-pixel 1061 in the sub-pixel group 106 connected to the light emission control signal line 103 emits light of the target color. When the first thin film transistor is turned off, an input signal in the input signal line 102 is not transmitted to the light emission control signal line 103 through the turned-on first thin film transistor. In this case, the display panel 10 is in the display stage, and it is not possible to determine whether or not there is a crack at the edge of the display panel 10 by judging whether or not the sub-pixel 1061 in the sub-pixel group 106 connected to the light emission control signal line 103 emits light of the target color.

Optionally, each detection circuit 105 includes one first thin film transistor, and may also include a plurality of first thin film transistors, where the number of first thin film transistors included in each detection circuit 105 is not limited in the embodiment of the present application.

In an embodiment of the present application, each sub-pixel 1061 may include a pixel circuit and a light emitting unit (not shown in the drawings). The pixel circuit may include a second thin film transistor. The gate electrode of the second thin film transistor may be electrically connected to the light emission control signal line 103, the first electrode of the second thin film transistor may be electrically connected to the driving signal line, and the second electrode of the second thin film transistor may be electrically connected to the light emitting unit.

Wherein the second thin film transistor may be configured to be turned off when an input signal transmitted from the light emission control signal line 103 is received, and configured to be turned on when an input signal transmitted from the light emission control signal line 103 is not received.

Since the second thin film transistor is turned off when receiving the input signal transmitted from the light emission control signal line 103, the driving signal supplied from the driving signal line cannot be transmitted to the light emitting unit through the second thin film transistor, and the light emitting unit does not emit light. That is, the sub-pixel 1061 emits light of a target color, which may be black.

Since the second thin film transistor is turned on when the input signal transmitted from the light emission control signal line 103 is not received, the driving signal supplied from the driving signal line can be transmitted to the light emitting unit through the second thin film transistor, and the light emitting unit emits light (i.e., the sub-pixel 1061 does not emit light of a target color).

In the embodiment of the present application, the emission control signal line 103 may also be electrically connected to an emission control (EM) circuit 108 in the display panel 10. When the second thin film transistor receives the input signal transmitted by the light emission control signal line 103, the second thin film transistor may be turned off by the combination of the input signal and the light emission control signal supplied from the light emission control circuit 108 through the light emission control signal line 103. When the second thin film transistor does not receive the input signal transmitted by the light emission control signal line 103, the second thin film transistor may be turned on by the light emission control signal supplied from the light emission control circuit 108 through the light emission control signal line 103.

Alternatively, both the first thin film transistor and the second thin film transistor may be P-type transistors. The potential of the input signal supplied from the input signal line 102 may be a first potential, and the potential of the light emission control signal supplied from the light emission control circuit 108 through the light emission control signal line 103 may be a second potential. Wherein the first potential is a high potential relative to the second potential.

In the detection phase, the potential of the switch control signal provided by the switch control line 104 may be a second potential, and the first thin film transistor is turned on under the control of the switch control signal of the second potential. An input signal of a first potential supplied from the input signal line 102 can be transmitted to the light emission control signal line 103 through the turned-on first thin film transistor. The second thin film transistor is turned off under the combined action of the first potential input signal and the second potential light emission control signal (the first potential input signal pulls the second potential light emission control signal high, so that the second thin film transistor cannot be turned on). Thereby causing the sub-pixel 1061 to emit light of the target color.

In the display phase, the potential of the switch control signal provided by the switch control line 104 may be a first potential, and the first thin film transistor is turned off under the control of the switch control signal of a second potential. An input signal of the first potential supplied from the input signal line 102 is not transmitted to the light emission control signal line 103 through the first thin film transistor. The second thin film transistor is turned on by the light emission control signal of the second potential. Whereby the sub-pixel 1061 does not emit light of the target color.

In the embodiment of the present application, in the detection stage, the portion of the display panel 10 located in the display area 101a may be first caused to display a white screen (or a gray screen). Thereafter, the switch control line 104 is caused to supply a switch control signal of the second potential. If there is no crack at the edge of the display panel 10, the portion of the display panel 10 located in the display area 101a will display regularly arranged black lines. For example, in the case where the detection circuits 105 are uniformly distributed, black line pages are uniformly distributed. If there is a crack at the edge of the display panel 10, the black line at the portion of the display panel 10 located in the display area 101a disappears in the vicinity of the position of the crack.

It should be noted that, in the detection stage, the first switch control line 104a may be caused to provide the first switch control signal of the second potential, and the second switch control line 104b may be caused to provide the second switch control signal of the first potential. In this case, it is detected whether or not there is a crack in the first sub-region of the display panel 10 near the peripheral region 101b of the second boundary 101a2 of the display region 101a and near the peripheral region 101b of the third boundary 101a3 of the display region 101 a. In addition, the second switch control line 104b may be caused to provide a first switch control signal at a first potential and the second switch control line 104b may be caused to provide a second switch control signal at a second potential. In this case, it is detected whether or not there is a crack in the second sub-region of the display panel 10 near the peripheral region 101b of the fourth boundary 101a4 of the display region 101a and near the peripheral region 101b of the third boundary 101a3 of the display region 101 a. Wherein the first sub-zone is close to the second boundary 101a2 with respect to the second sub-zone.

In addition, in order to avoid the influence of the leakage current on the light emission control signal supplied from the light emission control circuit 108 through the light emission control signal line 103, the first thin film transistor having a longer channel can be appropriately selected.

In an embodiment of the present application, referring to fig. 1, 3 and 4, the display panel 10 may further include a driving integrated circuit 109, the driving integrated circuit 109 may have a plurality of signal interfaces, the driving integrated circuit 109 may provide an input signal to the input signal line 102 through the signal interfaces, and may provide a switch control signal to the switch control line 104 through the signal interfaces. The driving integrated circuit 109 provides a signal interface of an input signal to the input signal line 102, and a signal interface of a switching control signal to the switching control line 104 is a different signal interface.

It should be noted that, the potential of the input signal provided by the input signal line in the display panel 10 provided by the embodiment of the present application may be the same as the potential of the signal provided by the VGH signal line of the array substrate row driving circuit in the display panel 10. The input signal line and the VGH signal line are different signal lines.

Fig. 9 is a flowchart of a crack detection method of a display panel according to an embodiment of the present application. The method can be used to detect the display panel provided by the above embodiment. Referring to fig. 9, taking an example that the first potential is high relative to the second potential, the crack detection method provided by the embodiment of the present application is described as follows:

in step 201, in the detection phase, for each detection circuit, the detection circuit controls the transmission of an input signal of the first potential provided by the input signal line to a light emission control signal line electrically connected to the detection circuit in response to a switch control signal of the second potential provided by the switch control line.

In the embodiment of the present application, in the detection phase, the potential of the switch control signal provided by the switch control line 104 may be the second potential. The detection circuit 105 transmits an input signal of the first potential supplied from the input signal line 102 to the light emission control signal line 103 under the control of a switch control signal of the second potential.

Alternatively, the detection circuit 105 may include a first thin film transistor, and the first thin film transistor may be a P-type transistor. The second potential is low relative to the first potential. In the case where the potential of the switching control signal supplied from the switching control line 104 is the second potential, the first thin film transistor may be turned on so that an input signal of the first potential is transmitted to the light emission control signal line 103 through the turned-on first thin film transistor.

Step 202, determining whether a plurality of sub-pixels in a sub-pixel group connected to the light emission control signal line emit light of a target color.

In an embodiment of the present application, the light emission control signal line 103 may be electrically connected to a plurality of sub-pixels 1061 in the sub-pixel group 106. The plurality of sub-pixels 1061 in the sub-pixel group 106 may emit light by a signal transmitted by the light emission control signal line 103. If it is determined that the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 emit light of the target color, the following step 203 is continued; if it is determined that the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 do not emit light of the target color, the following step 204 is continued.

Alternatively, the sub-pixel 1061 may include a pixel circuit and a light emitting unit. The pixel circuit may include a second thin film transistor, and the second thin film transistor may be a P-type transistor. The gate electrode of the second thin film transistor may be electrically connected to the light emission control signal line 103, the light emission control signal line 103 may be further electrically connected to the light emission control circuit 108 in the display panel 10, the first electrode of the second thin film transistor may be electrically connected to the driving signal line, and the second electrode of the second thin film transistor may be electrically connected to the light emitting unit. The potential of the light emission control signal supplied from the light emission control circuit 108 through the light emission control signal line 103 may be a second potential.

When the second thin film transistor receives the input signal of the first potential transmitted by the light emission control signal line 103, the second thin film transistor may be turned off under the combined action of the input signal and the light emission control signal of the second potential provided by the light emission control signal line 103 (the input signal of the first potential pulls the light emission control signal of the second potential high, and cannot reach the on potential of the second thin film transistor). In this case, the driving signal supplied from the driving signal line cannot be transmitted to the light emitting unit through the second thin film transistor, and the light emitting unit does not emit light. That is, the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the light emission control signal line 103 emit light of the target color, and the following step 203 is continued.

The second thin film transistor may be turned on by the light emission control signal of the second potential supplied from the light emission control circuit 108 through the light emission control signal line 103 when the second thin film transistor does not receive the input signal of the first potential transmitted from the light emission control signal line 103. In this case, the driving signal supplied from the driving signal line can be transmitted to the light emitting unit through the second thin film transistor, and the light emitting unit emits light. That is, the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 do not emit light of the target color, and the following step 204 is continued.

Step 203, determining that a plurality of sub-pixels in the sub-pixel group connected to the light emission control signal line can receive an input signal from the light emission control signal line, wherein no crack exists in a vicinity of the detection circuit in the display panel.

In the embodiment of the present application, if the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 emit light of the target color, it may be explained that the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 can receive the input signal of the first potential from the emission control signal line 103. Further, there is no crack in the display panel 10 in the vicinity of the detection circuit 105.

The proximity region of the detection circuit 105 may refer to a region where a distance from the detection circuit 105 is smaller than a distance threshold. The distance threshold may be a predetermined fixed value.

In step 204, it is determined that a plurality of sub-pixels in the sub-pixel group connected to the light emission control signal line cannot receive the input signal from the light emission control signal line, and a crack exists in a vicinity of the detection circuit in the display panel.

In the embodiment of the present application, if the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 cannot emit the light of the target color, it may be explained that the plurality of sub-pixels 1061 in the sub-pixel group 106 connected to the emission control signal line 103 cannot receive the input signal of the first potential from the emission control signal line 103. Further, there is a crack in the display panel 10 in the vicinity of the detection circuit 105.

Step 205, determining the position of the crack in the display panel based on the position of the detection circuit.

In the case where it is determined that there is a crack in the vicinity of the display panel 10 located in the detection circuit 105, the position of the crack in the display panel 10 may be determined based on the position of the detection circuit 105. Alternatively, the position of the signal connection line 107 connected to the detection circuit 105 on the display panel 10 may be determined as the position of the crack in the display panel 10.

In step 206, in the display phase, for each detection circuit, the detection circuit responds to the switch control signal of the first potential provided by the switch control line, and the input signal provided by the control input signal line cannot be transmitted to the light emitting control signal line electrically connected with the detection circuit.

In the embodiment of the present application, in the display stage, the potential of the switch control signal provided by the switch control line 104 may be the first potential. The detection circuit 105 cannot transmit the input signal supplied from the input signal line 102 to the light emission control signal line 103 under the control of the switching control signal of the first potential.

Optionally, in the case that the potential of the switch control signal provided by the switch control line 104 is the first potential, the first thin film transistor may be turned off, so as to avoid that the input signal is transmitted to the light emitting control signal line 103 through the first thin film transistor, and ensure the normal display of each sub-pixel 1061 in the sub-pixel group 106.

In summary, the embodiment of the application provides a crack detection method for a display panel, which can determine that no crack exists at the edge of the display panel when a plurality of sub-pixels in a sub-pixel group emit light with a target color; a plurality of sub-pixels in the sub-pixel group cannot emit light of a target color, and it is determined that a crack exists at an edge of the display panel. When the display panel has a crack, the position of the crack of the display panel can be determined based on the position of the sub-pixel group that does not emit light of the target color and the position of the detection circuit connected to the sub-pixel group. Therefore, the preparation process of the display panel can be improved by determining the form of the crack, so that the yield of the display panel obtained by subsequent preparation is ensured.

Fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present application. As can be seen with reference to fig. 10, the display device may include a power supply assembly 30 and the display panel 10 provided by the above-described embodiments. The power supply assembly 30 may be connected to the display panel 10 to supply power to the display panel 10.

Optionally, the display device may be any product or component with a display function and a fingerprint identification function, such as an organic light emitting diode display device, electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame or a navigator.

The foregoing description of the preferred embodiments of the present application is not intended to limit the application, but rather, the application is to be construed as limited to the appended claims.

Claims

1. A display panel, characterized in that the display panel (10) comprises:

a substrate (101), wherein the substrate (101) has a display region (101 a) and a peripheral region (101 b) surrounding the display region (101 a), and the boundary of the display region (101 a) comprises a first boundary (101 a 1), a second boundary (101 a 2), a third boundary (101 a 3) and a fourth boundary (101 a 4) which are sequentially connected;

at least one input signal line (102), at least one of the input signal lines (102) being located on one side of the substrate board (101) and being located in the peripheral region (101 b), the at least one input signal line (102) comprising a first input signal line (102 a) and a second input signal line (102 b);

a plurality of light emission control signal lines (103), the plurality of light emission control signal lines (103) being located on one side of the substrate base (101), and each of the light emission control signal lines (103) being located in the display region (101 a);

at least one switch control line (104), at least one of the switch control lines (104) being located on one side of the substrate base plate (101) and being located in the peripheral region (101 b), the at least one switch control line (104) comprising a first switch control line (104 a) and a second switch control line (104 b);

A plurality of detection circuits (105), the plurality of detection circuits (105) being located on one side of the substrate base plate (101) and being located in the peripheral region (101 b), the plurality of detection circuits (105) comprising a plurality of first detection circuits (105 a) and a plurality of second detection circuits (105 b); each detection circuit (105) is electrically connected with one input signal line (102), one light-emitting control signal line (103) and one switch control line (104), and each detection circuit (105) is used for responding to a switch control signal provided by the switch control line (104) and controlling the input signal provided by the input signal line (102) to be transmitted to the light-emitting control signal line (103);

a plurality of sub-pixel groups (106), the plurality of sub-pixel groups (106) being located on one side of the substrate board (101) and being located in the display area (101 a), a plurality of sub-pixels (1061) included in each of the sub-pixel groups (106) being electrically connected to one of the emission control signal lines (103), the plurality of sub-pixels (1061) in each of the sub-pixel groups (106) being configured to emit light of a target color upon receiving an input signal from the emission control signal line (103);

and a plurality of signal connection lines (107) in one-to-one correspondence with the plurality of detection circuits (105), the plurality of signal connection lines (107) being located on one side of the substrate (101) and being located in the peripheral region (101 b), the plurality of signal connection lines (107) including a plurality of first signal connection lines (107 a) in one-to-one correspondence with the plurality of first detection circuits (105 a) and a plurality of second signal connection lines (107 b) in one-to-one correspondence with the plurality of second detection circuits (105 b); wherein one end of each signal connection line (107) is electrically connected with the input signal line (102), the other end is electrically connected with the corresponding detection circuit (105), and at least part of each signal connection line (107) is far away from the display area (101 a) relative to the input signal line (102);

Wherein the plurality of first detection circuits (105 a), the first input signal line (102 a), the first switch control line (104 a) and the plurality of first signal connection lines (107 a) are located in the peripheral region (101 b) close to the second boundary (101 a 2) of the display region (101 a), one end of the first signal connection line (107 a) is electrically connected to the first input signal line (102 a), the other end is electrically connected to the corresponding first detection circuit (105 a), and the first detection circuit (105 a) is also electrically connected to the first switch control line (104 a);

the plurality of second detection circuits (105 b), the second input signal line (102 b), the second switch control line (104 b) and the plurality of first signal connection lines (107 a) are located near the peripheral region (101 b) of the fourth boundary (101 a 4) of the display region (101 a), one end of the second signal connection line (107 b) is electrically connected to the second input signal line (102 b), the other end is electrically connected to the corresponding second detection circuit (105 b), and the second detection circuit (105 b) is also electrically connected to the second switch control line (104 b).

2. The display panel of claim 1, wherein the display panel comprises,

-a first target signal connection line (107 a 1) of the plurality of first signal connection lines (107 a) is further located in the peripheral region (101 b) close to a third boundary (101 a 3) of the display region (101 a), the first target signal connection line (107 a 1) being one of the plurality of first signal connection lines (107 a) having a largest distance to the first boundary (101 a 1);

the second target signal connection line (107 b 1) of the plurality of second signal connection lines (107 b) is further located in the peripheral region (101 b) close to the third boundary (101 a 3) of the display region (101 a), and the second target signal connection line (107 b 1) is one second signal connection line (107 b) with the largest distance between the second signal connection line (107 b) and the first boundary (101 a 1).

3. The display panel according to claim 1, wherein the plurality of first detection circuits (105 a) are uniformly distributed in the peripheral region (101 b) close to the second boundary (101 a 2) of the display region (101 a);

the plurality of second detection circuits (105 b) are uniformly distributed in the peripheral region (101 b) near a fourth boundary (101 a 4) of the display region (101 a).

4. The display panel according to claim 1, characterized in that the display panel (10) comprises a range of the number of the first detection circuits (105 a) and the display panel (10) comprises a range of the number of the second detection circuits (105 b) of 1/20 to 1/6 of the number of the sub-pixel groups (106).

5. The display panel according to claim 1, wherein each of the signal connection lines (107) comprises: a plurality of connecting line segments connected in sequence, wherein the extending directions of any two connecting line segments connected with each other are intersected;

wherein at least one of the plurality of connection line segments is distant from the display area (101 a) with respect to the input signal line (102).

6. A display panel according to any one of claims 1 to 5, wherein each of the input signal lines (102) and each of the switch control lines (104) extend in a first direction (X), each of the light emission control signal lines (103) extend in a second direction (Y), the second direction (Y) intersecting the first direction (X);

the plurality of sub-pixel groups (106) are arranged along the first direction (X), and a plurality of sub-pixels (1061) included in each sub-pixel group (106) are arranged along the second direction (Y).

7. The display panel according to any one of claims 1 to 5, wherein each of the detection circuits (105) includes a first thin film transistor;

the grid electrode of the first thin film transistor is electrically connected with the switch control line (104), the first electrode of the first thin film transistor is electrically connected with the input signal line (102), and the second electrode of the first thin film transistor is electrically connected with the light-emitting control signal line (103).

8. A display panel according to any one of claims 1 to 5, wherein each of the sub-pixels (1061) comprises a second thin film transistor; the grid electrode of the second thin film transistor is electrically connected with the light-emitting control signal line (103);

wherein the second thin film transistor is configured to be turned off when the input signal transmitted by the light emission control signal line (103) is received, and configured to be turned on when the input signal transmitted by the light emission control signal line (103) is not received.

9. The display panel of claim 8, wherein the target color is black.

10. A crack detection method of a display panel, characterized in that the method is used for detecting the display panel (10) according to any one of claims 1 to 9, the method comprising:

in a detection phase, for each detection circuit (105), the detection circuit (105) is responsive to a switch control signal of a second potential provided by a switch control line (104) to control transmission of an input signal of the first potential provided by the input signal line (102) to a light emission control signal line (103) electrically connected to the detection circuit (105);

determining whether or not a plurality of sub-pixels (1061) in a sub-pixel group (106) connected to the light emission control signal line (103) emit light of a target color;

If a plurality of sub-pixels (1061) in a sub-pixel group (106) connected to the light emission control signal line (103) emit light of a target color, determining that the plurality of sub-pixels (1061) in the sub-pixel group (106) connected to the light emission control signal line (103) can receive an input signal from the light emission control signal line (103), wherein no crack exists in a vicinity of the detection circuit (105) in the display panel (10);

if a plurality of sub-pixels (1061) in the sub-pixel group (106) connected to the light emission control signal line (103) do not emit light of a target color, determining that the plurality of sub-pixels (1061) in the sub-pixel group (106) connected to the light emission control signal line (103) cannot receive an input signal from the light emission control signal line (103), wherein a crack exists in a vicinity of the detection circuit (105) in the display panel (10);

if a crack exists in the display panel (10) in the vicinity of the detection circuit (105), determining the position of the crack in the display panel (10) based on the position of the detection circuit (105).

11. The method of claim 10, wherein the determining the location of the crack in the display panel (10) based on the location of the detection circuit (105) comprises:

The position of a signal connection line (107) connected to the detection circuit (105) on the display panel (10) is determined as the position of a crack in the display panel (10).

12. The method according to claim 10 or 11, characterized in that the method further comprises:

in a display stage, for each of the detection circuits (105), the detection circuit (105) controls the input signal supplied from the input signal line (102) not to be transmitted to the light emission control signal line (103) in response to a switching control signal of a first potential supplied from the switching control line (104).

13. A display device, characterized in that the display device comprises: -a power supply assembly (30) and-a display panel (10) according to any of claims 1 to 9;

the power supply assembly (30) is used for supplying power to the display panel (10).