CN111258125B - Display panel, preparation method thereof and display device - Google Patents

Display panel, preparation method thereof and display device Download PDF

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Publication number
CN111258125B
CN111258125B CN202010105103.XA CN202010105103A CN111258125B CN 111258125 B CN111258125 B CN 111258125B CN 202010105103 A CN202010105103 A CN 202010105103A CN 111258125 B CN111258125 B CN 111258125B
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insulating layer
substrate
layer
organic insulating
display panel
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CN111258125A (en
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叶成枝
操彬彬
吕艳明
安晖
栗芳芳
王明明
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

The embodiment of the invention provides a display panel, a preparation method thereof and a display device, relates to the technical field of display, and can avoid display faults of the display panel caused by gas generated by an organic insulating layer; and water vapor and oxygen can be prevented from entering the display area of the display panel, so that the display effect of the display panel is prevented from being influenced. A display panel has a display area; the display panel comprises an array substrate, a box-matching substrate and frame sealing glue, wherein the array substrate and the box-matching substrate are mutually combined; the array substrate comprises a flat layer; the flat layer comprises a first inorganic insulating layer, an organic insulating layer and a second inorganic insulating layer which are sequentially stacked along the direction of the array substrate to the box substrate, and the array substrate further comprises a cross-linking pattern arranged between the organic insulating layer and the second inorganic insulating layer; the cross-linking pattern is positioned on one side of the frame sealing glue, which is away from the display area.

Description

Display panel, preparation method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a preparation method thereof and a display device.
Background
The display device comprises an array substrate, wherein the array substrate comprises a substrate and a thin film transistor arranged on the substrate, the thin film transistor has a certain pattern, and planarization treatment is needed to be carried out on the array substrate by utilizing a planarization layer.
In the prior art, organic insulating materials are generally used as the material of the planarization layer because the organic materials have the characteristics of low dielectric constant, high thickness and planarization.
Disclosure of Invention
The embodiment of the invention provides a display panel, a preparation method thereof and a display device, which can avoid display faults of the display panel caused by gas generated by an organic insulating layer; and water vapor and oxygen can be prevented from entering the display area of the display panel, so that the display effect of the display panel is prevented from being influenced.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical scheme:
in a first aspect, a display panel is provided, having a display area; the display panel comprises an array substrate, a box-matching substrate and frame sealing glue, wherein the array substrate and the box-matching substrate are mutually combined, and the frame sealing glue is arranged between the array substrate and the box-matching substrate; the array substrate comprises a flat layer; the flat layer comprises a first inorganic insulating layer, an organic insulating layer and a second inorganic insulating layer which are sequentially stacked along the direction of the array substrate to the box-aligning substrate, and the array substrate further comprises a cross-linking pattern arranged between the organic insulating layer and the second inorganic insulating layer; the cross-linking pattern is positioned on one side of the frame sealing glue, which is away from the display area.
Optionally, the array substrate further includes a protective layer disposed between the cross-linking pattern and the second inorganic insulating layer, where an orthographic projection of the protective layer on the alignment substrate and an orthographic projection of the cross-linking pattern on the alignment substrate completely overlap.
Optionally, edges of the first inorganic insulating layer and the second inorganic insulating layer exceed edges of the organic insulating layer; the cross-linking pattern covers a side surface of the organic insulating layer and a surface close to the pair of cartridge substrates.
Optionally, the organic insulating layer includes a trench, and an orthographic projection of the trench on the pair of box substrates overlaps with an orthographic projection of the frame sealing glue on the pair of box substrates.
Optionally, the array substrate further includes a first electrode disposed between the organic insulating layer and the second inorganic insulating layer; the first electrode is at least located in the display area, and the first electrode and the protective layer are made of the same material.
In a second aspect, a display device is provided, including the display panel of the first aspect.
In a third aspect, there is provided a method of manufacturing a display panel having a display area, the method comprising: forming an array substrate and a box-aligning substrate respectively, and enabling the array substrate and the box-aligning substrate to be combined by utilizing frame sealing glue; forming the array substrate, including: sequentially forming a first inorganic insulating layer and an organic insulating layer on a substrate; forming a cross-linking pattern and a protective layer on one side of the organic insulating layer, which is away from the substrate, wherein the protective layer is positioned on one side of the cross-linking pattern, which is away from the substrate; the cross-linking pattern and the protective layer are positioned on one side of the frame sealing glue, which is away from the display area, and orthographic projections of the cross-linking pattern and the protective layer on the substrate are completely overlapped; and forming a second inorganic insulating layer on one side of the organic insulating layer, which is away from the substrate, wherein the first inorganic insulating layer, the organic insulating layer and the second inorganic insulating layer form a flat layer.
Optionally, the forming a cross-linking pattern and a protective layer on a side of the organic insulating layer facing away from the substrate includes: performing plasma treatment on the organic insulating layer to form a crosslinked layer; forming a protective layer on one side of the crosslinked layer away from the substrate; and performing plasma treatment on the crosslinked layer by taking the protective layer as a mask to form the crosslinked pattern.
Optionally, performing plasma treatment on the organic insulating layer to form a crosslinked layer, including: performing plasma treatment on the surface of the organic insulating layer, which is away from the substrate, by using one of helium gas or argon gas; treating the crosslinked layer to form the crosslinked pattern, comprising: performing plasma treatment on the crosslinked layer by using one of nitrogen, oxygen and hydrogen to form the crosslinked pattern; and carrying out plasma treatment on the surface of the organic insulating layer, which is away from the substrate, and carrying out plasma treatment on the crosslinking layer, wherein the time and the power of the plasma treatment are the same.
Optionally, the surface of the organic insulating layer facing away from the substrate is subjected to plasma treatment, and the cross-linked layer is subjected to plasma treatment for a time ranging from 10 to 30 seconds and a power ranging from 8 to 24kw.
Optionally, the array substrate further includes a first electrode located in the display area; the protective layer and the first electrode are formed through the same patterning process.
The embodiment of the invention provides a display panel, a preparation method thereof and a display device. In this way, on the one hand, during high-temperature, high-humidity and high-reliability evaluation, the gas released by the organic insulating layer does not pass through the cross-linking pattern and enters the interface between the first inorganic insulating layer and the second inorganic insulating layer, so that the first inorganic insulating layer and the second inorganic insulating layer float, and the display panel is caused to display faults; on the other hand, although the cross-linking pattern is arranged on one side of the frame sealing glue, which is far away from the display area, so that the connection between the cross-linking pattern and the protective layer is not firm, after entering the interface, water vapor and oxygen are blocked by the frame sealing glue and cannot further enter the display area, and therefore, an LC bubble cannot be formed in the display area, and the display effect of the display panel is affected.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the invention;
FIG. 2 is a schematic cross-sectional view taken along line A-A1 of FIG. 1;
FIG. 3 is a schematic diagram of a process for forming a cross-linking pattern according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a display panel according to the prior art;
FIG. 5 is a schematic structural diagram of a display panel according to the prior art;
fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 7 is a flowchart of a preparation of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a process for forming a cross-linking pattern according to an embodiment of the present invention.
Reference numerals:
10-an array substrate; 11-a substrate; 121-a first inorganic insulating layer; 122-an organic insulating layer; 123-a second inorganic insulating layer; 13-a thin film transistor; 14-crosslinking pattern; 141-a crosslinked layer; 15-a protective layer; 16-a first electrode; 17-a second electrode; 20-a pair of box substrates; 30-sealing frame glue; 41-an orientation layer; 51-liquid crystal bubbles; 60-liquid crystal layer.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention provides a display panel, as shown in fig. 1 and 2, which is provided with a display area; the display panel comprises an array substrate 10, a box substrate 20 and frame sealing glue 30 arranged between the array substrate 10 and the box substrate 20; the array substrate 10 includes a flat layer; along the direction of the array substrate 10 pointing to the opposite box substrate 20, the flat layer comprises a first inorganic insulating layer 121, an organic insulating layer 122 and a second inorganic insulating layer 123 which are sequentially stacked, and the array substrate 10 further comprises a cross-linking pattern 14 arranged between the organic insulating layer 122 and the second inorganic insulating layer 123; the cross-linking pattern 14 is located on the side of the frame sealing glue 30 facing away from the display area.
In some embodiments, the array substrate 10 further includes a substrate 11 and a thin film transistor 13 disposed between the substrate 11 and the planarization layer.
Since the thin film transistor 13 has a certain pattern, the surface of the array substrate 10 is rugged, and thus a flat layer may be provided on the side of the thin film transistor 13 facing away from the substrate 11.
The thin film transistor 13 may be at least one of a bottom gate thin film transistor, a top gate thin film transistor, or a double gate thin film transistor.
In some embodiments, the display panel further includes a color filter layer, a black matrix, and an alignment layer 41. The color filter layer and the black matrix may be provided on the array substrate 10 or on the counter substrate 20. The alignment layer 41 is provided on both the array substrate 10 and the counter substrate 20.
In some embodiments, the parasitic capacitance of the display panel may be reduced by using an organic insulating material as compared to an inorganic insulating material, thereby facilitating the circuit board to drive the display panel to display.
Considering that moisture and oxygen easily enter the display area through the organic insulating layer 122, the overall display effect of the display panel is affected. Thus, in the embodiment of the present invention, the first inorganic insulating layer 121 is disposed on the side of the organic insulating layer 122 close to the substrate 11, and the second inorganic insulating layer 123 is disposed on the side of the organic insulating layer 122 away from the substrate 11.
In some embodiments, the display panel further includes a non-display region located at a periphery of the display region. The frame sealing glue 30 and the cross-linking pattern 14 are both positioned in the non-display area.
The first inorganic insulating layer 121, the organic insulating layer 122, and the second inorganic insulating layer 123 in the planarization layer are located in both the display area and the non-display area.
In some embodiments, the material of the first inorganic insulating layer 121 and the second inorganic insulating layer 123 may be, for example, silicon nitride (SiN) x ) Or silicon oxide (SiO) y ) And transparent inorganic insulating materials. The material of the first inorganic insulating layer 121 and the material of the second inorganic insulating layer 123 may be the same or different.
The material of the organic insulating layer 122 may be, for example, a transparent organic insulating material such as a resin.
In some embodiments, the cross-linking pattern 14 may be obtained by treating the organic insulating layer 122.
Specifically, as shown in fig. 3, the organic insulating layer 122 may be subjected to plasma treatment using one of helium (He) or argon (Ar) to obtain the crosslinked layer 141. The crosslinking layer 141 covers the side of the organic insulating layer 122 and the surface facing away from the substrate 11.
Thereafter, a protective layer 15 is formed on the side of the crosslinked layer 141 facing away from the substrate 11, and the protective layer 15 is used as a mask, using nitrogen (N) 2 ) Oxygen (O) 2 ) Hydrogen (H) 2 ) The cross-linking layer 141 is subjected to plasma treatment to form the cross-linking pattern 14.
Here, the orthographic projection of the crosslinked pattern 14 on the substrate 11 using the protective layer 15 as a mask is completely overlapped with the orthographic projection of the crosslinked pattern 14 on the substrate 11.
In some embodiments, after the cross-linking pattern 14 is formed, the protective layer 15 may be removed, or the protective layer 15 may be remained.
Alternatively, the protective layer 15 may be left to reduce the process of peeling off the protective layer 15, thereby simplifying the manufacturing process of the array substrate 10.
In some embodiments, the material of the protective layer 15 is not limited as long as the pattern of the protective layer 15 is not affected in the process of forming the crosslinked pattern 14 from the crosslinked layer 141.
In the related art, since the surface of the organic insulating layer 122 is rough, when the display panel is evaluated at high temperature, high humidity and high reliability, the high temperature forces the organic insulating layer 122 to release gas into the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123, so that the first inorganic insulating layer 121 and the second inorganic insulating layer 123 float (fig. 4), and the display panel is failed.
If the smooth and dense crosslinked layer 141 is formed, the gas released from the organic insulating layer 122 cannot enter the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123 during the high temperature, high humidity and high voltage reliability evaluation. However, the smooth cross-linking layer 141 may affect the fixed connection between the organic insulating layer 122 and the second inorganic insulating layer 123, so that water vapor and oxygen may easily enter the display area of the display panel from the interface between the organic insulating layer 122 and the second inorganic insulating layer 123, forming liquid crystal bubbles (LC bubbles) 51 as shown in fig. 5, and affecting the display effect of the display panel.
Based on this, the embodiment of the invention provides a display panel, which includes the cross-linking pattern 14 disposed between the organic insulating layer 122 and the second inorganic insulating layer 123, and the cross-linking pattern 14 is only located at the side of the frame sealing glue 30 facing away from the display area. In this way, on the one hand, in the high-temperature high-humidity high-reliability evaluation, the gas released from the organic insulating layer 122 does not pass through the crosslinked pattern 14 and enters the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123, causing the first inorganic insulating layer 121 and the second inorganic insulating layer 123 to float, thereby causing the display panel to display a failure; on the other hand, although the cross-linking pattern 14 is disposed on the side of the frame sealing glue 30 facing away from the display area, the connection between the cross-linking pattern 14 and the protective layer 15 is not firm, after entering the interface, the water vapor and oxygen are blocked by the frame sealing glue 30 and cannot enter the display area further, so that an LC bubble cannot be formed in the display area, and the display effect of the display panel is not affected.
Alternatively, as shown in fig. 2, edges of the first and second inorganic insulating layers 121 and 123 are beyond edges of the organic insulating layer 122; the cross-linking pattern 14 and the protective layer 15 cover the side of the organic insulating layer 122 and the surface facing away from the substrate 11.
In the embodiment of the present invention, the edges of the first inorganic insulating layer 121 and the second inorganic insulating layer 123 exceed the edges of the organic insulating layer 122, so that water vapor and oxygen can be prevented from entering the organic insulating layer 122 from the side surface of the organic insulating layer 122, and then entering the display panel. Meanwhile, the cross-linking pattern 14 is made to cover the side surface of the organic insulating layer 122 and the surface facing away from the substrate 11, so that the gas generated from the organic insulating layer 122 can be effectively prevented from being released to the outside of the display panel from the side surface of the organic insulating layer 122 and the surface facing away from the substrate 11.
Optionally, as shown in fig. 2, the organic insulating layer 122 includes a trench, and an orthographic projection of the trench on the substrate 11 overlaps with an orthographic projection of the sealant 30 on the substrate 11.
In some embodiments, the depth of the trench may be less than or equal to the thickness of the organic insulating layer 122.
When the depth of the trench is equal to the thickness of the organic insulating layer 122, the trench penetrates through the organic insulating layer 122.
In the embodiment of the invention, the grooves are arranged in the organic insulating layer 122, and the orthographic projection of the grooves on the substrate 11 overlaps with the orthographic projection of the frame sealing glue 30 on the substrate 11, so that the organic insulating layer 122 is more firmly arranged between the array substrate 10 and the opposite box substrate 20, thereby improving the water blocking performance of the frame sealing glue 30.
Optionally, as shown in fig. 6, the array substrate 10 further includes a first electrode 16 disposed between the organic insulating layer 122 and the second inorganic insulating layer 123; the first electrode 16 is at least located in the display area, and the first electrode 16 and the protective layer 15 are made of the same material.
On the basis, the array substrate 10 further comprises a second electrode 17 arranged on one side of the second inorganic insulating layer 123 away from the substrate 11; the display panel further includes a liquid crystal layer 60 disposed between the array substrate 10 and the counter substrate 20; the second electrode 17 and the liquid crystal layer 60 are located at least in the display area; the first electrode 16 and the second electrode 17 are used to drive the liquid crystal in the liquid crystal layer 60 to deflect.
In some embodiments, the first electrode 16 is a pixel electrode and the second electrode 17 is a common electrode; alternatively, the first electrode 16 is a common electrode, and the second electrode 17 is a pixel electrode.
Here, the first electrode 16 is exemplified as a pixel electrode, and the pixel electrode is electrically connected to the drain of the thin film transistor 13. A via hole may be provided on the organic insulating layer 122 to electrically connect the pixel electrode with the drain electrode of the thin film transistor 13, so as to avoid the mutual influence between the pixel electrode and other signal lines due to the fact that the pixel electrode and other signal lines are provided on the same layer; meanwhile, the width of the black matrix can be reduced, and the aperture opening ratio of the display panel is improved.
In some embodiments, the first electrode 16 and the protective layer 15 are made of the same material, i.e., the first electrode 16 and the protective layer 15 are obtained by the same patterning process, which can simplify the manufacturing process of the array substrate 10.
Here, the material of the first electrode 16 and the protective layer 15 may be, for example, a transparent conductive material such as Indium Tin Oxide (ITO).
The embodiment of the invention also provides a display device, which comprises the display panel of any one of the previous embodiments.
In some embodiments, the use of the display device is not limited, and the display device may be used as a computer, a tablet, a cell phone, a wristwatch, or the like, for example.
In some embodiments, the display device may further include a backlight module disposed on a side of the array substrate 10 facing away from the counter substrate 20, for providing a light source for the display panel.
Here, the backlight module may be a side-in backlight module or a direct-down backlight module.
The embodiment of the invention provides a display device, which has the same technical effects as the display panel and is not described herein.
The embodiment of the invention also provides a preparation method of the display panel, wherein the display panel is provided with a display area, and the preparation method of the display panel comprises the following steps: an array substrate 10 and a counter substrate 20 are formed respectively, and the array substrate 10 and the counter substrate 20 are aligned by using a frame sealing adhesive 30.
As shown in fig. 7, the array substrate 10 is formed by:
s11, a first inorganic insulating layer 121 and an organic insulating layer 122 are sequentially formed on the substrate 11.
In some embodiments, before forming the first inorganic insulating layer 121, the method for preparing the array substrate 10 further includes: the thin film transistor 13 is formed.
The thin film transistor 13 may be at least one of a bottom gate thin film transistor, a top gate thin film transistor, or a double gate thin film transistor.
In some embodiments, the organic insulating layer 122 may be formed using a photolithography process.
If the material of the organic insulating layer 122 includes a photosensitive material, a coating, exposing, and developing process may be used to obtain the organic insulating layer 122.
If the material of the organic insulating layer 122 does not include photosensitive material, an organic insulating film and photoresist may be sequentially formed on the substrate 11, the photoresist may be exposed and developed to form a photoresist pattern, the organic insulating film may be etched to form the organic insulating layer 122, and the photoresist pattern may be removed.
S12, forming a cross-linked pattern 14 and a protective layer 15 on the side of the organic insulating layer 122, which is away from the substrate 11, wherein the protective layer 15 is positioned on the side of the cross-linked pattern 14, which is away from the substrate 11; the cross-linking pattern 14 and the protective layer 15 are located on the side of the frame sealing glue 30 facing away from the display area, and the orthographic projections of the cross-linking pattern 14 and the protective layer 15 on the substrate 11 are completely overlapped.
Here, as shown in fig. 4, the organic insulating layer 122 may be subjected to plasma treatment to form a crosslinked layer 141; thereafter, as shown in fig. 8, a protective layer 15 is formed on the side of the crosslinked layer 141 facing away from the substrate 11; the crosslinked layer 141 is subjected to plasma treatment using the protective layer 15 as a mask, to form a crosslinked pattern 14 as shown in fig. 2.
Here, the organic insulating layer 122 may be subjected to plasma treatment using, for example, one of He or Ar to obtain the crosslinked layer 141.
For example, N can be used 2 、O 2 、H 2 The cross-linking layer 141 is subjected to plasma treatment to form the cross-linking pattern 14.
In some embodiments, after the cross-linking pattern 14 is formed, the protective layer 15 may be removed, or the protective layer 15 may be remained.
Alternatively, the protective layer 15 may be left to reduce the process of peeling off the protective layer 15, thereby simplifying the manufacturing process of the array substrate 10.
In some embodiments, the material of the protective layer 15 is not limited as long as the pattern of the protective layer 15 is not affected in the process of forming the crosslinked pattern 14 from the crosslinked layer 141.
S13, a second inorganic insulating layer 123 is formed on the side of the organic insulating layer 122 facing away from the substrate 11, and the first inorganic insulating layer 121, the organic insulating layer 122, and the second inorganic insulating layer 123 constitute a flat layer.
In the related art, since the surface of the organic insulating layer 122 is rough, when the display panel is evaluated at high temperature, high humidity and high reliability, the high temperature forces the organic insulating layer 122 to release gas into the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123, so that the first inorganic insulating layer 121 and the second inorganic insulating layer 123 float (fig. 4), and the display panel is failed.
If the smooth and dense crosslinked layer 141 is formed, the gas released from the organic insulating layer 122 cannot enter the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123 during the high temperature, high humidity and high voltage reliability evaluation. However, the smooth cross-linking layer 141 may affect the fixed connection between the organic insulating layer 122 and the second inorganic insulating layer 123, so that water vapor and oxygen may easily enter the display area of the display panel from the interface between the organic insulating layer 122 and the second inorganic insulating layer 123, forming liquid crystal bubbles (LC bubbles) 51 as shown in fig. 5, and affecting the display effect of the display panel.
Based on this, the embodiment of the invention provides a manufacturing method of a display panel, wherein the display panel comprises an array substrate 10 and a box substrate 20. The array substrate includes a cross-linking pattern 14 disposed between the organic insulating layer 122 and the second inorganic insulating layer 123, and the cross-linking pattern 14 is only located at a side of the frame sealing glue 30 facing away from the display area. In this way, on the one hand, in the high-temperature high-humidity high-reliability evaluation, the gas released from the organic insulating layer 122 does not pass through the crosslinked pattern 14 and enters the interface between the first inorganic insulating layer 121 and the second inorganic insulating layer 123, causing the first inorganic insulating layer 121 and the second inorganic insulating layer 123 to float, thereby causing the display panel to display a failure; on the other hand, although the cross-linking pattern 14 is disposed on the side of the frame sealing glue 30 facing away from the display area, the connection between the cross-linking pattern 14 and the protective layer 15 is not firm, after entering the interface, the water vapor and oxygen are blocked by the frame sealing glue 30 and cannot enter the display area further, so that an LC bubble cannot be formed in the display area, and the display effect of the display panel is not affected.
Optionally, the surface of the organic insulating layer 122 facing away from the substrate 11 is plasma treated for the same time and power as the cross-linking layer 141.
Here, the surface of the organic insulating layer 122 facing away from the substrate 11 is subjected to plasma treatment, and the crosslinked layer 141 is subjected to plasma treatment for a time ranging from 10 to 30 seconds and at a power ranging from 8 to 24kw.
In the embodiment of the present invention, on one hand, it is possible to avoid that the portions of the crosslinked layer 141 other than the crosslinked pattern 14 are not completely removed due to the too small time and/or power of the plasma treatment performed on the crosslinked layer 141; on the other hand, it is also possible to avoid influencing the organic insulating layer 122 located under the crosslinked layer 141 due to excessive time and/or power of the plasma treatment of the crosslinked layer 141.
Optionally, as shown in fig. 6, the array substrate 10 further includes a first electrode 16 located in the display area; the protective layer 15 and the first electrode 16 are formed by the same patterning process.
Here, the material of the first electrode 16 and the protective layer 15 may be, for example, a transparent conductive material such as ITO.
On the basis, the array substrate 10 further comprises a second electrode 17 arranged on one side of the second inorganic insulating layer 123 away from the substrate 11; the display panel further includes a liquid crystal layer 60 disposed between the array substrate 10 and the counter substrate 20; the second electrode 17 and the liquid crystal layer 60 are located at least in the display area; the first electrode 16 and the second electrode 17 are used to drive the liquid crystal in the liquid crystal layer 60 to deflect.
In some embodiments, the first electrode 16 is a pixel electrode and the second electrode 17 is a common electrode; alternatively, the first electrode 16 is a common electrode, and the second electrode 17 is a pixel electrode.
Here, the first electrode 16 is exemplified as a pixel electrode, and the pixel electrode is electrically connected to the drain electrode of the thin film transistor. A via hole may be disposed on the organic insulating layer 122, so that the pixel electrode is electrically connected to the drain electrode of the thin film transistor, so as to avoid the mutual influence between the pixel electrode and other signal lines due to the fact that the pixel electrode and other signal lines are disposed on the same layer; meanwhile, the width of the black matrix can be reduced, and the aperture opening ratio of the display panel is improved.
In the embodiment of the invention, the protective layer 15 and the first electrode 16 are obtained through the same patterning process, so that the preparation process of the array substrate 10 can be simplified.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (9)

1. A display panel, characterized by having a display area;
the display panel comprises an array substrate, a box-matching substrate and frame sealing glue, wherein the array substrate and the box-matching substrate are mutually combined, and the frame sealing glue is arranged between the array substrate and the box-matching substrate;
the array substrate comprises a flat layer; the flat layer comprises a first inorganic insulating layer, an organic insulating layer and a second inorganic insulating layer which are sequentially stacked along the direction of the array substrate to the box-aligning substrate, and the array substrate further comprises a cross-linking pattern arranged between the organic insulating layer and the second inorganic insulating layer; wherein,,
edges of the first inorganic insulating layer and the second inorganic insulating layer exceed edges of the organic insulating layer; the cross-linking pattern covers the side surface of the organic insulating layer and the surface close to the pair of box substrates; the cross-linking pattern is positioned at one side of the frame sealing glue, which is away from the display area;
the array substrate further comprises a protective layer arranged between the cross-linking pattern and the second inorganic insulating layer, and the orthographic projection of the protective layer on the box-alignment substrate is completely overlapped with the orthographic projection of the cross-linking pattern on the box-alignment substrate; the protective layer is used as a mask to obtain the crosslinked pattern.
2. The display panel of claim 1, wherein the organic insulating layer comprises a trench, an orthographic projection of the trench on the pair of box substrates overlapping an orthographic projection of the frame sealing compound on the pair of box substrates.
3. The display panel according to claim 1, wherein the array substrate further comprises a first electrode disposed between the organic insulating layer and the second inorganic insulating layer;
the first electrode is at least located in the display area, and the first electrode and the protective layer are made of the same material.
4. A display device comprising the display panel of any one of claims 1-3.
5. A method of manufacturing a display panel, the display panel having a display area, the method comprising:
forming an array substrate and a box-aligning substrate respectively, and enabling the array substrate and the box-aligning substrate to be combined by utilizing frame sealing glue;
forming the array substrate, including:
sequentially forming a first inorganic insulating layer and an organic insulating layer on a substrate;
forming a cross-linking pattern and a protective layer on one side of the organic insulating layer, which is away from the substrate, wherein the protective layer is positioned on one side of the cross-linking pattern, which is away from the substrate; the cross-linking pattern and the protective layer are positioned on one side of the frame sealing glue, which is away from the display area, and orthographic projections of the cross-linking pattern and the protective layer on the substrate are completely overlapped; the protective layer is used as a mask to obtain the cross-linked pattern;
forming a second inorganic insulating layer on one side of the organic insulating layer, which is away from the substrate, wherein the first inorganic insulating layer, the organic insulating layer and the second inorganic insulating layer form a flat layer; wherein,,
edges of the first inorganic insulating layer and the second inorganic insulating layer exceed edges of the organic insulating layer; the cross-linking pattern covers a side surface of the organic insulating layer and a surface close to the pair of cartridge substrates.
6. The method of manufacturing a display panel according to claim 5, wherein forming a cross-linked pattern and a protective layer on a side of the organic insulating layer facing away from the substrate, comprises:
performing plasma treatment on the organic insulating layer to form a crosslinked layer;
forming a protective layer on one side of the crosslinked layer away from the substrate;
and performing plasma treatment on the crosslinked layer by taking the protective layer as a mask to form the crosslinked pattern.
7. The method of manufacturing a display panel according to claim 6, wherein,
performing plasma treatment on the organic insulating layer to form a crosslinked layer, including:
performing plasma treatment on the surface of the organic insulating layer, which is away from the substrate, by using one of helium gas or argon gas;
treating the crosslinked layer to form the crosslinked pattern, comprising:
performing plasma treatment on the crosslinked layer by using one of nitrogen, oxygen and hydrogen to form the crosslinked pattern;
and carrying out plasma treatment on the surface of the organic insulating layer, which is away from the substrate, and carrying out plasma treatment on the crosslinking layer, wherein the time and the power of the plasma treatment are the same.
8. The method of manufacturing a display panel according to claim 7, wherein the surface of the organic insulating layer facing away from the substrate is subjected to plasma treatment, and the crosslinked layer is subjected to plasma treatment for a time ranging from 10 to 30 seconds and at a power ranging from 8 to 24kw.
9. The method of any one of claims 5-8, wherein the array substrate further comprises a first electrode in the display region; the protective layer and the first electrode are formed through the same patterning process.
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