CN111247621A - Semiconductor device and method for manufacturing semiconductor device - Google Patents
Semiconductor device and method for manufacturing semiconductor device Download PDFInfo
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- CN111247621A CN111247621A CN201780096095.3A CN201780096095A CN111247621A CN 111247621 A CN111247621 A CN 111247621A CN 201780096095 A CN201780096095 A CN 201780096095A CN 111247621 A CN111247621 A CN 111247621A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 107
- 238000000034 method Methods 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 312
- 238000005247 gettering Methods 0.000 claims abstract description 102
- 150000002500 ions Chemical class 0.000 claims abstract description 54
- 230000001678 irradiating effect Effects 0.000 claims abstract description 19
- 239000000470 constituent Substances 0.000 claims abstract description 16
- 238000005498 polishing Methods 0.000 claims abstract description 9
- 238000010030 laminating Methods 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 229910052710 silicon Inorganic materials 0.000 description 16
- 239000010703 silicon Substances 0.000 description 16
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 6
- 229910052799 carbon Inorganic materials 0.000 description 6
- 239000000356 contaminant Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 229910001385 heavy metal Inorganic materials 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 238000011109 contamination Methods 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- -1 argon ions Chemical class 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract
The present invention provides a method for manufacturing a semiconductor device in which a gettering layer can be formed even when a substrate is made thinner, and a semiconductor device in which a gettering layer is formed. The present invention is a method for manufacturing a semiconductor device (1) in which a plurality of substrates are stacked, the method comprising: a step of laminating a second substrate on the first substrate; polishing a surface of the second substrate, the surface being opposite to the surface on which the device layer is formed; and a step of irradiating the surface of the polished second substrate with cluster ions containing a constituent element contributing to gettering to form a gettering layer, the gettering layer containing the constituent element of the cluster ions.
Description
Technical Field
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.
Background
Conventionally, it has been known that a contaminant such as a heavy metal enters a silicon substrate of a semiconductor device to affect a semiconductor element of the semiconductor device. Therefore, a layer called a gettering layer (gettering layer) is formed near the back surface (the surface opposite to the surface on which the semiconductor element is formed) of the silicon substrate. The gettering layer can capture heavy metal elements. Thus, the gettering layer can suppress the intrusion of the contaminant into the silicon substrate.
In recent years, semiconductor devices have been miniaturized, and silicon substrates have been thinned along with the miniaturization. Therefore, a method for manufacturing a semiconductor device in which a gettering layer can be formed even in a thinned silicon substrate has been proposed (for example, see patent document 1 and non-patent document 1).
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open No. 2005-317805.
Non-patent document
Non-patent document 1: "Impact of Backside Cu Contamination in the 3Dintegration Process" (2009Symposium on VLSI Technology Digest of technical papers, pp.172-173).
Disclosure of Invention
Problems to be solved by the invention
In the method for manufacturing a semiconductor device disclosed in patent document 1, a semiconductor element is formed on a front surface of a silicon substrate, and then a gettering layer is formed on a back surface of the silicon substrate. Specifically, a gettering layer is formed by implanting impurities such as argon ions into the back surface of the silicon substrate. In the method for manufacturing a semiconductor device disclosed in non-patent document 1, a gettering layer is also formed by implanting argon ions into a silicon substrate. Thus, impurities such as copper can be trapped by the gettering layer, and thus contamination of the silicon substrate with contaminants can be suppressed.
On the other hand, when the silicon substrate is made thinner (for example, 20 μm or less), it is considered that ions implanted into the silicon substrate reach the surface of the silicon substrate. It is considered that ions reaching the surface of the silicon substrate affect the semiconductor element and are not preferable. Therefore, it is preferable to form the gettering layer even when the silicon substrate is made thinner.
The present invention aims to provide a method for manufacturing a semiconductor device capable of forming a gettering layer even when a substrate is made thinner, and a semiconductor device having a gettering layer formed thereon.
Means for solving the problems
(i) The present invention relates to a method for manufacturing a semiconductor device in which a plurality of substrates are stacked, the method including: a step of laminating a second substrate on the first substrate; polishing a surface of the second substrate opposite to a surface on which the device layer is formed; and a step of irradiating the polished surface of the second substrate with cluster ions containing a constituent element contributing to gettering to form a gettering layer containing the constituent element of the cluster ions.
(ii) Further, it is preferable that: in the step of stacking the second substrate on the first substrate, a surface of the second substrate on which the device layer is formed is arranged to face the first substrate.
(iii) Further, it is preferable that: in the step of stacking the second substrate on the first substrate, a surface of the second substrate opposite to a surface on which the device layer is formed is arranged to face the first substrate.
(iv) Further, it is preferable that: in the step of forming the gettering layer, the gettering layer is formed in a partial region of a surface of the second substrate.
(v) Further, it is preferable that: the step of forming the gettering layer includes: forming a resist on a surface of the second substrate; a step of irradiating cluster ions to the surface of the second substrate and the resist; and a step of removing the resist.
(vi) Further, it is preferable that: in the step of forming the resist, the resist is formed at a position overlapping with a region, which is a distance from the gettering layer to a predetermined value or less, of an element region formed in the second substrate.
(vii) Further, it is preferable that: in the step of forming the resist, the resist is formed at a position overlapping with a boundary of a polarity change in a region formed in the second substrate, the region being exposed to a surface of the second substrate to be polished.
(viii) Further, it is preferable that: in the step of forming the resist, the resist is formed to be thicker than a thickness of the gettering layer.
(ix) Further, it is preferable that: in the step of irradiating cluster ions, the cluster ions are irradiated to positions surrounding the via holes filled with the metal.
(x) Further, it is preferable that: in the step of laminating a second substrate on a first substrate, a plurality of second substrates described in any one of (ii) to (viii) above are laminated on the first substrate.
(xi) Further, the present invention relates to a semiconductor device in which a plurality of substrates are stacked, including: a first substrate; and a second substrate which overlaps with the first substrate, at least the second substrate having a gettering layer containing a constituent element of cluster ions, the gettering layer being formed on a polished surface side of the second substrate.
Effects of the invention
According to the present invention, it is possible to provide a method for manufacturing a semiconductor device in which a gettering layer can be formed even when a substrate is made thinner, and a semiconductor device in which a gettering layer is formed.
Drawings
Fig. 1 is a schematic side view of a semiconductor device in which two substrates are stacked in a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
Fig. 2 is a side view of the semiconductor device after one substrate is polished in the method for manufacturing the semiconductor device of the first embodiment.
Fig. 3 is a side view of the semiconductor device when the semiconductor device is irradiated with cluster ions in the method for manufacturing a semiconductor device according to the first embodiment.
Fig. 4 is a partially enlarged cross-sectional view of the semiconductor device shown in fig. 3.
Fig. 5 is a side view of the semiconductor device when the substrate is further stacked in the method for manufacturing the semiconductor device of the first embodiment.
Fig. 6 is a side view of the semiconductor device when another substrate is stacked in the method for manufacturing the semiconductor device of the first embodiment.
Fig. 7 is a side view of the semiconductor device after polishing yet another substrate in the method of manufacturing the semiconductor device of the first embodiment.
Fig. 8 is a side view of the semiconductor device when cluster ions are irradiated onto a further substrate in the method for manufacturing a semiconductor device according to the first embodiment.
Fig. 9 is an enlarged partial cross-sectional view of a part of a substrate of a semiconductor device according to a second embodiment of the present invention.
Fig. 10 is a partially enlarged cross-sectional view of the semiconductor device having a resist layer formed thereon when cluster ions are irradiated in the method for manufacturing a semiconductor device according to the second embodiment.
Fig. 11 is a partially enlarged cross-sectional view showing a semiconductor substrate when two substrates are stacked in the method of manufacturing a semiconductor device of the second embodiment.
Fig. 12 is an enlarged partial cross-sectional view of a part of a substrate of a semiconductor device according to a third embodiment of the present invention.
Fig. 13 is a partially enlarged cross-sectional view of the semiconductor device when cluster ions are irradiated in the method for manufacturing a semiconductor device according to the third embodiment.
Fig. 14 is a partially enlarged cross-sectional view of a semiconductor device in which a gettering layer is formed around a via hole in a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.
Detailed Description
Hereinafter, embodiments of a semiconductor device and a method for manufacturing a semiconductor device according to embodiments of the present invention will be described with reference to the drawings.
First, an outline of the semiconductor device according to each embodiment will be described.
A semiconductor device is formed by stacking a plurality of substrates. The semiconductor device is, for example, a DRAM (Dynamic random access Memory).
A gettering layer for trapping a contaminant such as a heavy metal is formed on each substrate. The gettering layer is formed along the plate surface direction of the substrate. The gettering layer captures pollutants such as heavy metals. Thus, the gettering layer suppresses contamination of the inside of the substrate by the contaminant.
[ first embodiment ]
Next, a semiconductor device 1 according to a first embodiment of the present invention and a method for manufacturing the semiconductor device 1 will be described with reference to fig. 1 to 8.
As shown in fig. 1, the semiconductor device 1 is formed by stacking a plurality of substrates 10, for example.
Each substrate 10 has a substrate body 20 and a device layer 30.
The substrate body 20 is, for example, a silicon substrate. The substrate main body 20 has a gettering layer 40 on one surface side in the thickness direction (refer to fig. 4). In the present embodiment, the substrate main body 20a of the substrate 10 (hereinafter, referred to as a first substrate 10 a. hereinafter, in the case of the substrate 10, it is referred to as a "substrate 10", which means that the substrate may be any one of the plurality of substrates 10 ") disposed at the lowermost position (lower side in the drawing of fig. 1) is formed to be thick. Further, the substrate main body 20b of the other substrate 10 (hereinafter, referred to as a second substrate 10b) is thinly formed. That is, in the present embodiment, the second substrate 10b having the thin substrate main body 20b is arranged to be overlapped on the first substrate 10a having the thick (thickest) substrate main body 20 a. As shown in fig. 4, a plurality of regions having different polarities are formed in the substrate main body 20.
In the following description, a structure of the first substrate 10a is denoted by a reference symbol "a", and a structure of the second substrate 10b is denoted by a reference symbol "b". On the other hand, in the case where neither "a" nor "b" is labeled, it means that either substrate 10 may have.
The gettering layer 40 is a so-called dislocation layer (crystal defect layer). In particular, the gettering layer 40b of the second substrate 10b contains constituent elements (for example, carbon and hydrogen atoms) of cluster ions, and is formed by irradiation (implantation) of the cluster ions to the substrate main body 20 b. The gettering layer 40b is formed to have a predetermined thickness from one surface of the substrate main body 20b in the thickness direction. In the present embodiment, the gettering layer 40b is formed to have a thickness of, for example, 100nm or less.
The device layer 30 is, for example, a layer having transistors 31a and 31b, insulating layers 32a and 32b, and the like. The device layer 30 is disposed on the other surface side in the thickness direction of the substrate main body 20. In the present embodiment, the device layer 30a is disposed on the side of the first substrate 10a having the thick substrate main body 20a facing upward (upward in the drawing of fig. 1) of the substrate main body 20 a. In addition, the device layer 30b is disposed on the side of the second substrate 10b having the thin substrate main body 20b facing downward (downward in the drawing of fig. 1) of the substrate main body 20 b. Electrical connection between the device layer 30 and the adjacent substrate 10.
Next, a method for manufacturing the semiconductor device 1 of the present embodiment will be described.
The method for manufacturing the semiconductor device 1 includes: a step of laminating a second substrate 10b on the first substrate 10 a; polishing a surface of the second substrate 10b opposite to the surface on which the device layer 30b is formed; and a step of irradiating the polished surface of the second substrate 10b with cluster ions containing a constituent element (for example, carbon or hydrogen) contributing to gettering to form a gettering layer 40b containing a constituent element of the cluster ions.
First, a step of performing lamination is performed. As shown in fig. 1, the first substrate 10a and the second substrate 10b are disposed in a state where the surfaces (the other surfaces) on which the device layers 30a and 30b are formed face each other. Then, the first substrate 10a and the second substrate 10b are bonded with the surfaces of the device layers 30a, 30b overlapping.
Next, a process of performing polishing is performed. As shown in fig. 2, the other side of the face of the second substrate 10b (the side opposite to the face on which the device layer 30b is formed) is polished. That is, the other face side of the substrate main body 20b of the second substrate 10b is polished. Thereby, the opposite surface of the substrate main body 20b of the second substrate 10b to the surface on which the device layer 30b is formed is polished. The substrate main body 20b of the second substrate 10b is polished to a thin thickness of, for example, 5 to 20 μm.
Next, a step of forming the gettering layer 40b is performed. Specifically, as shown in fig. 3, the gettering layer 40b is formed to have a predetermined thickness (for example, 100nm or less) from one surface of the substrate main body 20b of the second substrate 10 b. In the present embodiment, the gettering layer 40b is formed by irradiating cluster ions to one surface side of the substrate main body 20b of the second substrate 10 b. The formation of the gettering layer 40b by irradiation of cluster ions is described in detail later.
As shown in fig. 5, in the case where the substrate 10 is further stacked, the third substrate 10c is aligned onto the second substrate 10 b. At this time, the third substrate 10c is aligned in a state where the device layer 30c faces one surface of the substrate main body 20b of the second substrate 10 b.
Next, as shown in fig. 6, the third substrate 10c is bonded to the second substrate 10 b. Then, as shown in fig. 7, one face of the substrate main body 20c of the third substrate 10c is polished.
Next, as shown in fig. 8, a gettering layer 40c is formed. Specifically, the gettering layer 40c is formed by irradiating cluster ions (for example, carbon or hydrogen) onto one surface side of the substrate main body 20c of the third substrate 10 c.
The formation of the gettering layer 40b by irradiation of cluster ions will be described in detail.
The cluster ion is, for example, an aggregate of atoms or molecules containing carbon or hydrogen molecules. When the cluster ions are irradiated (implanted) onto one surface side of the substrate main body 20b, they instantaneously reach a high temperature of about 1350 to 1400 ℃. The cluster ions melt the substrate main body 20b by becoming high temperature. Thereafter, the substrate main body 20b is rapidly cooled. Thus, carbon and hydrogen molecules contained in the irradiated cluster ions are solid-dissolved in the vicinity of the surface of the one surface of the substrate main body 20 b. That is, the gettering layer 40b is a layer in which constituent elements of irradiated ions are dissolved in lattice positions or substitution positions of crystals on the surface of the substrate body 20 b. When the concentration distribution of the constituent elements in the depth direction (thickness direction) of the substrate main body 20b is measured in SIMS (Secondary Ion Mass Spectrometry), the gettering layer 40b is specified as a range in which the background is more detected.
The method for manufacturing the semiconductor device 1 and the semiconductor device 1 according to the first embodiment described above provide the following advantages.
(1) The method for manufacturing the semiconductor device 1 includes: a step of laminating a second substrate 10b on the first substrate 10 a; polishing a surface of the second substrate 10b opposite to the surface on which the device layer 30b is formed; and a step of irradiating the polished surface of the second substrate 10b with cluster ions containing a constituent element contributing to gettering to form a gettering layer 40b containing a constituent element of the cluster ions. This makes it possible to limit the ion implantation region (depth) to the opposite surface side of the second substrate 10 b. Therefore, ions are suppressed from reaching the surface of the second substrate 10b on which the device layer 30 is formed, and the highly reliable semiconductor device 1 can be manufactured.
(2) In the step of stacking the second substrate 10b on the first substrate 10a, the surface of the second substrate 10b on which the device layer 30b is formed is disposed so as to face the first substrate 10 a. This enables the first substrate 10a and the second substrate 10b to be electrically connected.
(3) The semiconductor device 1 includes a first substrate 10a and a second substrate 10b stacked on the first substrate 10a, at least the second substrate 10b has a gettering layer 40b containing a constituent element of cluster ions, and the gettering layer 40b is formed on a polished surface side of the second substrate 10 b. Thus, the gettering layer 40b can be formed even when the second substrate 10b is thin.
[ second embodiment ]
Next, a method for manufacturing the semiconductor device 1 and the semiconductor device 1 according to the second embodiment of the present invention will be described with reference to fig. 9 to 11. In describing the second embodiment, the same components are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
The semiconductor device 1 of the second embodiment is different from the first embodiment in that the gettering layer 40b is formed in a partial region of the surface of the second substrate 10 b. The semiconductor device 1 of the second embodiment is different from the first embodiment in that the surface of the second substrate 10b opposite to the surface on which the device layer 30b is formed is disposed so as to face the first substrate 10 a. In the second embodiment, the first substrate 10a is polished in the same manner as the second substrate 10b, and has a gettering layer 40a using cluster ions (see fig. 11). That is, in the second embodiment, the first substrate 10a and the second substrate 10b are formed in the same structure.
The substrate main body 20b of the second substrate 10b has a plurality of regions 50b different in polarity along the face where the device layer 30b is formed. The substrate main body 20b of the second substrate 10b has another region 60b having a different polarity (the entire regions are referred to as an element region 70) at a position deeper than the regions 50b having a different polarity. The second substrate 10b is formed thinner than that of the first embodiment. The substrate main body 20b of the second substrate 10b is formed to have a thickness of, for example, about 5 μm.
The plurality of regions 50b having different polarities are, for example, regions in which the N-well region 51b and the P-well region 52b are arranged adjacent to each other. The plurality of regions 50b having different polarities are formed with a predetermined thickness from the other surface (the surface on the opposite side) of the substrate main body 20b of the second substrate 10 b.
The other region 60b having a different polarity is disposed so as to overlap with the plurality of regions 50b having a different polarity across a part of the plurality of regions 50b having a different polarity. The other region 60b having a different polarity is disposed so as to overlap with a part of the N-well region 51b and the P-well region 52b, for example. The other region 60b having a different polarity is formed with a predetermined thickness. That is, the other region 60b having a different polarity is formed at a position closer to one surface side (surface side on which the gettering layer 40b is formed) of the substrate main body 20b than the plurality of regions 50b having a different polarity.
Next, a method for manufacturing the semiconductor device 1 according to the second embodiment will be described.
First, one surface of the second substrate 10b is polished. Specifically, one surface (the opposite surface to the surface on which the device layer 30b is formed) of the substrate main body 20b of the second substrate 10b is polished. Next, the gettering layer 40b is constructed.
The step of forming the gettering layer 40b includes: a step of forming a resist 80b on the surface of the second substrate 10 b; a step of irradiating cluster ions onto the surface of the second substrate 10b and the resist 80 b; and a step of removing the resist 80 b.
First, a step of forming a resist 80b on the surface of the second substrate 10b is performed. As shown in fig. 10, a resist 80b is formed on one surface side (polished surface side) of the second substrate 10 b. The resist 80b is formed at a position overlapping with a region, which is a distance of a predetermined value or less from the gettering layer 40b, of the element region 70b (the plurality of regions 50b having different polarities and the other region 60b having a different polarity) formed in the second substrate 10 b. In this embodiment, the resist 80b is formed at a position overlapping with the other region 60b having the different polarity.
Next, a step of irradiating cluster ions to the surface of the second substrate 10b and the resist 80b is performed. Thereby, the gettering layer 40b is formed at a predetermined depth from the one surface side of the substrate main body 20b of the second substrate 10 b. Specifically, the gettering layer 40b is formed at a position of a surface region where the resist 80b is not formed, among the one surface of the substrate main body 20b of the second substrate 10 b. On the other hand, the gettering layer 40b is not formed at a position of a surface region where the resist 80b is formed, among the one surface of the substrate main body 20b of the second substrate 10 b. That is, the gettering layer 40b is not formed at a position overlapping with the other region 60b having a different polarity.
Next, a step of removing the resist 80b is performed. Thereby, the resist 80b is removed from the one surface of the substrate main body 20b of the second substrate 10 b. The first substrate 10a is also formed in the same manner as the second substrate 10 b.
Next, as shown in fig. 11, a step of laminating the first substrate 10a on the second substrate 10b is performed. In this embodiment mode, the first substrate 10a has the same structure as the second substrate 10 b. The second substrate 10b and the first substrate 10a are bonded in a state where one surfaces thereof face each other. That is, the gettering layer 40b of the second substrate 10b and the gettering layer 40a of the first substrate 10a are bonded in an opposed state.
The method for manufacturing the semiconductor device 1 and the semiconductor device 1 according to the second embodiment described above provide the following advantages.
(4) In the step of stacking the second substrate 10b on the first substrate 10a, the surface of the second substrate 10b opposite to the surface on which the device layer 30b is formed is disposed to face the first substrate 10 a. This can improve the versatility of the semiconductor device 1.
(5) In the step of forming the gettering layer 40b, the gettering layer 40b is formed in a partial region of the surface of the second substrate 10 b. Thus, the gettering layer 40b can be formed at a position suitable for the purpose, and therefore the versatility of the semiconductor device 1 can be further improved.
(6) The step of forming the gettering layer 40b includes: a step of forming a resist 80b on the surface of the second substrate 10 b; a step of irradiating cluster ions onto the surface of the second substrate 10b and the resist 80 b; and a step of removing the resist 80 b. Thus, the region constituting the gettering layer 40b can be determined as appropriate.
(7) In the step of forming the resist 80b, the resist 80b is formed at a position overlapping with a region of the element region 70b formed in the second substrate 10b, the distance between which and the gettering layer 40b is a predetermined value or less. Thus, a predetermined distance or more can be provided between the gettering layer 40b and the element region 70b, and thus occurrence of leakage between the gettering layer 40b and the element region 70b can be suppressed.
(8) In the step of forming the resist 80b, the resist 80b is formed thicker than the thickness of the gettering layer 40 b. This can prevent the gettering layer 40b from being formed on the second substrate 10b through the resist 80 b.
[ third embodiment ]
Next, a semiconductor device 1 according to a third embodiment of the present invention and a method for manufacturing the semiconductor device 1 will be described with reference to fig. 12 and 13. In describing the third embodiment, the same components are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
The semiconductor device 1 of the third embodiment is different from the second embodiment in that the substrate 10 is formed thinner. Thus, the semiconductor device 1 of the third embodiment is different from the second embodiment in that the plurality of regions 50b having different polarities are also exposed to the other surface of the substrate main body 20 b. The semiconductor device 1 of the third embodiment is different from the first and second embodiments in that the gettering layer 40b is formed in the plurality of regions 50b having different polarities. The first substrate 10a in the third embodiment is formed in the same structure as the second substrate 10 b.
The substrate main body 20b of the second substrate 10b has a thickness of, for example, 2 to 5 μm. As shown in fig. 12, the substrate main body 20b of the second substrate 10b is composed of, for example, a plurality of regions 50b having different polarities.
The gettering layer 40b is formed independently in a plurality of regions 50b each having a different polarity. In other words, the gettering layer 40B is not disposed at the boundary B where the polarities of the plurality of regions 50B having different polarities change. The gettering layer is formed in a predetermined thickness on one surface side of the substrate main body 20 b.
Next, a method for manufacturing the semiconductor device 1 according to the third embodiment will be described.
First, a process of polishing the second substrate 10b is performed. Thereby, the substrate main body 20b of the second substrate 10b is polished to a thickness of 2 to 5 μm. Next, a step of forming the gettering layer 40b is performed.
As shown in fig. 13, in the step of forming the resist 80B on the surface of the second substrate 10B, the resist 80B is formed at a position where the boundary B of the polarity change overlaps in a region formed in the second substrate 10B, which is exposed to the polished surface of the second substrate 10B. Next, a step of irradiating cluster ions to the surface of the second substrate 10b and the resist 80b is performed.
In the step of irradiating cluster ions, the gettering layer 40b is formed on one surface of the substrate main body 20b of the second substrate 10 b. Here, the gettering layer 40b is not formed at a position where the resist 80b is formed in one surface of the substrate main body 20b of the second substrate 10 b. That is, the gettering layer 40B is not formed at the boundary B where the polarity changes. Thereby, the gettering layer 40b is independently formed in the plurality of regions 50b in which the polarities change, respectively.
Next, in the step of removing the resist 80b, the resist 80b is removed. The first substrate 10a is also formed in the same manner as the second substrate 10 b. Then, in the step of stacking a plurality of substrates 10, the second substrate 10b and the first substrate 10a are stacked in the same manner as in the first embodiment or the second embodiment.
According to the method for manufacturing the semiconductor device 1 and the semiconductor device 1 of the third embodiment, the following effects are obtained in addition to the effect of the above (8).
(9) In the step of forming the resist 80B, the resist 80B is formed at a position overlapping the boundary B of the polarity change in a region exposed to the polished surface of the second substrate 10B formed in the second substrate 10B. This can suppress occurrence of leakage between the plurality of regions 50b whose polarities are changed.
[ fourth embodiment ]
Next, a semiconductor device 1 according to a fourth embodiment and a method for manufacturing the semiconductor device 1 will be described with reference to fig. 14. In describing the fourth embodiment, the same components are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
As shown in fig. 14, the semiconductor device 1 of the fourth embodiment is different from the first to third embodiments in that the second substrate 10b has a via hole 90b filled with a metal. The semiconductor device 1 of the fourth embodiment is different from the first to third embodiments in that the gettering layer 40b is formed at a position surrounding the via hole 90 b. Accordingly, the method for manufacturing the semiconductor device 1 according to the fourth embodiment is different from the first to third embodiments in that cluster ions are irradiated to positions surrounding the via holes 90b filled with the metal M in the step of irradiating the cluster ions. In addition, in the fourth embodiment, the first substrate 10a has the same structure as the second substrate 10 b.
The via hole 90b is formed through the device layer 30b and the substrate body 20b in the thickness direction. In this embodiment, the via hole 90b is formed to penetrate the region 52b of the P well. The via hole 90b is formed so as to gradually expand in diameter in the thickness direction from the substrate body 20b toward the device layer 30 b. Via 90b is filled with a metal M, such as copper. That is, the via hole 90b is arranged at a position where a wiring is formed.
The gettering layer 40b is formed at a position around the via hole 90 b. Specifically, the gettering layer 40b is formed in a position surrounding the via hole 90b among one surface of the substrate main body 20b of the second substrate 10 b.
Next, a method for manufacturing the semiconductor device 1 of the present embodiment will be described.
The procedure of performing polishing is the same as that of the third embodiment. Next, in the step of forming the resist 80b, the resist 80b is formed so as to overlap with a region other than a position surrounding the guide hole 90b in the one surface of the substrate main body 20b of the second substrate 10 b. Next, in the step of irradiating cluster ions, cluster ions are irradiated to one surface of the substrate main body 20b of the second substrate 10b and the resist 80 b. Thus, the gettering layer 40b is formed at a position surrounding the via hole 90b in the one surface of the substrate main body 20b of the second substrate 10 b.
Next, in the step of removing the resist 80b, the resist 80b is removed. The first substrate 10a is also formed in the same manner as the second substrate 10 b. The process of stacking the second substrate 10b and the first substrate 10a is the same as in the second and third embodiments.
According to the method for manufacturing the semiconductor device 1 and the semiconductor device 1 of the fourth embodiment, the following effects are exhibited in addition to the effect of (9) above.
(10) In the step of irradiating cluster ions, the cluster ions are irradiated to positions surrounding the via holes 90b filled with the metal M. This can prevent the metal M filled in the via hole 90b from entering the substrate body 20b, thereby improving the reliability of the semiconductor device 1.
While the preferred embodiments of the semiconductor device and the method for manufacturing the semiconductor device of the present invention have been described above, the present invention is not limited to the above embodiments and can be modified as appropriate.
For example, the cluster ions in the above embodiments include carbon and hydrogen atoms, but are not limited thereto. That is, the cluster ions can contain other various atoms and molecules that can form the gettering layer 40 b. For example, the region 52B of the P-well among the plurality of regions 50B having different polarities in the third embodiment may be irradiated with B10H14, B18H22, or the like as cluster ions. In this case, the resist 80b is formed so as to cover the region 51 b.
In the above embodiment, the first substrate 10a, the second substrate 10b, and the third substrate 10c are stacked, but four or more substrates 10 may be stacked. The first substrate 10a may be a substrate composed of only the substrate main body 20a without forming the device layer 30a, or may be a support substrate composed of, for example, a glass material. In this case, the first substrate may also be removed after a plurality of substrates are stacked thereon. When the substrate 10 is further laminated on the surface irradiated with cluster ions, the surface irradiated with cluster ions may be polished and laminated. In the second to fourth embodiments, after the first substrate 10a is made the same as in the first embodiment, the substrate 10 other than the first substrate 10a may be made the same structure as the second substrate 10 b. In the case where three or more substrates 10 are stacked, the uppermost substrate (for example, the third substrate 10c uppermost in the drawing of fig. 7) may be polished only on one surface of the substrate main body 20.
In the above embodiment, the first substrate 10a may have an internal gettering layer (inner gettering layer) formed on one surface side of the substrate main body 20 a.
In the second to fourth embodiments, the first substrate 10a and the second substrate 10b are configured in the same manner, but the first substrate 10a may be configured in the same manner as the first embodiment, and the second substrate 10b may be configured in the same manner as the third substrate 10 c.
Description of the reference numerals
1: semiconductor device with a plurality of semiconductor chips
10 a: a first substrate
10 b: a second substrate
20. 20a, 20 b: substrate body
30. 30a, 30 b: device layer
40. 40a, 40 b: gettering layer
70 b: element region
80 b: resist and method for producing the same
90 b: guide hole
B: boundary of
Claims (11)
1. A method for manufacturing a semiconductor device in which a plurality of substrates are stacked, the method comprising:
a step of laminating a second substrate on the first substrate;
polishing a surface of the second substrate opposite to a surface on which the device layer is formed; and
and a step of irradiating the polished surface of the second substrate with cluster ions containing a constituent element contributing to gettering to form a gettering layer containing a constituent element of the cluster ions.
2. The method for manufacturing a semiconductor device according to claim 1,
in the step of stacking the second substrate on the first substrate, a surface of the second substrate on which the device layer is formed is arranged to face the first substrate.
3. The method for manufacturing a semiconductor device according to claim 1 or 2,
in the step of stacking the second substrate on the first substrate, a surface of the second substrate opposite to a surface on which the device layer is formed is arranged to face the first substrate.
4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3,
in the step of forming the gettering layer, the gettering layer is formed in a partial region of a surface of the second substrate.
5. The method for manufacturing a semiconductor device according to claim 4,
the step of forming the gettering layer includes:
forming a resist on a surface of the second substrate;
a step of irradiating cluster ions to the surface of the second substrate and the resist; and
and removing the resist.
6. The method for manufacturing a semiconductor device according to claim 5,
in the step of forming the resist, the resist is formed at a position overlapping with a region, which is a distance from the gettering layer to a predetermined value or less, of an element region formed in the second substrate.
7. The method for manufacturing a semiconductor device according to claim 5,
in the step of forming the resist, the resist is formed at a position overlapping with a boundary of a polarity change in a region formed in the second substrate, the region being exposed to a surface of the second substrate to be polished.
8. The method for manufacturing a semiconductor device according to any one of claims 5 to 7,
in the step of forming the resist, the resist is formed to be thicker than a thickness of the gettering layer.
9. The method for manufacturing a semiconductor device according to any one of claims 5 to 8,
in the step of irradiating cluster ions, the cluster ions are irradiated to positions surrounding the via holes filled with the metal.
10. A method for manufacturing a semiconductor device is provided,
in the step of laminating a second substrate to a first substrate, a plurality of the second substrates according to any one of claims 2 to 8 are laminated to the first substrate.
11. A semiconductor device, in which a plurality of substrates are stacked, includes:
a first substrate; and
a second substrate overlapping the first substrate,
at least the second substrate has a gettering layer containing a constituent element of cluster ions,
the gettering layer is formed on the polished surface side of the second substrate.
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| PCT/JP2017/038146 WO2019082235A1 (en) | 2017-10-23 | 2017-10-23 | Semiconductor device and manufacturing method for semiconductor device |
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| CN114156383A (en) * | 2021-12-03 | 2022-03-08 | 扬州乾照光电有限公司 | Semiconductor device and method for manufacturing the same |
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