CN111211793A - Parallel TPC coding method and device based on Hamming code - Google Patents
Parallel TPC coding method and device based on Hamming code Download PDFInfo
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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Abstract
The invention discloses a design method of TPC codes applied to channel codes in the communication field, wherein the channel codes can detect errors and correct the errors in data transmission, the coding time is greatly shortened by the parallel TPC codes, and the coding processing speed is improved. The generation matrixes of different encoders are selected according to different data volumes, and mainly the generation matrixes of the encoders have difference and output data clocks are different. The serial coding of the two-dimensional TPC is converted into the parallel coding by utilizing the idea of serial-parallel conversion, so that the data processing time is prolonged, and the method has the advantages that any data stream is input, the coding times are only twice, and the same time is consumed for different data streams; compared with the traditional serial TPC coding, the time consumption is greatly reduced, the processing speed of the TPC coding is improved by utilizing the internal resources of the FPGA, the TPC coding with different widths can be converted into parallel coding, and the method is greatly completed by the parallel coding under the condition that a system clock is not changed.
Description
Technical Field
The invention relates to a channel coding method and a device thereof applied to the communication field, in particular to a Hamming code-based parallel TPC coding method and a device thereof.
Background
With the development of communication technology, the communication distance is longer and longer, and noise and fading exist in the process of transmitting signals. Multipath interference and the like can cause serious distortion of signals, the error rate can be ensured to be within an allowable range through forward error control to a certain extent, and the transmission efficiency is improved.
Turbo Product Codes (TPC) have parallel structures of decoding performance close to the shannon limit and high-speed decoding, and have been widely used in wireless communication in recent years.
Disclosure of Invention
The invention aims to solve the technical problem that TPC codes with different widths are difficult to convert into parallel codes, and aims to provide a parallel TPC coding method and a device thereof based on Hamming codes, which solve the problems that the processing speed of the TPC codes is improved by utilizing internal resources of an FPGA (field programmable gate array), the TPC codes with different widths can be converted into the parallel codes, the system clock is unchanged, the parallel codes are completed, the time is shortened, and the speed is improved.
The invention is realized by the following technical scheme:
a parallel TPC coding method and device based on Hamming code is characterized in that the device comprises: selecting a coding mechanism and a counting and storing mechanism according to the size of coded data; and calculating input and output clocks according to the data before encoding and the data after encoding.
The working principle of the invention is as follows: acquiring a data stream of a system, wherein the size of the data stream is k2Calculating a data output clock; calculating a generating matrix of a data encoder and the size of a storage mechanism according to the size of the data stream; reading data in rows, and simultaneously coding the data by a plurality of coders to complete parallel coding, wherein the coding mode adopts TPC coding; when the data is coded by the coder, outputting the data according to a single-bit coding mode; and outputting the data according to a proper clock after the coding is finished.
Furthermore, according to the size of the coded data stream, N parallel encoders are adopted to realize the parallel coding method, wherein the encoders are divided into a row encoder and a column encoder.
Furthermore, the generating matrix of row coding or column coding is selected according to the size of the coded data stream, and the input and output of the coder are both one-bit input and output. The data generated by the encoder has n bits, n is an integer power of 2, and the output format is k original code bits of data, n-k supervision equines with a relation of 2n-k=n。
Further, depending on the size of the data stream, the data may be stored in the storage mechanism in a different manner. The storage mechanism comprises three storage mechanisms, which are divided into storage mechanism A1, storage mechanism A2 and storage mechanism A3.
Further, the original data is stored in columns. The purpose of this storage is to accomplish simultaneous encoding of multiple line encoders. The coding speed is improved.
Further, the row encoded data continues to be stored in columns, where the rows of data are stored n-k more rows, unlike the storage mechanism A1
Further, the coded data are integrated together, and a data frame header is added to adjust the output sequence.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. the invention relates to a parallel TPC coding method and a device thereof based on Hamming codes, wherein any data stream is input, the coding times are only twice, and the same time is consumed for different data streams;
2. compared with the traditional serial TPC coding, the time consumption is greatly reduced;
3. the invention relates to a parallel TPC coding method and a device thereof based on Hamming codes, which utilize FPGA internal resources to improve the processing speed of TPC codes, can convert TPC codes with different widths into parallel codes and is completed by the parallel codes under the condition of unchanging a system clock.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
FIG. 1 is a flow chart of a TPC parallel coding system embodying the present invention;
fig. 2 is a block diagram of a TPC parallel coding system embodying the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.
Example 1
As shown in fig. 1-2, the present invention relates to a hamming code based parallel TPC coding method and a device thereof, and the specific implementation manner of the present invention is as follows: storing original data into an asynchronous FIFO1 according to a certain clock, reading out the original data into an RAM1 through a high clock, and preparing line coding; line coding is carried out on the read data of the RAM1 and the data are stored in the RAM 2; the data read out from the RAM2 are subjected to row-column coding and stored in the RAM 3; the data stored in RAM3 has been TPC encoded and is finally added with the appropriate header to FIFO2 for high clock write and match clock read.
Example 2
Based on embodiment 1, as shown in fig. 1-2, the present invention is a hamming code based parallel TPC coding method and apparatus, and the specific implementation manner of the present invention is: depending on the external module input, its data input clock will determine the encoded data FIFO2 output clock. The read is then read out to RAM1 in a certain order to be encoded. The specific sequence will be exemplified by a two-dimensional matrix with the sub-code being the extended Hamming code (n +1, k, delta), and the data size of the one-time input FIFO1 will be k2Record Ai,j(i, j ═ 1, 2.. k). Stored in RAM1 in the format of
Example 3
Based on the above embodiments, as shown in fig. 1-2, the present invention provides a hamming code based parallel TPC coding method and apparatus, and the specific implementation manner of the present invention is: the RAM1 reads data by rows to the encoder for encoding, and the input and output of the encoder are all single bits; according to the systematic code (original data, check code, parity code), single-bit input and output can be realized, and the line code end is stored in RAM2
Example 4
Based on the above embodiments, as shown in fig. 1-2, the present invention provides a hamming code based parallel TPC coding method and apparatus, and the specific implementation manner of the present invention is: reading the output of the RAM2 by rows and continuing to an encoder for column encoding and storing the output into the RAM 3; the data amount is (n +1)2。
Example 5
Based on the above embodiments, as shown in fig. 1-2, the present invention provides a hamming code based parallel TPC coding method and apparatus, and the specific implementation manner of the present invention is: the RAM3 data is added to the data header before being output to the FIFO and then read out at the appropriate clock, the output clock of which depends on the data size.
The design idea of the encoder in row encoding and column encoding is derived from the encoding idea of a Hamming code, a hamming module inputs data with 1 bit, the first k bits of data are stored in a register unit, after the k data are input, a monitoring horse cell is generated by generating a matrix, the input and the output can be simultaneously performed in the whole encoder, the data phase difference can meet the design requirement by a plurality of clock cycles, the specific design time delay is determined according to the system requirement, and the smaller the specific design time delay is, the better the specific design time delay is in principle.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. A parallel TPC coding method and device based on Hamming code is characterized in that the device comprises: selecting a coding mechanism and a counting and storing mechanism according to the size of coded data; and calculating input and output clocks according to the data before encoding and the data after encoding.
2. The hamming code based parallel TPC coding method and apparatus as claimed in claim 1, wherein N parallel encoders are used according to the size of the coded data stream, the encoders include row encoders and column encoders.
3. The method and apparatus of claim 2 wherein a row-coding or column-coding generator matrix is selected according to the size of the encoded data stream, the input and output of the encoder are all one bit input and output, the data generated by the encoder has n bits, n is an integer power of 2, the output format is k original data bits, n-k supervisory symbols, and the relationship is 2n-k=n。
4. The parallel TPC coding method and apparatus of claim 1 wherein the data is stored in different ways in the storage mechanism according to different data stream sizes, wherein the storage mechanism comprises at least three storage mechanisms, storage mechanism A1, storage mechanism A2, and storage mechanism A3.
5. The parallel TPC coding method and apparatus based on Hamming code as claimed in claim 4, wherein the original data of the storage means A1 is stored in columns.
6. The parallel TPC coding method and apparatus based on Hamming code as claimed in claim 4, wherein the row coded data of storage mechanism A2 is stored in columns, which is different from storage mechanism A1 in that the number of rows stored in data is n-k more.
7. The method and apparatus as claimed in claim 4, wherein the storage mechanism A3 integrates the encoded data together and adds a header to adjust the output order.
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