CN111211162A - 一种双层沟道结构的突触晶体管 - Google Patents
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Abstract
本发明公开了一种双层沟道结构的突触晶体管，包括衬底，所述衬底上设置有通过栅绝缘层与源电极、漏电极相隔开的栅电极，所述源电极和漏电极在同层间隔设置；所述栅绝缘层与源电极、漏电极之间设置有低电阻率沟道层和高电阻率沟道层；所述低电阻率沟道层位于栅绝缘层与高电阻率沟道层之间，所述低电阻率沟道层的厚度为3nm‑10nm；所述高电阻率沟道层位于低电阻率沟道层与源电极、漏电极之间，所述高电阻率沟道层的厚度为40nm‑100nm。本发明旨在提供一种通过在晶体管内设置高低电阻的双层沟道结构，使晶体管的转移特性曲线中制造出存储窗口，实现仿生突触信号。
Description
技术领域
本发明涉及半导体器件领域，尤其涉及一种双层沟道结构的突触晶体管。
背景技术
神经形态芯片通过模拟生物大脑的结构和功能实现信息的分布式存储和并行处理，相比于传统的冯·诺依曼系统，具有低功耗、高适应性、自主学习等能力，在模式识别、复杂感知等领域展现了独有的优势和巨大的应用潜力。突触是组成生物神经系统的基本单元，能够模拟生物突触行为的神经形态器件引起了广泛的关注。两端器件如忆阻器等难以实现数据传输和自主学习等复杂仿生功能，因而基于铁电栅和电解质栅的三端突触晶体管受到越来越多的关注和研究。
铁电栅突触晶体管是在传统场效应晶体管中引入具有自发极化的铁电绝缘层，通过栅压改变铁电材料的极化态就可以准确调制沟道的载流子浓度，具有低功耗、高工作速度的优点。然而PbZrTiO3、铪基氧化物等铁电材料需要高温晶化，不适用于柔性电子集成，有机铁电材料P(VDF-TrFE)与氧化物的界面性能差。电解质栅突触晶体管的栅介电层是富含可移动离子的电解质，这些离子在外电场作用下发生迁移，在半导体沟道与电解质或电解质与栅电极的界面处形成紧密的双电层。它可同时实现短程和长程突触塑性，工作电压低，功耗小，并且兼容柔性电子工艺，但是柔性电解质栅突触晶体管的长期稳定性存在许多问题，并且液态的电解质在集成和封装上存在难度。
发明内容
本发明的目的在于克服上述现有技术中的不足，旨在提供一种通过在晶体管内设置高低电阻的双层沟道结构，使晶体管的转移特性曲线中制造出存储窗口，实现仿生突触信号。
为达到上述目的，本发明的技术方案是这样实现的：
一种双层沟道结构的突触晶体管，包括衬底，所述衬底上设置有通过栅绝缘层与源电极、漏电极相隔开的栅电极，所述源电极和漏电极在同层间隔设置；所述栅绝缘层与源电极、漏电极之间设置有低电阻率沟道层和高电阻率沟道层；所述低电阻率沟道层位于栅绝缘层与高电阻率沟道层之间，所述低电阻率沟道层的厚度为3nm-10nm；所述高电阻率沟道层位于低电阻率沟道层与源电极、漏电极之间，所述高电阻率沟道层的厚度为40nm-100nm。
进一步的，所述低电阻率沟道层的载流子浓度为1×1018cm-3至1×1020cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为1×10-4Ω·cm至10Ω·cm。
进一步的，所述低电阻率沟道层由氧化锌、掺铝氧化锌、铟镓锌氧、掺镓氧化锌、铟锡氧、铟锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成。
进一步的，所述高电阻率沟道层的载流子浓度为1×1012cm-3至1×1017cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为100Ω·cm至105Ω·cm。
进一步的，所述高电阻率沟道层由氧化锌、铟镓锌氧、铟锌氧、镁锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成。
进一步的，所述衬底由聚萘二甲酸乙二醇酯、聚对苯二甲酸乙二酯、聚酰亚胺、石英、蓝宝石、砷化镓、聚甲基丙烯酸甲酯、聚二甲基硅氧烷、聚氯乙烯、聚苯乙烯或聚碳酸酯中的其中一种构成。
进一步的，所述源电极、漏电极和栅电极均由铟锡氧、Cr、Au、Al、Mo、Ni、Ti、Ag、Cu、碳纳米管、石墨烯中的其中一种构成。
进一步的，所述栅绝缘层由Al2O3、SiO2、Y2O3、HfO2、ZrO2、Ta2O5、Si3N4、AlN或聚乙烯吡咯烷酮中的其中一种构成。
相对于现有技术，本发明具有以下有益效果：
本发明通过在晶体管内设置高低电阻的双层沟道结构，并使高电阻率沟道层的厚度高于现有晶体管中沟道层的厚度，使氧离子能在双层沟道之间进行迁移和扩散，从而获得存储窗口，实现仿生突触信号。而且本发明提供的突触晶体管可兼容柔性工艺，易于封装集成。
附图说明
图1为本发明的结构示意图；
图2为本发明实施例1的转移特性曲线图；
图3为本发明实施例2的结构示意图；
图4为本发明实施例2的转移特性曲线图；
图5为本发明实施例3的转移特性曲线图；
图6为本发明兴奋性突触后的电流曲线；
附图标记说明：
1-衬底，2-栅电极，3-栅绝缘层，4-低电阻率沟道层，5-高电阻率沟道层，6-源电极，7-漏电极，8-钝化层。
具体实施方式
下面将参考附图并结合实施例来详细说明本发明。
实施例1
如图1所示，一种双层沟道结构的突触晶体管，包括衬底1，所述衬底1上设置有通过栅绝缘层3与源电极6、漏电极7相隔开的栅电极2，所述源电极6和漏电极7在同层间隔设置；所述栅绝缘层3与源电极6、漏电极7之间设置有低电阻率沟道层4和高电阻率沟道层5；所述低电阻率沟道层4位于栅绝缘层3与高电阻率沟道层5之间，所述低电阻率沟道层4的厚度为3nm-10nm，所述低电阻率沟道层4的载流子浓度为1×1018cm-3至1×1020cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为1×10-4Ω·cm至10Ω·cm，所述低电阻率沟道层4由氧化锌、掺铝氧化锌、铟镓锌氧、掺镓氧化锌、铟锡氧、铟锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成；所述高电阻率沟道层5位于低电阻率沟道层4与源电极6、漏电极7之间，所述高电阻率沟道层5的厚度为40nm-100nm，所述高电阻率沟道层5的载流子浓度为1×1012cm-3至1×1017cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为100Ω·cm至105Ω·cm，所述高电阻率沟道层5由氧化锌、铟镓锌氧、铟锌氧、镁锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成；所述衬底1由聚萘二甲酸乙二醇酯、聚对苯二甲酸乙二酯、聚酰亚胺、石英、蓝宝石、砷化镓、聚甲基丙烯酸甲酯、聚二甲基硅氧烷、聚氯乙烯、聚苯乙烯或聚碳酸酯中的其中一种构成；所述源电极6、漏电极7和栅电极2均由铟锡氧、Cr、Au、Al、Mo、Ni、Ti、Ag、Cu、碳纳米管、石墨烯中的其中一种构成；所述栅绝缘层3由Al2O3、SiO2、Y2O3、HfO2、ZrO2、Ta2O5、Si3N4、AlN或聚乙烯吡咯烷酮中的其中一种构成。
当栅电极2设置在衬底1上时，晶体管从下到上依次包括PEN衬底1、Cr栅电极2、Al2O3栅绝缘层3、铟镓锌氧(IGZO)低电阻率沟道层4、IGZO高电阻率沟道层5、铟锡氧(ITO)源电极6和ITO漏电极7、SiO2钝化层8。本实施例中薄膜晶体管的制备方法如下：在PEN衬底1上采用磁控溅射技术制备30nm厚的Cr栅电极2；采用原子层沉积(ALD)制备30nm厚的Al2O3栅绝缘层3；采用磁控溅射技术连续制备10nm厚的IGZO低电阻率沟道层4，40nm厚的IGZO高电阻率沟道层5，然后经过光刻和盐酸刻蚀，对沟道层进行图形化处理；采用磁控溅射技术制备100nm厚的ITO源电极6和漏电极7；采用等离子体增强化学气相沉积技术(PECVD)制备100nm厚的SiO2钝化层8，利用钝化层8覆盖高电阻率沟道层5。如图2所示，通过对上述晶体管通电后测得的转移特性曲线可看出，栅极电压从-10V增长到10V，再从10V降低到-10的过程中，栅极电压值为-2～0V时，逆时针的回滞产生了宽度为2V的存储窗口。
实施例2
如图3所示，当源电极6和漏电极7设置在衬底1上时，晶体管的纵向结构自下到上依次包括PI衬底1、Mo源电极6和漏电极7、ZnO高电阻率沟道层5、掺铝氧化锌(AZO)低电阻率沟道层4、ZrO2栅绝缘层3、Au栅电极2。本实施例中薄膜晶体管的制备方法如下：在PI衬底1上采用磁控溅射技术制备70nm的Mo源电极6和漏电极7；采用ALD方法连续制备100nm厚的ZnO高电阻率沟道层5，载流子浓度1×1016cm-3，载流子迁移率5cm2/V·s，电阻率1.25×103Ω·cm，5nm厚的AZO低电阻率沟道层4，载流子浓度1×1019cm-3，载流子迁移率40cm2/V·s，电阻率1.56×10-2Ω·cm；采用电子束蒸发法制备50nm厚的ZrO2栅绝缘层3；采用磁控溅射技术制备45nm厚的Au栅电极2。如图4所示，通过对上述晶体管通电后测得的转移特性曲线可看出，栅极电压从-10V增长到20V，再从20V降低到-10的过程中，栅极电压值为-8～2V时，逆时针的回滞产生了宽度为10V的存储窗口。
实施例3
晶体管的纵向结构与实施例1中相同，本实施例中薄膜晶体管的制备方法如下：在PET衬底1上采用磁控溅射技术制备40nm厚的Al栅电极2；采用PECVD制备70nm厚的Si3N4栅绝缘层3；采用磁控溅射技术连续制备3nm厚的ITO低电阻率沟道层4，载流子浓度1×1020cm-3，载流子迁移率100cm2/V·s，电阻率6.25×10-4Ω·cm，和70nm厚的锌锡氧(ZTO)高电阻率沟道层5，载流子浓度1×1017cm-3，载流子迁移率2cm2/V·s，电阻率3.13×103Ω·cm，然后经过光刻和盐酸刻蚀，对沟道层进行图形化处理；采用磁控溅射技术制备60nm厚的Ag源电极6和Ag漏电极7；采用ALD制备50nm厚的Al2O3钝化层8。如图5所示，通过对上述晶体管通电后测得的转移特性曲线可看出，栅极电压从-20V增长到10V，再从10V降低到-20的过程中，栅极电压值为-15～-10V时，逆时针的回滞产生了宽度为5V的存储窗口。
如图6所示的电流曲线可看出，对以上实施例中晶体管通电，当施加宽度10ms，幅度10V的脉冲栅压后实现了仿生兴奋性突触后电流。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。
Claims (8)
1.一种双层沟道结构的突触晶体管，包括衬底，其特征在于：所述衬底上设置有通过栅绝缘层与源电极、漏电极相隔开的栅电极，所述源电极和漏电极在同层间隔设置；所述栅绝缘层与源电极、漏电极之间设置有低电阻率沟道层和高电阻率沟道层；所述低电阻率沟道层位于栅绝缘层与高电阻率沟道层之间，所述低电阻率沟道层的厚度为3nm-10nm；所述高电阻率沟道层位于低电阻率沟道层与源电极、漏电极之间，所述高电阻率沟道层的厚度为40nm-100nm。
2.根据权利要求1所述的一种双层沟道结构的突触晶体管，其特征在于：所述低电阻率沟道层的载流子浓度为1×1018cm-3至1×1020cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为1×10-4Ω·cm至10Ω·cm。
3.根据权利要求2所述的一种双层沟道结构的突触晶体管，其特征在于：所述低电阻率沟道层由氧化锌、掺铝氧化锌、铟镓锌氧、掺镓氧化锌、铟锡氧、铟锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成。
4.根据权利要求1所述的一种双层沟道结构的突触晶体管，其特征在于：所述高电阻率沟道层的载流子浓度为1×1012cm-3至1×1017cm-3，载流子迁移率为1cm2/V·s至100cm2/V·s，电阻率为100Ω·cm至105Ω·cm。
5.根据权利要求4所述的一种双层沟道结构的突触晶体管，其特征在于：所述高电阻率沟道层由氧化锌、铟镓锌氧、铟锌氧、镁锌氧、锌锡氧、氧化亚铜、氧化锡中的其中一种构成。
6.根据权利要求1所述的一种双层沟道结构的突触晶体管，其特征在于：所述衬底由聚萘二甲酸乙二醇酯、聚对苯二甲酸乙二酯、聚酰亚胺、石英、蓝宝石、砷化镓、聚甲基丙烯酸甲酯、聚二甲基硅氧烷、聚氯乙烯、聚苯乙烯或聚碳酸酯中的其中一种构成。
7.根据权利要求1所述的一种双层沟道结构的突触晶体管，其特征在于：所述源电极、漏电极和栅电极均由氧化铟锡、Cr、Au、Al、Mo、Ni、Ti、Ag、Cu、碳纳米管、石墨烯中的其中一种构成。
8.根据权利要求1所述的一种双层沟道结构的突触晶体管，其特征在于：所述栅绝缘层由Al2O3、SiO2、Y2O3、HfO2、ZrO2、Ta2O5、Si3N4、AlN或聚乙烯吡咯烷酮中的其中一种构成。
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