CN111199918A - 用于隔离结构的伸缩衬里层 - Google Patents

用于隔离结构的伸缩衬里层 Download PDF

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CN111199918A
CN111199918A CN201911052573.8A CN201911052573A CN111199918A CN 111199918 A CN111199918 A CN 111199918A CN 201911052573 A CN201911052573 A CN 201911052573A CN 111199918 A CN111199918 A CN 111199918A
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liner layer
substrate
chamber
processing system
transfer
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CN111199918B (zh
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本杰明·科伦坡
特里萨·克莱默·瓜里尼
马尔科姆·贝文
程锐
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Applied Materials Inc
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Applied Materials Inc
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Abstract

一般地,本文所述的示例涉及用于在基板上的鳍片之间形成隔离结构(例如,浅沟槽隔离(STI))的方法和处理系统。在一个示例中,在基板上形成鳍片。在所述鳍片上和所述鳍片之间共形地形成衬里层。形成所述衬里层包括在所述鳍片上和所述鳍片之间共形地沉积预衬里层,以及使用等离子体处理使所述预衬里层致密化以形成所述衬里层。在所述衬里层上形成介电材料。

Description

用于隔离结构的伸缩衬里层
技术领域
本文所述的示例一般涉及半导体处理领域,并且更具体地,涉及缩放用于半导体装置的隔离结构的衬里层。
背景技术
可靠地产生纳米和更小的特征是超大规模集成(VLSI)和特大规模集成(ULSI)的下一代半导体装置的关键技术挑战之一。随着电路技术的极限到来,收缩尺寸的VLSI和ULSI技术对处理能力有附加需求。随着集成电路部件的尺寸的减小(例如,以纳米尺寸),一般仔细地选择用于制造部件的材料和工艺,以便获得令人满意的电性能水平。
集成电路部件的尺寸的减小可能导致在部件之间的间隙越来越小。一些可能适合于以较大尺寸填充类似间隙的工艺可能不适合于以较小尺寸填充间隙。因此,需要的是一种能够在维持集成电路的装置的令人满意的性能的同时以较小尺寸形成复杂装置的工艺和处理系统。
更进一步,由于现今VLSI和ULSI结构的复杂性,必须在多个不同处理腔室中处理其上形成这些装置的基板,这些处理腔室一般被配置为执行图案化步骤、沉积步骤、蚀刻步骤或热处理步骤中的至少一个。由于在工艺化学物质之间的不相容性、腔室产量的差异、或处理技术,在半导体制造行业中,设备制造商通常只将某些类型的处理技术(例如,沉积腔室)放置在一个处理系统中而将另一种处理技术(例如,蚀刻腔室)放置在另一个处理系统中。出现在常规半导体设备中的处理技术的划分要求将基板从一个处理系统传送到另一个处理系统,使得可以在基板上执行各种不同半导体制造工艺。在各个处理系统之间执行的传送工艺使基板暴露于各种形式的污染物和颗粒。因此,需要的是一种能够形成复杂装置并避免现今影响半导体处理的常见的污染物和颗粒源的工艺和处理设备。
发明内容
本公开的实施方式包括一种用于半导体处理的方法。在基板上形成鳍片。在所述鳍片上和所述鳍片之间共形地形成衬里层。形成所述衬里层包括在所述鳍片上和所述鳍片之间共形地沉积预衬里层,以及使用等离子体处理使所述预衬里层致密化以形成所述衬里层。在所述衬里层上形成介电材料。
本公开内容的实施方式还包括一种半导体处理系统。所述半导体处理系统包括:传送设备;第一处理腔室,所述第一处理腔室耦接到所述传送设备;第二处理腔室,所述第二处理腔室耦接到所述传送设备;和系统控制器。所述系统控制器被配置为控制在所述第一处理腔室中执行的沉积工艺,控制所述基板通过所述传送设备从所述第一处理腔室向所述第二处理腔室的传送,以及控制在所述第二处理腔室中执行的等离子体处理工艺。所述沉积工艺在基板上的鳍片上和鳍片之间共形地沉积预衬里层。所述等离子体处理工艺使所述预衬里层致密化以形成衬里层。
本公开内容的实施方式进一步包括一种半导体处理系统,所述半导体处理系统包括非暂时性计算机可读介质,所述非暂时性计算机可读介质存储指令,所述指令在由处理器执行时致使计算机系统执行操作。所述操作包括控制处理系统的第一处理腔室中的沉积工艺,控制所述基板通过所述处理系统的传送设备从所述处理系统的所述第一处理腔室向第二处理腔室的传送,以及控制在所述第二处理腔室中的等离子体处理工艺。所述沉积工艺在基板上的鳍片上和鳍片之间共形地沉积预衬里层。所述第一处理腔室和所述第二处理腔室耦接到所述传送设备。所述等离子体处理工艺使所述预衬里层致密化以形成衬里层。
附图说明
为了能够详细地理解本公开内容的上述特征的方式,可以参考示例得到上面简要地概述的更特定的描述,其中一些实施方式在附图中示出。然而,应当注意,附图仅示出了一些示例,并且因此不应视为对本公开内容的范围的限制,因为本公开内容可以允许其他等效示例。
图1是根据本公开内容的一些示例的示例多腔室处理系统的示意性俯视图。
图2是根据本公开内容的一些示例的可用于执行清洁工艺的处理腔室的截面图。
图3是根据本公开内容的一些示例的可用于执行沉积工艺的处理腔室的截面图。
图4是根据本公开内容的一些示例的可用于执行等离子体处理的处理腔室的截面图。
图5是根据本公开内容的一些示例的半导体处理的方法的流程图。
图6至图10是示出根据本公开内容的一些示例的图5的方法的方面的中间半导体结构的截面图。
为了便于理解,已经尽可能地使用相同的附图标记标示各图共有的相同元件。
具体实施方式
一般地,本文所述的示例涉及用于在基板上的鳍片之间形成隔离结构(例如,浅沟槽隔离(STI))的方法和处理系统。通过这种处理形成的隔离结构可以在例如鳍式场效应晶体管(FinFET)中实现。该方法和处理系统可以提供具有高度共形的气密衬里层的隔离结构,该隔离结构可以减少鳍片的氧化,这可以进一步减少鳍片因处理而产生的宽度(例如,临界尺寸(CD))损失。可以在鳍片之间的距离小的情况下在鳍片之间的沟槽中形成衬里层。另外地,可以使用低温(例如,等于或小于550℃)处理来形成衬里层,这可以减小鳍片的应力和弯折。可以在不使用含氯气体的情况下形成衬里层,这可以减少安全性和环境问题,并且可以准许后续处理的灵活性。另外地,可以通过使用集成处理解决方案来形成衬里层。
由于半导体装置不断地伸缩,在鳍片之间的隔离结构的形成变得越来越有挑战性。形成用于隔离结构的衬里层的技术不能形成具有足够的阶梯覆盖率的衬里层,这防止了衬里层气密。如果衬里层不是气密的,那么其上形成衬里层的鳍片可能就被氧化,这随后可能导致在隔离结构的凹陷期间鳍片的宽度损失。另外地,用于形成这种衬里层的热预算可能太高,这可能导致在隔离结构中产生应力,这又可能导致鳍片弯折。
本文所述的示例可以提供高度共形的气密衬里层,其能够减少或防止鳍片的氧化,这可以减少鳍片宽度的损失。衬里层可以使用低温处理形成,这可以减小应力和鳍片弯折。本文所述的系统和方法可以提供用于形成衬里层的集成解决方案,使得其上形成衬里层的基板在实施用于形成衬里层的各个工艺之间不暴露于大气周围环境(例如,制造设施(“(fab)”)中的环境)。通过避免暴露于大气周围环境,可以避免在形成衬里层的各个工艺之间的清洁步骤。本文描述了各种示例的其他益处;不过,本领域的技术人员将容易地理解本公开内容的范围内的示例的其他优点和益处。
以下描述各种不同示例。尽管不同示例的多个特征可以在工艺流程或系统中一起进行描述,但是多个特征也可以各自分开地或单独地和/或在不同工艺流程或不同系统中实施。另外地,各种处理流程被描述为按顺序执行;其他示例可以以不同顺序和/或以更多或更少的操作实施工艺流程。
图1是根据本公开内容的一些示例的多腔室处理系统100的示意性俯视图。处理系统100一般包括装载锁定腔室104、106、具有传送机器人110的传送腔室108、以及处理腔室112、114、116、118、120、122。处理系统100可以进一步包括工厂接口(未示出)。如本文详细地描述的,处理系统100中的基板可以在各个腔室中进行处理并在各个腔室之间进行传送,而不将基板暴露于在处理系统100外部的周围环境(例如,如可能存在于制造设施中的大气周围环境)。例如,可以在低压(例如,小于或等于约300Torr)或真空环境中在各个腔室之间进行传送基板,而不破坏在处理系统100中在基板上执行的各个工艺之间的低压或真空环境。因此,处理系统100可以提供用于基板的一些处理的集成解决方案。
可根据本文提供的教导适当地修改的处理系统的示例包括
Figure BDA0002255677040000041
或可从位于加利福尼亚州圣克拉拉的应用材料公司(Applied Materials,Inc.,Santa Clara,California)商购的其他合适的处理系统。可以设想,其他处理系统(包括来自其他制造商的处理系统)可以适于从本文所述的方面中受益。
如图所示,处理腔室112、114被分组在串联单元130中;处理腔室116、118被分组在串联单元132中;并且处理腔室120、122被分组在串联单元134中。串联单元130、132、134可以各自具有相应单个工艺气体供应。串联单元130、132、134围绕传送腔室108定位。处理腔室112、114、116、118、120、122例如经由在处理腔室与传送腔室之间的相应端口来耦接到传送腔室108。类似地,装载锁定腔室104、106例如经由在装载锁定腔室与传送腔室之间的相应端口来耦接到传送腔室108。传送腔室108具有传送机器人110,以用于在腔室之间处理和传送基板。在一些示例中,工厂接口可以耦接到装载锁定腔室104、106(例如,装载锁定腔室104、106设置在工厂接口与传送腔室108之间)。
装载锁定腔室104、106具有耦接到传送腔室108的相应端口。传送腔室108进一步具有耦接到处理腔室112、114、116、118、120、122的相应端口。端口可以是例如带有狭缝阀的狭缝阀开口,以用于通过传送机器人110使基板从中通过并用于在相应腔室之间提供密封以防止气体从相应腔室之间通过。一般地,任何端口都是敞开的,以用于传送基板从中通过;否则,端口是封闭的。
装载锁定腔室104、106、传送腔室108、以及处理腔室112、114、116、118、120、122可以流体地耦接到气体和压力控制系统(未具体地示出)。气体和压力控制系统可以包括一个或多个气泵(例如,涡轮泵、低温泵、粗抽泵等)、气源、各种阀、以及流体地耦接到各个腔室的导管。在操作中,基板被传送到装载锁定腔室104或106(例如,从工厂接口)。然后,气体和压力控制系统将装载锁定腔室104或106抽空。气体和压力控制系统进一步将传送腔室108维持处于内部低压或真空环境(其可以包括惰性气体)。因此,抽空装载锁定腔室104或106促进基板在例如工厂接口的大气环境与传送腔室108的低压或真空环境之间传递。
在基板处于已经被抽空的装载锁定腔室104或106中的情况下,传送机器人110通过将装载锁定腔室104或106耦接到传送腔室108的相应端口将基板从装载锁定腔室104或106传送到传送腔室108中。然后,传送机器人110能够通过相应端口将基板传送到处理腔室112、114、116、118、120、122中的任一个和/或在处理腔室112、114、116、118、120、122中的任一个之间进行传送。基板在各个腔室内和各个腔室间的传送可以在由气体和压力控制系统提供的低压或真空环境中进行。
处理腔室112、114、116、118、120、122可以是用于靶材处理的任何合适的腔室。在一些示例中,处理腔室112能够执行清洁工艺;处理腔室116能够执行沉积工艺(例如,等离子体增强CVD或热CVD工艺);并且处理腔室120能够执行等离子体工艺和/或热工艺。这些处理腔室112、116、120被标识出以便于之后描述。其他处理腔室可以执行这些工艺。处理腔室112可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的
Figure BDA0002255677040000051
预清洁腔室。处理腔室116可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的
Figure BDA0002255677040000061
腔室。处理腔室120可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的DPXTM腔室。可以实施可从其他制造商获得的其他腔室。
系统控制器140耦接到处理系统100,以用于控制处理系统100或处理系统的部件。例如,系统控制器140可以使用对处理系统100的腔室104、106、108、112、114、116、118、120、122的直接控制或通过控制与腔室104、106、108、112、114、116、118、120、122相关联的控制器来控制处理系统100的操作。在操作中,系统控制器140使得数据能够从相应腔室收集和反馈,以协调处理系统100的性能。
系统控制器140一般包括中央处理单元(CPU)142、存储器144和支持电路146。CPU142可以是可在工业环境中使用的任何形式的通用处理器中的一种。存储器144或非暂时性计算机可读介质可由CPU 142访问,并且可以是诸如随机存取存储器(RAM)、只读存储器(ROM)、软盘、硬盘或任何其他形式的数字存储装置(无论本地还是远程)的存储器中的一个或多个。支持电路146耦接到CPU 142,并且可以包括高速缓存、时钟电路、输入/输出子系统、电源等。本文公开的各种方法一般可以通过CPU 142执行存储在存储器144(或特定处理腔室的存储器)中的例如作为软件例程的计算机指令代码来在CPU 142的控制下实现。当由CPU 142执行计算机指令代码时,CPU 142控制腔室以根据各种方法来执行工艺。
其他处理系统可以采用其他配置。例如,更多或更少的处理腔室可以耦接到传送设备。在所示的示例中,传送设备包括传送腔室108。在其他示例中,更多的传送腔室(例如,两个或更多个传送腔室)和/或一个或多个保持腔室可以被实施为处理系统中的传送设备。
图2是根据本公开内容的一些示例的可用于执行清洁工艺的处理腔室112的截面图。处理腔室112可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的
Figure BDA0002255677040000062
预清洁腔室。处理腔室112包括腔室主体212、盖组件214和基板支撑组件216。盖组件214设置在腔室主体212的上端处,并且基板支撑组件216至少部分地设置在腔室主体212内。腔室主体212、盖组件214和基板支撑组件216一起限定可在其中处理基板的区域。
盖组件214包括至少两个堆叠部件,该至少两个堆叠部件被配置为在两个堆叠部件之间形成等离子体区域。第一电极220竖直地布置在第二电极222的上方,以限制在两个电极之间的等离子体体积。第一电极220连接到射频(RF)功率源224,并且第二电极222连接到接地,这在第一电极220与第二电极222之间形成电容。
盖组件214还包括一个或多个气体端口226,以用于通过阻挡板228和气体分配板230(诸如喷头)向基板表面提供清洁气体。清洁气体可以是蚀刻剂、离子化气体或活性自由基,诸如离子化氟、氯或氨。在其他示例中,可以利用不同清洁工艺来清洁基板表面。例如,可以通过气体分配板230将包含氦(He)和三氟化氮(NF3)的远程等离子体引入处理腔室112中,而可以经由设置在腔室主体212的一侧处的单独进气端口225将氨(NH3)直接地注入处理腔室112中。
基板支撑组件216可以包括基板支撑件232,以在处理期间在其上支撑基板210。基板支撑件232具有平坦基板支撑表面,以用于在其上支撑待处理的基板。基板支撑件232可以通过轴236耦接到致动器234,该轴延伸穿过形成在腔室主体212的底部中的居中地定位的开口。致动器234可以通过波纹管(未示出)柔性地密封以与腔室主体212隔开,从而防止真空从轴236周围泄漏。致动器234允许基板支撑件232在腔室主体212内在工艺位置与下部传送位置之间竖直地移动。传送位置在形成在腔室主体212的侧壁中的狭缝阀开口的开口稍下方。在操作中,基板支撑件232可以升高到紧邻盖组件214的位置,以控制待处理的基板210的温度。因此,可以经由来自气体分配板230的发出辐射或对流来加热基板210。
偏置功率源280可以通过阻抗匹配网络284耦接到基板支撑件232。偏置功率源280向基板210提供偏置以将离子化清洁气体引向基板210。
可作为处理系统100的气体和压力控制系统的一部分的真空系统可以用于从处理腔室112排出气体。真空系统包括真空泵218,该真空泵经由阀217耦接到设置在腔室主体212中的真空端口221。处理腔室112还包括控制器(未示出),该控制器可以是系统控制器140或由系统控制器140控制的控制器,以用于控制在处理腔室112内的工艺。
图3是根据本公开内容的一些示例的可用于执行沉积工艺的处理腔室116的截面图。处理腔室116是用于在基板上沉积薄膜或层的腔室。如本文所述的,处理腔室116被配置为实施等离子体增强化学气相沉积(PECVD),但是其他示例也设想了处理腔室116被配置为实施其他类型的沉积工艺,诸如CVD(更广泛地)、原子层沉积(ALD)或其他沉积工艺。处理腔室112可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的
Figure BDA0002255677040000081
腔室。
处理腔室116包括腔室主体302、盖组件306和基板支撑组件354。盖组件306设置在腔室主体302的上端处并由该腔室主体支撑,并且基板支撑组件354至少部分地设置在腔室主体302内。腔室主体302、盖组件306和基板支撑组件354一起限定在处理腔室116内的可在其中处理基板的内部处理区域308。内部处理区域308可以通过形成在腔室主体302中的端口(未示出)进入,该端口促进基板传送进出处理腔室116。腔室主体302可以由整块铝或与处理相容的其他材料制成。
盖组件306包括底板310、阻挡板312、气体分配板314、调制电极316和绝缘体318。例如,底板310、阻挡板312和气体分配板314可以由不锈钢、铝、阳极氧化铝、镍或任何其他RF导电材料制成。进气端口320穿过底板310,并且流体地耦接到气源322。阻挡板312耦接到底板310并相对于底板310朝向内部处理区域308设置在内部。阻挡板312具有从中穿过的通路324。绝缘体318(例如,环形绝缘体)设置在阻挡板312与气体分配板314之间。气体分配板314(例如,喷头)具有从中穿过的通路326并相对于阻挡板312朝向内部处理区域308设置在内部。一对绝缘体318(例如,环形绝缘体)设置在气体分配板314与调制电极316之间。调制电极316是环形的,并且环绕内部处理区域308。绝缘体318(例如,环形绝缘体)设置在调制电极316与腔室主体302之间,诸如当盖组件306设置在腔室主体302上以进行处理时。绝缘体318将在之间设置相应绝缘体318的相应部件电隔离并在一些情况下热隔离。绝缘体318可以是介电材料,诸如陶瓷或金属氧化物,例如氧化铝和/或氮化铝。
盖组件306和/或腔室主体302可以包括加热和冷却元件。例如,底板310可以具有用于使流体循环通过底板310的导管。流体可以是热控制流体,诸如冷却流体(例如,水)。另外,加热器可以包括在底板310中,该加热器与用于使流体循环的导管一起可以为盖组件306提供热控制以实现温度均匀性。
可以由气源322通过进气端口320提供工艺气体(例如,一种或多种前驱物和一种或多种惰性载气)以引入处理腔室116中。阻挡板312可以向气体分配板314的背面提供均匀的气体分配。来自进气端口320的处理气体进入部分地限制在底板310与阻挡板312之间的第一空间328,并且然后流过穿过阻挡板312的通路324进入在阻挡板312与气体分配板314之间的第二空间330。然后,处理气体从第二空间330通过穿过气体分配板314的通路326进入内部处理区域308。可以通过经由阀344流体地耦接到内部处理区域308的真空泵342将处理气体从内部处理区域308排出。真空泵342可以是处理系统100的气体和压力控制系统的一部分。
RF功率源340电连接到底板310并被配置为将RF电位施加到底板310,以促进在内部处理区域308中产生等离子体。RF功率源340可以包括能够产生RF功率(例如,以约13.56MHz的频率)的高频RF功率源(“HFRF功率源”),或包括能够产生RF功率(例如,以约300kHz的频率)的低频RF功率源(“LFRF功率源”)。LFRF功率源可以提供低频生成和固定匹配元素。HFRF功率源可以被设计成与固定匹配一起使用,并且可以调节输送到负载的功率,从而消除了对前向和反射功率的担忧。
调制电极316可以耦接到调谐电路346,该调谐电路控制从调制电极316到电接地的电路径的阻抗。调谐电路346包括电子传感器348和可由电子传感器348控制的可变电容器350。调谐电路346可以是包括一个或多个电感器352的LC电路。电子传感器348可以是电压或电流传感器,并且可以耦接到可变电容器350以提供对内部处理区域308内的等离子体条件的一定程度的闭环控制。
基板支撑组件354可以设置在处理腔室116内。基板支撑组件354包括可在处理期间支撑基板356的基板支撑件358。第一电极360和第二电极362设置在基板支撑件358内和/或上。另外,加热器元件364嵌入在基板支撑件358中。加热器元件364可操作来将基板支撑组件354和定位在其上的基板356可控地加热到目标温度,以便将基板356维持为处于在约150℃至约1,000℃的范围内的温度。基板支撑件358耦接到用于支撑的轴366。轴366可以提供来自气源368的导管以及在基板支撑组件354与处理腔室116的其他部件之间的电和温度监测引线(未示出)。在一些示例中,可以通过连接到气源368的一个或多个净化气体入口369将净化气体提供到基板356的背面。朝向基板356的背面流动的净化气体可以帮助防止因沉积在基板356的背面上而引起的颗粒污染。净化气体也可以用作冷却基板356的背面的温度控制形式。尽管未示出,但是轴366可以耦接到如以上关于图2所述的那样的致动器。致动器可以通过波纹管(未示出)柔性地密封以与腔室主体302隔开,从而防止真空从轴366周围泄漏。致动器可以允许基板支撑件358在腔室主体302内在工艺位置与下部传送位置之间竖直地移动。传送位置在形成在腔室主体302的侧壁中的狭缝阀开口的开口稍下方。在操作中,基板支撑件358可以升高到紧邻盖组件306的位置,这可以进一步控制待处理的基板356的温度。
第一电极360可以嵌入在基板支撑件358内或耦接到基板支撑件358的表面。第一电极360可以是板、穿孔板、网、金属丝网或任何其他分配布置。第一电极360可以是调谐电极,并且可以耦接到调谐电路370。调谐电路370可以具有电子传感器372和可变电容器374,该可变电容器374电连接在第一电极360与电接地之间。电子传感器372可以是电压或电流传感器,并且可以耦接到可变电容器374,以提供对内部处理区域308中的等离子体条件的进一步控制。
可作为偏置电极的第二电极362可以耦接到基板支撑件358。第二电极362可以通过阻抗匹配电路378耦接到偏置功率源376。偏置功率源376可以是DC功率、脉冲DC功率、RF功率、脉冲RF功率或它们的组合。
处理腔室112还包括控制器(未示出),该控制器可以是系统控制器140或由系统控制器140控制的控制器,以用于控制在处理腔室112内的工艺。
在操作中,基板设置在基板支撑件358上并根据任何期望的流动计划使工艺气体流过盖组件306。为处理腔室116中的各种热部件建立温度设定点。电功率耦接到底板310,以在内部处理区域308中建立等离子体。如果需要,可以使用偏置功率源376对基板进行电偏置。
当在内部处理区域308中激励等离子体后,在等离子体与调制电极316之间建立电位差。在等离子体与第一电极360之间也建立了电位差。然后,可变电容器350和374可以用于调整到由调谐电路346和370表示的电接地的路径的阻抗。可以将设定点输送到调谐电路346和370,以提供对从中心到边缘的等离子体密度均匀性以及沉积速率的独立控制。电子传感器可以独立地调整可变电容器以最大化沉积速率并最小化厚度不均匀性。除其他外,被实施来控制等离子体的温度和均匀性的部件可以准许高度共形的层沉积在待处理的基板上,即使在很小间隙内。
图4是根据本公开内容的一些示例的可用于执行等离子体处理的处理腔室120的截面图。处理腔室120是用于使用等离子体处理基板(诸如已经形成在基板表面上的薄膜)的腔室。如本文所述的,处理腔室120被配置为实现电感耦合等离子体(ICP),但是其他示例也设想了处理腔室120被配置为实施其他类型的等离子体,诸如电容耦合等离子体(CCP)。处理腔室112可以是可从加利福尼亚州圣克拉拉的应用材料公司获得的DPXTM腔室。
如图所示,处理腔室120包括腔室主体402、盖组件404和基板支撑组件410。盖组件404设置在腔室主体402的上端处并由该腔室主体支撑,并且基板支撑组件410至少部分地设置在腔室主体402内。腔室主体402、盖组件404和基板支撑组件410一起限定在处理腔室120内的可在其中处理基板的内部处理区域406。内部处理区域406可以通过形成在腔室主体402中的端口(未示出)进入,该端口促进基板传送进出处理腔室120。
腔室主体402可以耦接到电接地。腔室主体402可以包括嵌入其中的加热和冷却元件。例如,容纳液体的导管(未示出)可以延行穿过腔室主体402,和/或加热元件可以嵌入在腔室主体402中(例如,加热盒或线圈)或可以包裹在内部处理区域406周围(例如,加热套或胶带)。盖组件404可以包括任何合适的电介质或由任何合适的电介质组成,诸如石英。对于一些示例,盖组件404可以是各种形状(例如,圆顶形的)。在一些示例中,盖组件404可以涂覆陶瓷涂层,以用于进行保护以免受等离子体物质。
基板支撑组件410包括基板支撑件412(例如,静电吸盘(ESC))。基板支撑件412被配置为在基板414的处理期间将基板414固定在基板支撑组件410上,诸如包括将基板414暴露于在内部处理区域406中的等离子体。在一些示例中,基板支撑件412和/或基板支撑组件410包括加热和/或冷却元件,该加热和/或冷却元件被配置为在处理期间控制基板414的温度。在一些示例中,通过使用加热和冷却元件,可以将基板支撑件412的温度控制在约20℃至约500℃的范围内。例如,经由嵌入在基板支撑组件410内的加热和冷却元件对基板支撑件412和基板414的温度控制可以帮助降低因离子轰击而引起的不想要的温度。
在一些示例中,经由导管418耦接到基板支撑组件410的气源416可以促进基板支撑组件410与基板之间的热传递。来自气源416的气体可以经由导管418被提供到在基板414下方的基板支撑组件410的表面(例如,基板支撑件412的表面)中形成的通道(未示出)。气体可以促进在基板支撑组件410与基板414之间的热传递。在处理期间,可以将基板支撑组件410加热到稳态温度,并且然后气体可以促进基板414的均匀加热。可以通过加热元件(未示出)来加热基板支撑组件410,加热元件诸如嵌入在基板支撑组件410内的电阻加热器或一般对准基板支撑组件410或当在该基板支撑组件上时的基板414的灯。
处理腔室120包括气源420、一个或多个进气端口422、阀424(例如,节流阀)和真空泵426。气源420、阀424和真空泵426单独地和和/或共同地可以是处理系统100的气体和压力控制系统的一部分。可以通过一个或多个进气端口422从气源420供应一种或多种工艺气体,以在内部处理区域406中供应气体来产生等离子体。阀424被配置成准确从内部处理区域406维持或排出气体。真空泵426被配置为从内部处理区域406排出或排放气体,例如当阀424打开时。气源420、阀424和真空泵426可以被配置为共同地维持内部处理区域406内的目标压力。
处理腔室120包括等离子体发生器430。等离子体发生器430包括感应线圈元件432、第一阻抗匹配网络434、RF功率源436、屏蔽电极438、开关440和检测器442。如图所示,包括至少一个感应线圈元件432的RF天线设置在盖组件404上。在一些示例中,诸如如图4所示,围绕处理腔室120的内部处理区域406的中心轴线设置的两个同轴线圈元件电连接在第一阻抗匹配网络434与电接地之间,并且第一阻抗匹配网络434电连接到RF功率源436。感应线圈元件432可以以RF频率被驱动,例如,通过RF功率源436,以在处理腔室120的内部处理区域406中产生等离子体。在一些示例中,可以围绕腔室主体402的至少一部分设置一个或多个感应线圈元件432。在一些示例中,RF功率源436能够以13.56MHz的频率产生例如高达4kW的RF功率。例如,供应到感应线圈元件432的RF功率可以以高达100kHz的频率被脉冲或进行功率循环。
如图所示,屏蔽电极438插置在RF天线的感应线圈元件432与盖组件404之间,但是在一些示例中可以省略屏蔽电极438。屏蔽电极438可以选择性地(例如,交替地)电浮动或经由诸如开关440的用于进行和断开电连接的任何合适的机构耦接到电接地。
在一些示例中,检测器442可以附接到腔室主体402,以促进确定内部处理区域406内的气体何时已经被激励成等离子体。检测器442可以例如检测由被激励的气体发出的辐射或使用光学发射光谱(OES)来测量与所产生的等离子体相关联的一个或多个波长的光的强度。
处理腔室120还包括第二阻抗匹配网络452和偏置功率源454。基板支撑组件410可以通过第二阻抗匹配网络452来耦接到偏置功率源454。偏置功率源454与RF功率源436类似地能够产生具有在1MHz至160MHz的范围内的驱动频率和在约0kW至约3kW的范围内的功率的RF信号。偏置功率源454能够在2MHz至160MHz范围内的频率(例如,以13.56MHz或2MHz的频率)下产生在约1W至约1kW的范围内的功率。在一些示例中,偏置功率源454可以是DC或脉冲DC源。在一些示例中,耦接到偏置功率源454的电极设置在基板支撑件412内。偏置功率源454可以在基板414上提供基板电压偏置以促进对基板414的处理。
处理腔室112还包括控制器(未示出),该控制器可以是系统控制器140或由系统控制器140控制的控制器,以用于控制在处理腔室112内的工艺。
在操作中,基板414可以放置在基板支撑件412上,并且一种或多种工艺气体可以从气源420通过一个或多个进气端口422供应到处理腔室120的内部处理区域406中。供应到内部处理区域406中的一种或多种气体可以在内部处理区域406中由等离子体发生器430(例如,通过供应来自RF功率源436的功率)激励成等离子体460。偏置功率源454可以在基板414上提供电压偏置(例如,通过从偏置功率源454提供电压),以促进等离子体工艺。在内部处理区域406内的压力和基板414的温度可以被控制为目标压力和目标压力。等离子体460可以轰击基板414,例如以更改基板414上的膜的性质。
可以通过使用任何等离子体诊断技术来测量等离子体460的等离子体密度,诸如通过使用自激电子等离子体共振光谱(SEERS)、朗缪尔探针(Langmuir probe)或其他合适的技术。感应线圈元件432配置,诸如如图4所示,对比诸如电容耦合等离子体的其他等离子体源配置来说,可以提供高密度等离子体的改进的控制和产生。
图5是根据本公开内容的一些示例的半导体处理的方法500的流程图。图6至图10是示出根据本公开内容的一些示例的图5的方法500的各方面的中间半导体结构的截面图。本文所述的示例是在基板上的鳍片之间形成隔离结构(例如,浅沟槽隔离(STI))的上下文中。本领域的技术人员将容易地理解本文所述的方面在其他上下文中的各种应用,并且在其他示例的范围内也设想了此类变型。
根据图5的框502,在基板2上形成鳍片10。图6示出了在基板2上形成的鳍片10的截面图。为了获得图6的结构,提供基板2。基板2可以是任何合适的半导体基板,诸如体基板、绝缘体上半导体(SOI)基板等。在一些示例中,基板2是体硅晶片。基板尺寸的示例包括200mm直径、350mm直径、400mm直径、和450mm直径。在基板2上形成外延层6(例如,异质外延层)。在一些示例中,外延层6的材料是硅锗。可以使用任何适当的外延生长工艺来形成外延层6。
然后,在基板2上形成鳍片10。可以通过蚀刻特征(诸如延伸到基板2中的沟槽12)来形成鳍片10,使得每个鳍片10被限定在一对相邻特征(例如,沟槽12)之间。如图所示,掩模部分8形成在外延层6上并用于掩蔽形成沟槽12的蚀刻。例如,掩模部分8可以是或包括氮化物,诸如氮化硅、碳氮化硅、氮氧化硅等。掩模部分8的层可以沉积在外延层6上并使用适当的图案化工艺在蚀刻工艺中被图案化到掩模部分8中。图案化工艺可以包括多重图案化工艺,诸如自对准双重图案化(SADP)、光刻-蚀刻-光刻-蚀刻(LELE)双重图案化等,以在鳍片10之间实现目标间距。蚀刻沟槽12的示例蚀刻工艺包括反应离子蚀刻(RIE)工艺等。如图6所示,每个鳍片10包括外延层6的一部分和基板2的一部分2A,在这两者上有掩模部分8。
根据框504,然后,将其上形成鳍片10的基板2传送到处理系统,诸如图1的处理系统100。例如,基板2通过前开式标准舱(FOUP)传送到工厂接口,并且在工厂接口处,基板2通过端口从FOUP传送到装载锁定腔室104或106。然后如上所述将装载锁定腔室104或106抽空。后续传送和处理是在处理系统100中执行,如框506所示,例如而不将基板2暴露于在处理系统100外部的大气周围环境且不破坏在处理系统100的传送设备内维持的低压或真空环境。框506中所示的处理仅是示例。框506中的一些工艺可能不在处理系统100中执行,和/或附加工艺可能在处理系统100中执行。
在框508中,任选地,将基板2传送到处理系统100的第一处理腔室,例如处理腔室112。例如,传送机器人110通过端口从装载锁定腔室104或106传送基板2并通过端口到达处理腔室112。在框510中,任选地,在处理腔室112中的基板2上执行清洁工艺。清洁工艺可以是
Figure BDA0002255677040000151
预清洁工艺。清洁工艺可以去除由于在将基板2运输到处理系统100期间暴露于大气周围环境而在鳍片10上形成的任何原生氧化物。
在图2所示的处理腔室112中执行的一些示例中,清洁工艺包括使三氟化氮(NF3)和氦(He)的混合物从进气端口226流入并使氨(NH3)从进气端口225流入。三氟化氮(NF3)和氦(He)的混合物的比例在1:350(NF3:He)至1:120(NF3:He)的范围内,该混合物可以从进气端口226以5000sccm至7000sccm的范围内的流率流动,诸如其中三氟化物(NF3)的流率为在10sccm至25sccm的范围内,而氦(He)的流率为在约3000sccm至3500sccm的范围内。在清洁工艺期间腔室122中的压力可以维持处于在0.25Torr至约2Torr的范围内。由RF功率源224施加的功率可以在约10MHz至约20MHz的范围内(例如,13.56MHz)的频率下在约10W至约50W的范围内。
在处理腔室112中执行清洁工艺之后,在框512中,将基板2传送到处理系统100的第二处理腔室,例如处理腔室116。例如,通过传送机器人110将基板2从处理腔室112传送通过端口并通过另一个端口到达处理腔室116。
在框514中,在处理腔室116中在基板2上执行沉积工艺以形成预衬里层14。图7示出预衬里层14的形成。预衬里层14共形地形成在沟槽12和鳍片10中。在一些示例中,预衬里层14诸如通过PECVD、ALD等在该沟槽12中和鳍片10上共形地沉积。在一些示例中,衬里层14是或包括非晶硅,但是在其他示例中,预衬里层14可以是或包括能够被致密化以形成气密阻挡物的任何材料。在一些示例中,预衬里层14的厚度在约1nm至约4nm的范围内,诸如约1.5nm至约2.5nm,诸如约2nm。预衬里层14可以沿着鳍片10和沟槽12具有良好的阶梯覆盖率。处理腔室116可以是
Figure BDA0002255677040000152
腔室,其可以执行沉积工艺,诸如在图3中所示。
在图3所示的处理腔室116中执行的一些示例中,沉积工艺沉积非晶硅的预衬里层14。在这样的示例中,可以从气源322供应含硅前驱物气体,示例的前驱物气体包括乙硅烷(Si2H6)、丙硅烷(Si3H8)和/或其他含硅前驱物。前驱物气体的流率可以在约10sccm至约2000sccm的范围内。前驱物气体可以与惰性载气(诸如氩(Ar)、氦(He)、氢(H2)、氮(N2)等)混合。在沉积工艺中内部处理区域308内的压力可以维持在较大压力下,诸如达到或包括600Torr。在沉积工艺期间处理温度可以在约100℃至约500℃的范围内。处理腔室116可以准许在等于或小于550℃的高温和低压下(具有高温均匀性)沉积预衬里层14,这可以准许在小尺度的间隙(诸如沟槽12)中沉积高度共形的层。
在处理腔室116中执行沉积工艺之后,在框516中,将基板2传送到处理系统100的第三处理腔室,例如处理腔室120。例如,通过传送机器人110将基板2从处理腔室116传送通过端口并通过另一个端口到达处理腔室120。
在框518中,在处理腔室120中的基板2上执行等离子体处理工艺以将预衬里层14致密化以形成衬里层16。图8示出了将预衬里层14致密化以形成衬里层16。可以使用等离子体工艺使预衬里层14致密化以形成衬里层16。在一些示例中,实施氦和/或含氮等离子体。预衬里层14可以暴露于含氦和/或氮等离子体,它使衬里层14致密,并且在某些情况下使氮扩散到预衬里层14中和/或与预衬里层14反应以形成衬里层16。因此,在一些示例中,等离子体工艺可以因此使预衬里层14氮化以形成衬里层16。在预衬里层14为非晶硅且随后使用含氮等离子体致密化的示例中,衬里层16可以是含氮硅层(例如“类氮化物”层)和/或氮化硅层。衬里层16可以在鳍片10上形成气密阻挡物,以减少和/或防止氧在后续处理期间穿过衬里层16扩散到鳍片10。处理腔室120可以是可执行等离子体工艺的DPXTM腔室,如图4所示。
在图4所示的处理腔室120中执行的一些示例中,非晶硅的预衬里层14通过等离子体工艺进行致密化和氮化,以形成类氮化物层或氮化硅的衬里层16。在这样的示例中,等离子体工艺可以包括通过使含氮工艺气体从气源420流过进气端口422来产生含氮等离子体,该含氮工艺气体可以包括惰性载气。在一些示例中,含氮工艺气体是或包括氮(N2)和氩(Ar)或氦(He)的混合物。在等离子体工艺期间在内部处理区域406中的压力可以在约1mTorr至约100mTorr的范围内。在等离子体工艺期间RF功率源436的功率可以在约2MHz至约160MHz的范围内(例如13.56MHz)的频率下在约500W至约5000W的范围内。在一些示例中,RF功率源的功率可以是脉冲的。偏置功率源454可以关闭或可以不向基板支撑件施加任何功率。偏置功率源454的功率可以在约2MHz至约160MHz的范围内(约13.56MHz)的频率下在约0W至约2000W的范围内。在等离子体工艺期间基板支撑件412的温度可以在约150℃至约500℃的范围内,诸如约450℃。在等离子体工艺的一些示例中,将基板温度保持在约350℃至500℃,向工艺气体提供约2000W至2500W的RF功率,施加约0W至1000W(例如,1W至100W)的基板RF偏置功率,将腔室保持在约5mTorr至20mTorr,并且使氮和氦流动达约4分钟的时间段。
返回参考框514,在一些示例中,衬里层16在不使用含氯气体的情况下形成。通过避免使用含氯气体,就不形成危险和腐蚀性副产物气体(诸如盐酸(HCl)和氯(Cl2)。因此,可以实现安全且环境友好的优点。因此,如以上的一些示例所述,预衬里层14的沉积可以实现含硅前驱物和惰性载气,这两者都不包含氯,并且预衬里层14致密化以形成衬里层16可以实现含氮等离子体,该含氮等离子体可以包括惰性载气,这两者都不包含氯。
在单个处理系统100内传送基板2准许传送基板2,而不将基板2暴露于在处理系统100外部的大气周围环境中(例如,制造设施环境)。通过避免将基板2暴露于这种大气周围环境,可以避免在处理腔室116中的处理与在处理腔室120中的处理之间进行清洁处理,例如,由于没有发生因暴露于这种大气周围环境而引起的氧化或污染。
通过如上所述形成衬里层16,衬里层16可以是高度气密的层。通过成为高度气密的层,几乎没有氧可以扩散或穿透衬里层16到达鳍片10。因此,相对于可形成为隔离结构的一部分的其他衬里层,鳍片10的侧面可以具有减少的氧化或没有氧化。在鳍片10减少或没有氧化的情况下,鳍片10的宽度(例如,临界尺寸(CD))可以在后续处理期间更容易地维持。例如,如果鳍片10的侧面被显著地氧化,那么对随后沉积的介电材料进行蚀刻以使该材料凹陷(如下所述)可能导致鳍片10的氧化面也被蚀刻,这使鳍片10的宽度发生损失。在完全没有氧化或几乎没有氧化的情况下,将完全没有或几乎没有氧化物被蚀刻,使得鳍片10的宽度完全没有损失或几乎没有损失。高度气密的层可以准许基板2随后暴露于例如大气周边环境,而不发生显著氧化,并且可以准许在本来可能导致显著氧化的后续处理中有自由度。
在处理腔室120中的等离子体处理工艺之后,基板2可以由传送机器人110通过端口从处理腔室120传送通过端口到达另一个处理腔室(例如,用于后续材料的沉积)和/或然后通过端口将基板2传送到装载锁定腔室104或106。然后,将基板2通过端口从装载锁定腔室104或106传送出,经由工厂接口到达FOUP。然后,可以将基板2运输到其他处理系统进行进一步处理。
在框520中,将介电材料18沉积在基板2上。图9示出了在衬里层16上形成介电材料18。在一些示例中,介电材料18在衬里层16上流动到沟槽12中并流动到鳍片10上作为一种材料并转换成另一种材料。作为一个示例,使含氮材料流动并随后转换成氧化物材料以形成介电材料18。介电材料18的形成可以是通过可流动CVD(FCVD)进行的。FCVD的转换工艺可以包括例如在高压环境中使流动材料暴露于蒸气。高压环境可以达到并包括80巴的压力(例如,约60,000Torr),诸如在1巴至80巴的范围内。由于存在高度气密的衬里层16,因此在高压环境下的转化可以执行而几乎没有或完全没有氧化鳍片10的风险,如上所述。
图10示出了介电材料18和衬里层16凹陷以在鳍片10之间的沟槽12中形成隔离结构(例如,STI)。在框522中,执行平坦化工艺,诸如化学机械平坦化(CMP),以将介电材料18和衬里层16的顶表面与鳍片10的外延层6的顶表面(未示出)平坦化。因此,平坦化工艺可以去除掩模部分8。在框524中,使介电材料18和衬里层16凹陷,如图10所示。可以执行一个或多个蚀刻工艺以使介电材料18和衬里层16凹陷,使得鳍片10从相邻隔离结构之间突出。隔离结构的顶表面(例如,介电材料18和衬里层16的顶表面)可以从鳍片10的顶表面凹陷到变化深度,并且图10的图示仅是示例。如上所述,衬里层16是气密的,使得鳍片10不被显著地氧化,这可以减小在介电材料18和衬里层16凹陷期间鳍片10的宽度损失。
鳍片10和在其之间的隔离结构之后可以用于形成任何合适的装置结构。例如,鳍片10可以用于形成FinFET。栅极结构可以形成在鳍片10上并纵向地垂直于鳍片10。栅极结构可以包括沿着鳍片的表面的栅极电介质(例如,高k栅极电介质)、在栅极电介质上的一个或多个功函数调谐层、以及在功函数调谐层上的金属填充物。栅极结构可以在位于栅极结构下方的相应鳍片10中限定沟道区域。可以在鳍片中在沟道区域的相对侧上形成源极/漏极区域(例如,外延源极/漏极区域)。栅极结构、沟道区域和源极/漏极区域一起可以形成FinFET。
在本文所述的示例中,可以形成在鳍片之间的隔离结构,其中在鳍片之间的尺寸减小。可以在鳍片之间形成厚度小的、高度共形的、气密的衬里层。衬里层可以减少鳍片的氧化,这可以减少鳍片的宽度损失并提高在后续处理中的灵活性。可以通过低温处理形成隔离结构,这可以减少鳍片的应力和弯折。另外,可以在不使用含氯气体的情况下形成衬里层,这可以减少安全性和环境问题。另外,衬里层的形成可以在单个处理系统100中执行,这准许基板2在不同腔室之间传送以进行不同处理,而无需将基板2暴露于在处理系统100(例如,制造设施环境)外部的大气周围环境。通过避免将基板暴露于这种大气周围环境,可以避免在不同处理之间进行清洁处理,诸如由于没有发生因暴露于这种大气周围环境而导致的氧化和污染。因此,本文所述的示例提供用于形成衬里层的集成解决方案。
尽管前述内容涉及本公开内容的各个示例,但是在不脱离本公开内容的基本范围的情况下,可以设想本公开内容的其他和进一步示例,并且本公开内容的范围由所附权利要求书确定。

Claims (20)

1.一种用于半导体处理的方法,所述方法包括:
在基板上形成鳍片;
在所述鳍片上和所述鳍片之间共形地形成衬里层,形成所述衬里层包括:
在所述鳍片上和所述鳍片之间共形地沉积预衬里层;和
使用等离子体处理使所述预衬里层致密化以形成所述衬里层;和
在所述衬里层上和所述鳍片之间形成介电材料。
2.如权利要求1所述的方法,其中:
形成所述衬里层在单个处理系统中执行;
共形地沉积所述预衬里层在所述单个处理系统的第一处理腔室中执行;
使所述预衬里层致密化在所述单个处理系统的第二处理腔室中执行;并且
所述基板通过所述单个处理系统的传送设备从所述第一处理腔室传送到所述第二处理腔室。
3.如权利要求2所述的方法,其中在不将所述基板暴露于大气周围环境的情况下将所述基板从所述第一处理腔室传送到所述第二处理腔室。
4.如权利要求2所述的方法,其中在所述传送设备中的具有小于或等于300Torr的压力的传送环境中来将所述基板从所述第一处理腔室传送到所述第二处理腔室,而不在所述传送期间去除所述传送环境。
5.如权利要求1所述的方法,其中形成所述衬里层不包括使用含氯气体。
6.如权利要求1所述的方法,其中形成所述介电材料包括:
使可流动材料流动;和
将所述可流动材料转换成所述介电材料,转换包括将所述可流动材料暴露于具有在1巴至80巴的范围内的压力的环境中。
7.如权利要求1所述的方法,其中所述预衬里层是硅层,并且所述衬里层是氮化硅。
8.如权利要求1所述的方法,进一步包括使所述介电材料和所述衬里层凹陷,其中在凹陷之后,所述鳍片突出于所述介电材料和所述衬里层的顶表面的上方。
9.一种半导体处理系统,包括:
传送设备;
第一处理腔室,所述第一处理腔室耦接到所述传送设备;
第二处理腔室,所述第二处理腔室耦接到所述传送设备;和
系统控制器,所述系统控制器被配置为:
控制在所述第一处理腔室中执行的沉积工艺,所述沉积工艺在基板上的鳍片上和鳍片之间共形地沉积预衬里层;
控制所述基板通过所述传送设备从所述第一处理腔室向所述第二处理腔室的传送;和
控制在所述第二处理腔室中执行的等离子体处理工艺,所述等离子体处理工艺使所述预衬里层致密化以形成衬里层。
10.如权利要求9所述的半导体处理系统,进一步包括第三处理腔室,所述第三处理腔室耦接到所述传送设备,其中所述系统控制器被配置为:
控制在所述第三处理腔室中执行的清洁工艺,所述清洁工艺清洁所述基板;和
控制所述基板通过所述传送设备从所述第三处理腔室向所述第一处理腔室的传送。
11.如权利要求9所述的半导体处理系统,其中所述系统控制器被配置为通过真空环境使所述基板从所述第一处理腔室传送到所述第二处理腔室。
12.如权利要求9所述的半导体处理系统,其中所述系统控制器被配置为在所述基板从所述第一处理腔室传送到所述第二处理腔室期间维持所述传送设备中的压力小于或等于300Torr。
13.如权利要求9所述的半导体处理系统,其中所述沉积工艺和所述等离子体处理工艺不包括使用含氯气体。
14.如权利要求9所述的半导体处理系统,其中:
所述沉积工艺包括使含硅前驱物气体流动,所述预衬里层是硅层;并且
所述等离子体处理工艺包括使含氮气体流动,所述衬里层是氮化硅层。
15.一种半导体处理系统,包括:
非暂时性计算机可读介质,所述非暂时性计算机可读介质存储指令,所述指令在由处理器执行时致使计算机系统执行以下操作:
控制处理系统的第一处理腔室中的沉积工艺,所述沉积工艺在基板上的鳍片上和鳍片之间共形地沉积预衬里层;
控制所述基板通过所述处理系统的传送设备从所述处理系统的所述第一处理腔室向第二处理腔室的传送,所述第一处理腔室和所述第二处理腔室耦接到所述传送设备;和
控制在所述第二处理腔室中的等离子体处理工艺,所述等离子体处理工艺使所述预衬里层致密化以形成衬里层。
16.如权利要求15所述的半导体处理系统,其中控制所述基板从所述第一处理腔室向所述第二处理腔室的所述传送在不将所述基板暴露于在所述处理系统外部的周围环境的情况下执行。
17.如权利要求15所述的半导体处理系统,其中控制所述基板从所述第一处理腔室向所述第二处理腔室的所述传送包括控制在所述传送设备中在具有小于或等于300Torr的压力的传送环境中所述基板的所述传送。
18.如权利要求15所述的半导体处理系统,其中所述指令在由所述处理器执行时不使所述计算机系统在所述沉积工艺之后和所述等离子体处理工艺之前实施清洁工艺。
19.如权利要求15所述的半导体处理系统,其中所述沉积工艺和所述等离子体处理工艺不包括使用含氯气体。
20.如权利要求15所述的半导体处理系统,其中:
所述沉积工艺包括使含硅前驱物气体流动,所述预衬里层是硅层;并且
所述等离子体处理工艺包括使含氮气体流动,所述衬里层是氮化硅层。
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