CN111180337A - One-way surge protection device and manufacturing method - Google Patents
One-way surge protection device and manufacturing method Download PDFInfo
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- CN111180337A CN111180337A CN201911402740.7A CN201911402740A CN111180337A CN 111180337 A CN111180337 A CN 111180337A CN 201911402740 A CN201911402740 A CN 201911402740A CN 111180337 A CN111180337 A CN 111180337A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
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Abstract
The invention provides a unidirectional surge protection device and a manufacturing method thereof, belonging to the technical field of power devices and comprising the following steps: a first conductivity type substrate layer; the epitaxial layer comprises a first conductive type epitaxial layer, wherein a first conductive type first doping region and a second conductive type second doping region are formed on the upper surface of the epitaxial layer, and the first doping region is arranged around the second doping region; the protective layer grows on the upper surface of the epitaxial layer, a first contact hole and a second contact hole are formed in the protective layer, a first metal layer is formed on the upper surface of the protective layer and in the contact hole, and the first metal layer is in short circuit with the first doped region and the second doped region; the beneficial effects are that: by introducing the deep groove isolation process, the IPP is greatly increased on one hand, and on the other hand, the deep groove isolation can realize the introduction of an n-p-n punch-through structure in the device, so that the device has negative resistance characteristic, thereby obtaining lower clamping voltage VCThe value is high, and meanwhile, a p-n junction can be independently introduced into the central area, so that the requirement of a unidirectional device is met.
Description
Technical Field
The invention relates to the technical field of power devices, in particular to a unidirectional surge protection device and a manufacturing method thereof.
Background
A TVS (Transient Voltage Suppressor), which is a diode for absorbing a surge and protecting a system from a Transient overvoltage, plays an important role in circuit protection.
With the development of science and technology, the capacity of a lithium battery of a smart phone is also larger and larger, and a consumer wants to fill the battery in the shortest time to meet the living and working demands, so that the quick-charging technology is favored by the consumer. At present, the output voltage of the mobile phone quick charging adapter has the specifications of 5V, 9V, 12V, even 20V and the like, and the output current has the specifications of 2A, 2.5A and the like. In the face of a high-voltage and high-current charging mode, transient burr voltage or surge voltage generated in a circuit system can greatly threaten an IC circuit, sometimes the surge voltage can even reach high voltage above 300V, and the IC circuit can be damaged in an unrecoverable manner under the transient surge impact. Meanwhile, the demands of consumers on the appearance of the mobile phone are continuously developing towards being thinner and more portable, which means that the integration level of the mobile phone chip is higher and higher, and the related components must be miniaturized.
In the prior art, a conventional unidirectional 4.8V TVS device has a cross-sectional structure as shown in fig. 1, in which a p-type impurity is directly doped on N-epi to form a p-N junction, and then metal is deposited on the front and back sides to form a TVS device. The TVS has a simple structure, the I-V characteristic curve of the TVS is shown in figure 2, the transient surge current IPP is low, and the clamping voltage V is highCHigher, therefore, the circuit protection requirement of the current quick-charging IC can not be met. And if the IPP is to be raised, the V is loweredCTherefore, the chip area is increased, and the corresponding package size is increased, which cannot meet the practical application requirements. Therefore, the high surge protection for the fast charging electronic equipment and the miniaturization of the related protection components are an urgent problem to be solvedTo give a title.
Disclosure of Invention
According to the defects in the prior art, the protection device and the manufacturing method thereof are provided, the protection device greatly increases IPP (inter-layer protection) by introducing a deep groove isolation process, and the deep groove isolation can realize the introduction of an n-p-n through structure in the device, so that the device has negative resistance characteristics to obtain lower clamping voltage VCThe value is high, and meanwhile, a p-n junction can be independently introduced into the central area, so that the requirement of a unidirectional device is met.
The technical scheme specifically comprises the following steps:
a method of making a unidirectional surge protection device, comprising:
step S1, providing a first conductive type substrate;
step S2, growing a first conductivity type epitaxial layer on the substrate;
step S3, forming an oxide layer on the epitaxial layer;
step S4, coating photoresist on the oxide layer, and forming a first window through a photoetching process;
step S5, performing ion implantation on the epitaxial layer through a first window to form a first doped region of a first conductivity type;
step S6, removing and recoating the photoresist, and forming a second window through a photoetching process;
step S7, performing ion implantation on the epitaxial layer through a second window to form a second doped region of a second conductivity type;
step S8, removing and recoating the photoresist, and defining the position of the isolation groove through the photoetching process;
step S9, etching the oxide layer through a dry etching process to expose the epitaxial layer corresponding to the isolation trench;
step S10, removing the photoresist, and etching the epitaxial layer by using the oxide layer as a hard mask to form the isolation groove, wherein the isolation groove comprises a first isolation groove and a second isolation groove, the first isolation groove is arranged around the first doped region, and the second isolation groove is arranged between the first doped region and the second doped region and is arranged around the second doped region.
Step S11, removing the oxide layer, depositing TEOS on the top layer of the epitaxial layer, and filling the isolation groove with TEOS;
step S12, defining the positions of the first contact hole and the second contact hole through a photoetching process, and removing TEOS in the first contact hole and the second contact hole through a wet etching process to expose the first doped region and the second doped region;
and step S13, depositing a metal layer on the surface of the surge protection device, and thinning the metal layer on the back of the surge protection device.
Preferably, the first isolation trench penetrates through the substrate layer and the epitaxial layer.
Preferably, the second isolation trench penetrates through the substrate layer and the epitaxial layer.
Preferably, the first doped region is heavily doped with the first conductivity type.
Preferably, the second doped region is heavily doped with the second conductive type.
Preferably, wherein the epitaxial layer is lightly doped.
Preferably, wherein the substrate layer is lightly doped.
A unidirectional surge protection device comprising:
a first conductivity type substrate layer;
the epitaxial layer of the first conductivity type grows on the upper surface of the substrate layer, a first doping region of the first conductivity type and a second doping region of the second conductivity type are formed on the upper surface of the epitaxial layer, and the first doping region is arranged around the second doping region;
the protective layer grows on the upper surface of the epitaxial layer, a first contact hole and a second contact hole are formed in the protective layer, the first contact hole is used for exposing the first doping area, and the second contact hole is used for exposing the second doping area;
a first metal layer is formed on the upper surface of the protective layer and in the contact hole, and the first metal layer is in short circuit with the first doped region and the second doped region;
and a second metal layer is formed on the lower surface of the first conductive type substrate layer.
Preferably, the method further comprises the following steps:
the isolation groove penetrates through the substrate layer and the epitaxial layer, the isolation groove comprises a first isolation groove and a second isolation groove, the first isolation groove surrounds the first doping area, and the second isolation groove is arranged between the first doping area and the second doping area and surrounds the second doping area.
Preferably, wherein, the isolation trench is filled with TEOS.
The beneficial effects of the above technical scheme are that:
the protection device greatly increases IPP (inter-layer protection) by introducing a deep groove isolation process, and can realize the introduction of an n-p-n punch-through structure in the device by deep groove isolation so that the device has negative resistance characteristic to obtain lower clamping voltage VCThe value is high, and meanwhile, a p-n junction can be independently introduced into the central area, so that the requirement of a unidirectional device is met.
Drawings
FIG. 1 is a schematic cross-sectional view of a conventional unidirectional 4.8V TVS device;
FIG. 2 is an I-V characteristic curve of a conventional unidirectional 4.8V TVS device;
fig. 3-10 are schematic structural diagrams of a method for manufacturing a unidirectional surge protection device in steps according to a preferred embodiment of the present invention;
fig. 11 is an I-V characteristic of a unidirectional surge protection device in accordance with a preferred embodiment of the present invention;
fig. 12 is a surge diagram of a conventional unidirectional 4.8V TVS device;
fig. 13 is a surge diagram of a unidirectional surge protection device in accordance with a preferred embodiment of the present invention;
the reference numerals in the specification denote descriptions:
the epitaxial structure comprises a substrate (10), an epitaxial layer (20), a first doping region (30), a second doping region (40), a protective layer (50), an isolation groove (60), a first metal layer (70), a second metal layer (80), an oxidation layer (90) and photoresist (100).
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
A method of manufacturing a unidirectional surge protection device, as shown in fig. 3-9, comprising:
step S1, providing a first conductive type substrate 10;
step S2, growing a first conductive type epitaxial layer 20 on the substrate 10;
step S3, forming an oxide layer 90 on the epitaxial layer 20;
specifically, in the present embodiment, a layer with a thickness of
Oxide layer 90.
Step S4, coating a photoresist 100 on the oxide layer 90, and forming a first window through a photolithography process;
specifically, in this embodiment, a layer of photoresist 100 is coated on the oxide layer 90 in advance, and then the photoresist 100 is subjected to photolithography by using a photolithography mask to realize pattern transfer of the first window, form a corresponding photomask, and define a window region of the first doped region 30.
Step S5, performing ion implantation on the epitaxial layer 20 through the first window to form a first doped region 30 of the first conductivity type;
specifically, in the present embodiment, corresponding ions are implanted into the window region corresponding to the first doped region 30, for example, when the first doped region 30 is of N + conductivity type, the window 10 corresponding to the first doped region 30 is implanted14cm-3As ions with a concentration are removed from the photoresist 100 remaining As a mask, and then the first doped region 30 is formed by an annealing process at 1100 ℃.
Step S6, removing and recoating the photoresist 100, and forming a second window through a photolithography process;
specifically, in this embodiment, a layer of photoresist 100 is coated on the upper surface of the oxide layer 90 again, and then a pattern of the second window is transferred through another photo-etching mask, and the second window is defined after exposure and development.
Step S7, performing ion implantation on the epitaxial layer 20 through the second window to form a second doped region 40 of the second conductivity type;
specifically, in the present embodiment, ions with a predetermined concentration are implanted into the second window to form the second doped region 40, for example, when the second doped region 40 is of P + conductive type, the second window 10 corresponding to the second doped region 40 is implanted16cm-3The second doped region 40 is formed by a 1050 deg.c annealing process after removing the photoresist 100 remaining as a mask after boron ions of a concentration.
Step S8, removing and recoating the photoresist 100, and defining the position of the isolation trench 60 by a photolithography process;
step S9, etching the oxide layer 90 by a dry etching process to expose the epitaxial layer 20 at a position corresponding to the isolation trench 60;
specifically, in this embodiment, a layer is grown on the surface of the wafer in advance
The oxide layer 90 is formed by defining deep trench isolation trenches by photolithography60 and then dry etching the oxide layer 90 to expose the epitaxial layer 20 corresponding to the isolation trenches 60.
Step S10, removing the photoresist 100, and etching the epitaxial layer 20 with the oxide layer 90 as a hard mask to form an isolation trench 60, where the isolation trench 60 includes a first isolation trench 60 and a second isolation trench 60, the first isolation trench 60 is disposed around the first doped region 30, and the second isolation trench 60 is disposed between the first doped region 30 and the second doped region 40 and is disposed around the second doped region 40.
Specifically, in this embodiment, the oxide layer 90 left after removing the photoresist 100 on the device surface is used as a hard mask for etching the isolation trench 60, and then the epitaxial layer 20 is dry etched to form the first isolation trench 60 and the second isolation trench 60 with a depth of 18um, so that the first doped region 30 is isolated from the second doped region 40 by the first isolation trench 60 and the second isolation trench 60.
Step S11, removing the oxide layer 90, and depositing TEOS on the top layer of the epitaxial layer 20 to fill the isolation trench 60 with TEOS;
specifically, in the present embodiment, TEOS is deposited on the upper surface of the epitaxial layer 20, and the first isolation trenches 60 and the second isolation trenches 60 are filled with TEOS, so that the surge resistance of the protection device is enhanced while a good isolation effect is ensured.
Step S12, defining the positions of the first contact hole and the second contact hole through a photolithography process, and removing TEOS in the first contact hole and the second contact hole through a wet etching process to expose the first doped region 30 and the second doped region 40;
specifically, in this embodiment, the pattern transfer of the first contact hole and the second contact hole is continuously realized through a photolithography mask, and then the wet etching process is used to remove the protective layer 50 in the first contact hole and the second contact hole, in a specific embodiment, the protective layer 50 is TEOS; the first doped region 30 and the second doped region 40 are exposed after the protective layer 50 is removed.
And step S13, depositing a metal layer on the surface of the surge protection device, and thinning the metal layer on the back of the surge protection device.
Specifically, in this embodiment, the first metal layer 70 and the second metal layer 80 are deposited on the front surface and the back surface of the chip by sputtering, and finally the second metal layer 80 is thinned by thinning and evaporation processes, so as to form the unidirectional surge protection device.
As a preferred embodiment, the unidirectional surge protection device disclosed by the invention not only greatly increases IPP by introducing a deep groove isolation process, but also can realize the introduction of an n-p-n punch-through structure into the protection device by the isolation groove 60, so that the protection device has negative resistance characteristic to obtain lower clamping voltage VCMeanwhile, the unidirectional surge protection device independently introduces a p-n junction in the central area, and the requirement of the unidirectional surge protection device is met. As shown in fig. 10, is a graph of the I-V characteristics of the unidirectional surge protection device.
In the preferred embodiment of the present invention, the first isolation trench 60 penetrates the substrate 10 layer and the epitaxial layer 20.
In the preferred embodiment of the present invention, the second isolation trench 60 penetrates the substrate 10 layer and the epitaxial layer 20.
In the preferred embodiment of the present invention, the first doped region 30 is heavily doped with the first conductivity type.
In the preferred embodiment of the present invention, the second doped region 40 is heavily doped with the second conductive type.
In the preferred embodiment of the present invention, the epitaxial layer 20 is lightly doped.
In the preferred embodiment of the present invention, the substrate 10 layer is lightly doped.
A unidirectional surge protection device, as shown in fig. 9, comprising:
a first conductivity type substrate 10 layer;
a first conductive epitaxial layer 20 grown on the upper surface of the substrate 10, the upper surface of the epitaxial layer 20 being formed with a first conductive first doped region 30 and a second conductive second doped region 40, the first doped region 30 surrounding the second doped region 40;
a protective layer 50 grown on the upper surface of the epitaxial layer 20, the protective layer 50 having a first contact hole and a second contact hole, the first contact hole exposing the first doped region 30, the second contact hole exposing the second doped region 40;
a first metal layer 70 is formed on the upper surface of the protective layer 50 and in the contact hole, and the first metal layer 70 short-circuits the first doped region 30 and the second doped region 40;
the lower surface of the first conductive type substrate 10 layer is formed with a second metal layer 80.
In a preferred embodiment of the present invention, the unidirectional surge protection device further comprises:
the isolation trench 60, the isolation trench 60 penetrates the substrate 10 layer and the epitaxial layer 20, the isolation trench 60 includes a first isolation trench 60 and a second isolation trench 60, the first isolation trench 60 is disposed around the first doped region 30, and the second isolation trench 60 is disposed between the first doped region 30 and the second doped region 40 and disposed around the second doped region 40.
In the preferred embodiment of the present invention, the isolation trench 60 is filled with TEOS.
In an embodiment of the present invention, for a chip with the same area, the performance of a conventional unidirectional 4.8V TVS device is compared with that of the unidirectional surge protection device in the present invention, as shown in fig. 11-12, fig. 11 is a surge diagram of the conventional unidirectional 4.8V TVS device, fig. 12 is a surge diagram of the unidirectional surge protection device disclosed in the present invention, and the comparison data is as follows:
from the above data, it can be seen that the IPP capability of the disclosed unidirectional surge protection device can be as high as 206A, which is 86A higher than that of the conventional TVS device, which has an IPP of only 120A, and a clamping voltage VCThe product has low cost, has outstanding advantages in the similar products in the market, and has wide application range.
In conclusion, the unidirectional surge protection device disclosed by the invention greatly increases the IPP capability of the TVS by introducing the deep groove isolation technology and the n-p-n punch-through structure, and effectively reduces the clamping voltage VCThe problems of high surge and low residual voltage of small and medium-sized components in practical application are solved, and VBAT protection of fast-charging electronic products is providedA very practical device structure and method.
The beneficial effects of the above technical scheme are that:
the protection device greatly increases IPP (inter-layer protection) by introducing a deep groove isolation process, and can realize the introduction of an n-p-n punch-through structure in the device by deep groove isolation so that the device has negative resistance characteristic to obtain lower clamping voltage VCThe value is high, and meanwhile, a p-n junction can be independently introduced into the central area, so that the requirement of a unidirectional device is met.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (10)
1. A method of making a unidirectional surge protection device, comprising:
step S1, providing a first conductive type substrate;
step S2, growing a first conductivity type epitaxial layer on the substrate;
step S3, forming an oxide layer on the epitaxial layer;
step S4, coating photoresist on the oxide layer, and forming a first window through a photoetching process;
step S5, performing ion implantation on the epitaxial layer through a first window to form a first doped region of a first conductivity type;
step S6, removing and recoating the photoresist, and forming a second window through a photoetching process;
step S7, performing ion implantation on the epitaxial layer through a second window to form a second doped region of a second conductivity type;
step S8, removing and recoating the photoresist, and defining the position of the isolation groove through the photoetching process;
step S9, etching the oxide layer through a dry etching process to expose the epitaxial layer corresponding to the isolation trench;
step S10, removing the photoresist, and etching the epitaxial layer by using the oxide layer as a hard mask to form the isolation groove, wherein the isolation groove comprises a first isolation groove and a second isolation groove, the first isolation groove is arranged around the first doped region, and the second isolation groove is arranged between the first doped region and the second doped region and is arranged around the second doped region.
Step S11, removing the oxide layer, depositing TEOS on the top layer of the epitaxial layer, and filling the isolation groove with TEOS;
step S12, defining the positions of the first contact hole and the second contact hole through a photoetching process, and removing TEOS in the first contact hole and the second contact hole through a wet etching process to expose the first doped region and the second doped region;
and step S13, depositing a metal layer on the surface of the surge protection device, and thinning the metal layer on the back of the surge protection device.
2. A method of manufacturing a unidirectional surge protection device according to claim 1, wherein the first isolation trench extends through the substrate layer and the epitaxial layer.
3. A method of manufacturing a unidirectional surge protection device according to claim 1, wherein the second isolation trench extends through the substrate layer and the epitaxial layer.
4. A method of fabricating a unidirectional surge protection device according to claim 1, wherein said first doped region is heavily doped of the first conductivity type.
5. A method of making a unidirectional surge protection device according to claim 1, wherein said second doped region is heavily doped of a second wire type.
6. A method of fabricating a unidirectional surge protection device according to claim 1, wherein said epitaxial layer is lightly doped.
7. A method of manufacturing a unidirectional surge protection device according to claim 1, wherein the substrate layer is lightly doped.
8. A unidirectional surge protection device, comprising:
a first conductivity type substrate layer;
the epitaxial layer of the first conductivity type grows on the upper surface of the substrate layer, a first doping region of the first conductivity type and a second doping region of the second conductivity type are formed on the upper surface of the epitaxial layer, and the first doping region is arranged around the second doping region;
the protective layer grows on the upper surface of the epitaxial layer, a first contact hole and a second contact hole are formed in the protective layer, the first contact hole is used for exposing the first doping area, and the second contact hole is used for exposing the second doping area;
a first metal layer is formed on the upper surface of the protective layer and in the contact hole, and the first metal layer is in short circuit with the first doped region and the second doped region;
and a second metal layer is formed on the lower surface of the first conductive type substrate layer.
9. A unidirectional surge protection device according to claim 8, further comprising:
the isolation groove penetrates through the substrate layer and the epitaxial layer, the isolation groove comprises a first isolation groove and a second isolation groove, the first isolation groove surrounds the first doping area, and the second isolation groove is arranged between the first doping area and the second doping area and surrounds the second doping area.
10. A unidirectional surge protection device according to claim 8, wherein said isolation trenches are filled with TEOS.
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| CN201911402740.7A CN111180337A (en) | 2019-12-30 | 2019-12-30 | One-way surge protection device and manufacturing method |
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| CN113555415A (en) * | 2021-08-20 | 2021-10-26 | 上海芯导电子科技股份有限公司 | Bidirectional TVS device, manufacturing method thereof and electronic equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113555415A (en) * | 2021-08-20 | 2021-10-26 | 上海芯导电子科技股份有限公司 | Bidirectional TVS device, manufacturing method thereof and electronic equipment |
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