CN111164583B - 可配置的硬件的运行时间优化 - Google Patents

可配置的硬件的运行时间优化 Download PDF

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CN111164583B
CN111164583B CN201880063952.4A CN201880063952A CN111164583B CN 111164583 B CN111164583 B CN 111164583B CN 201880063952 A CN201880063952 A CN 201880063952A CN 111164583 B CN111164583 B CN 111164583B
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CN111164583A (zh
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埃拉德·拉茲
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Nexicom Co ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5072—Grid computing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Advance Control (AREA)
  • Stored Programmes (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
CN201880063952.4A 2017-08-03 2018-08-02 可配置的硬件的运行时间优化 Active CN111164583B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201762540849P 2017-08-03 2017-08-03
US62/540,849 2017-08-03
US201762558090P 2017-09-13 2017-09-13
US62/558,090 2017-09-13
PCT/US2018/045008 WO2019028253A1 (en) 2017-08-03 2018-08-02 EXECUTION OPTIMIZATION OF CONFIGURABLE EQUIPMENT

Publications (2)

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CN111164583A CN111164583A (zh) 2020-05-15
CN111164583B true CN111164583B (zh) 2024-02-27

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US (1) US10817309B2 (enExample)
EP (1) EP3662384A4 (enExample)
JP (1) JP7245833B2 (enExample)
KR (1) KR102668340B1 (enExample)
CN (1) CN111164583B (enExample)
SG (1) SG11202000752RA (enExample)
WO (1) WO2019028253A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102668340B1 (ko) 2017-08-03 2024-05-22 넥스트 실리콘 리미티드 설정가능한 하드웨어 런타임 최적화
WO2019055675A1 (en) 2017-09-13 2019-03-21 Next Silicon, Ltd. DATA ARCHITECTURE WITH DIRECTED AND INTERCONNECTED GRID
CN110704360B (zh) * 2019-09-29 2022-03-18 华中科技大学 一种基于异构fpga数据流的图计算优化方法
WO2021138189A1 (en) * 2019-12-30 2021-07-08 Star Ally International Limited Processor for configurable parallel computations
US11269526B2 (en) 2020-04-23 2022-03-08 Next Silicon Ltd Interconnected memory grid with bypassable units
US11175957B1 (en) * 2020-09-22 2021-11-16 International Business Machines Corporation Hardware accelerator for executing a computation task
US12333231B1 (en) 2024-11-03 2025-06-17 Next Silicon Ltd. Reconfigurable integrated circuit (IC) device and a system and method of configuring thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103562870A (zh) * 2011-05-11 2014-02-05 超威半导体公司 异构核心的自动加载平衡
CN104238995A (zh) * 2013-06-21 2014-12-24 中国人民解放军信息工程大学 一种非线性反馈移位寄存器

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5321806A (en) 1991-08-21 1994-06-14 Digital Equipment Corporation Method and apparatus for transmitting graphics command in a computer graphics system
US5367653A (en) 1991-12-26 1994-11-22 International Business Machines Corporation Reconfigurable multi-way associative cache memory
US5933642A (en) * 1995-04-17 1999-08-03 Ricoh Corporation Compiling system and method for reconfigurable computing
EP1116107B1 (de) 1998-09-30 2003-03-26 Infineon Technologies AG Verfahren zur ausführung einzelner algorithmen mittels einer rekonfigurierbaren schaltung und vorrichtung zur durchführung eines solchen verfahrens
US6732126B1 (en) 1999-05-07 2004-05-04 Intel Corporation High performance datapath unit for behavioral data transmission and reception
US6347346B1 (en) 1999-06-30 2002-02-12 Chameleon Systems, Inc. Local memory unit system with global access for use on reconfigurable chips
US6871341B1 (en) * 2000-03-24 2005-03-22 Intel Corporation Adaptive scheduling of function cells in dynamic reconfigurable logic
US20030056091A1 (en) 2001-09-14 2003-03-20 Greenberg Craig B. Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations
US7269174B2 (en) 2003-03-28 2007-09-11 Modular Mining Systems, Inc. Dynamic wireless network
US7957266B2 (en) 2004-05-28 2011-06-07 Alcatel-Lucent Usa Inc. Efficient and robust routing independent of traffic pattern variability
US7536370B2 (en) 2004-06-24 2009-05-19 Sun Microsystems, Inc. Inferential diagnosing engines for grid-based computing systems
US20120001371A1 (en) 2004-07-10 2012-01-05 Mann+Hummel Gmbh Method for Producing a Ceramic Filter Element
US7877350B2 (en) 2005-06-27 2011-01-25 Ab Initio Technology Llc Managing metadata for graph-based computations
EP1808774A1 (en) 2005-12-22 2007-07-18 St Microelectronics S.A. A hierarchical reconfigurable computer architecture
US7904848B2 (en) 2006-03-14 2011-03-08 Imec System and method for runtime placement and routing of a processing array
JP4998806B2 (ja) 2006-08-31 2012-08-15 富士ゼロックス株式会社 再構成可能なデバイスに回路デザインを実装するための方法およびシステム
US8156307B2 (en) 2007-08-20 2012-04-10 Convey Computer Multi-processor system having at least one processor that comprises a dynamically reconfigurable instruction set
JP2009163328A (ja) 2007-12-28 2009-07-23 Toshiba Corp 情報処理装置及びその制御方法
EP2104047A1 (en) 2008-03-19 2009-09-23 Panasonic Corporation Router-aided post-placement and routing retiming
US20110213950A1 (en) 2008-06-11 2011-09-01 John George Mathieson System and Method for Power Optimization
JP5294304B2 (ja) 2008-06-18 2013-09-18 日本電気株式会社 再構成可能電子回路装置
US20110099562A1 (en) 2008-07-01 2011-04-28 Morphing Machines Pvt Ltd Method and System on Chip (SoC) for Adapting a Reconfigurable Hardware for an Application at Runtime
US8554074B2 (en) 2009-05-06 2013-10-08 Ciena Corporation Colorless, directionless, and gridless optical network, node, and method
US8230176B2 (en) 2009-06-26 2012-07-24 International Business Machines Corporation Reconfigurable cache
KR101076869B1 (ko) 2010-03-16 2011-10-25 광운대학교 산학협력단 코어스 그레인 재구성 어레이에서의 메모리 중심 통신 장치
US8880866B2 (en) * 2010-10-15 2014-11-04 Coherent Logix, Incorporated Method and system for disabling communication paths in a multiprocessor fabric by setting register values to disable the communication paths specified by a configuration
US8621151B2 (en) 2010-11-23 2013-12-31 IP Cube Partners (IPC) Co., Ltd. Active memory processor system
US8504778B2 (en) 2010-11-24 2013-08-06 IP Cube Partners (ICP) Co., Ltd. Multi-core active memory processor system
US8589628B2 (en) 2010-11-29 2013-11-19 IP Cube Partners (ICP) Co., Ltd. Hybrid active memory processor system
US20120284501A1 (en) 2011-05-06 2012-11-08 Xcelemor, Inc. Computing system with hardware reconfiguration mechanism and method of operation thereof
US9024655B2 (en) 2012-02-21 2015-05-05 Wave Semiconductor, Inc. Multi-threshold flash NCL circuitry
US8767501B2 (en) 2012-07-17 2014-07-01 International Business Machines Corporation Self-reconfigurable address decoder for associative index extended caches
US9563401B2 (en) 2012-12-07 2017-02-07 Wave Computing, Inc. Extensible iterative multiplier
US9588773B2 (en) 2013-01-07 2017-03-07 Wave Computing, Inc. Software based application specific integrated circuit
US9590629B2 (en) 2013-11-02 2017-03-07 Wave Computing, Inc. Logical elements with switchable connections
US10057135B2 (en) * 2013-12-02 2018-08-21 Ciena Corporation Unified management of computing networks
US9460012B2 (en) 2014-02-18 2016-10-04 National University Of Singapore Fusible and reconfigurable cache architecture
US20150268963A1 (en) 2014-03-23 2015-09-24 Technion Research & Development Foundation Ltd. Execution of data-parallel programs on coarse-grained reconfigurable architecture hardware
US9553818B2 (en) 2014-06-27 2017-01-24 Adtran, Inc. Link biased data transmission
GB201415796D0 (en) 2014-09-07 2014-10-22 Technion Res & Dev Foundation Logical-to-physical block mapping inside the disk controller: accessing data objects without operating system intervention
US9946832B2 (en) 2014-11-13 2018-04-17 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Optimized placement design of network and infrastructure components
US9692419B2 (en) 2014-11-15 2017-06-27 Wave Computing, Inc. Compact logic evaluation gates using null convention
US11144283B2 (en) 2015-05-20 2021-10-12 Ab Initio Technology Llc Visual program specification and compilation of graph-based computation
JP6616420B2 (ja) 2015-08-20 2019-12-04 株式会社日立製作所 情報処理装置
US10503524B2 (en) * 2016-03-22 2019-12-10 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Interception of a function call, selecting a function from available functions and rerouting the function call
US10884761B2 (en) * 2016-03-22 2021-01-05 Lenovo Enterprise Solutions (Singapore) Pte. Ltd Best performance delivery in heterogeneous computing unit environment
US10416999B2 (en) 2016-12-30 2019-09-17 Intel Corporation Processors, methods, and systems with a configurable spatial accelerator
US10445451B2 (en) 2017-07-01 2019-10-15 Intel Corporation Processors, methods, and systems for a configurable spatial accelerator with performance, correctness, and power reduction features
US10515046B2 (en) 2017-07-01 2019-12-24 Intel Corporation Processors, methods, and systems with a configurable spatial accelerator
US10467183B2 (en) 2017-07-01 2019-11-05 Intel Corporation Processors and methods for pipelined runtime services in a spatial array
US10469397B2 (en) 2017-07-01 2019-11-05 Intel Corporation Processors and methods with configurable network-based dataflow operator circuits
KR102668340B1 (ko) 2017-08-03 2024-05-22 넥스트 실리콘 리미티드 설정가능한 하드웨어 런타임 최적화
WO2019055675A1 (en) 2017-09-13 2019-03-21 Next Silicon, Ltd. DATA ARCHITECTURE WITH DIRECTED AND INTERCONNECTED GRID

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103562870A (zh) * 2011-05-11 2014-02-05 超威半导体公司 异构核心的自动加载平衡
CN104238995A (zh) * 2013-06-21 2014-12-24 中国人民解放军信息工程大学 一种非线性反馈移位寄存器

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SG11202000752RA (en) 2020-02-27
KR102668340B1 (ko) 2024-05-22
JP7245833B2 (ja) 2023-03-24
EP3662384A4 (en) 2021-05-05
US20190042282A1 (en) 2019-02-07
EP3662384A1 (en) 2020-06-10
US10817309B2 (en) 2020-10-27
KR20200052277A (ko) 2020-05-14
WO2019028253A1 (en) 2019-02-07
JP2020530175A (ja) 2020-10-15
CN111164583A (zh) 2020-05-15

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