CN111107623A - System clock synchronization method - Google Patents
System clock synchronization method Download PDFInfo
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- CN111107623A CN111107623A CN201911259951.XA CN201911259951A CN111107623A CN 111107623 A CN111107623 A CN 111107623A CN 201911259951 A CN201911259951 A CN 201911259951A CN 111107623 A CN111107623 A CN 111107623A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/001—Synchronization between nodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/001—Synchronization between nodes
- H04W56/0015—Synchronization between nodes one node acting as a reference for the others
Abstract
The invention discloses a system clock synchronization method, which is used for clock synchronization between non-reference member equipment and reference member equipment in a system and comprises the following steps: the non-reference member device sends a query message to the reference member device at its assigned query time point t 1; after receiving the inquiry message at the time point t2, the reference member device transmits a response message to the non-reference member device at a response time point t3 assigned thereto; the non-reference member device receives the reply message at time point t 4; calculating a first time error according to the time point t1, the time point t2, the time point t3 and the time point t 4; and performing first timing on the non-reference member device according to the first time error so as to realize clock synchronization between the non-reference member device and the reference member device. The invention realizes the accurate synchronization of the clocks among the members in the system network by correcting the time errors of the non-reference member device and the reference member device twice.
Description
Technical Field
The invention relates to the technical field of radio digital communication, in particular to a system clock synchronization method.
Background
In a modern communication system, in a Time Division Multiple Access (TDMA) working mode system adopted for improving system communication and managing time efficiency, all members use a specific member in the system as time reference equipment to time other members or as a time calibration reference to unify the time base points of the system members to work. The system member clock will drift with time, when the clock drift exceeds a certain range, the clock synchronization can not be realized, the system member will be off-line and can not work synchronously, and the whole system will finally be paralyzed. Therefore, for a TDMA communication system which works in a TDMA working mode, particularly in a networking mode, how to perform time calibration on system members is particularly important to ensure that system member clocks are accurately synchronized with system time reference clocks.
Disclosure of Invention
The invention mainly solves the technical problem of how to realize the clock synchronization among all member devices in the system with high precision.
The invention provides a system clock synchronization method, which is used for clock synchronization between non-reference member equipment and reference member equipment in a system and comprises the following steps:
the non-reference member device sends a query message to the reference member device at its assigned query time point t 1;
after receiving the inquiry message at the time point t2, the reference member device transmits a response message to the non-reference member device at a response time point t3 assigned thereto;
the non-reference member device receives the reply message at time point t 4;
calculating a first time error Δ t1 according to the time point t1, the time point t2, the time point t3 and the time point t 4;
and performing first timing on the non-reference member device according to the first time error delta t1 to realize clock synchronization between the non-reference member device and the reference member device.
Further, the first time error Δ t1 is calculated by the equation one:
where, T1 is T2, T2 is T4-T1, and Td is the interval between sending the query message and sending the response message.
Further, still include:
constructing a timing model according to the time error delta T and a preset timing period T1;
obtaining a second time error delta t2 according to the timing model;
a second comparison is made to the non-reference member device after the first timing end time T2 based on the second time error at 2.
Further, the timing model is as follows:
Δ T2 ═ kt + T equation two
Where T is a first timing cycle of the non-reference member device, k is a clock drift per unit time, and T is a delay time.
Further, the first timing period is 200-300 ms.
Further, the delay time T is the sum of the delay time of the system transmitting channel, the delay time of the receiving channel and the delay time of the pseudo code synchronization pulse.
Further, the time T2 is less than the first timing period of the non-reference member device.
Compared with the prior art, the invention has the beneficial effects that:
in the system time correction time, active time correction is not carried out, clock drift errors of the non-reference member devices are pre-corrected in advance according to a certain rule, and the time errors of the non-reference member devices and the reference member devices are corrected twice, so that the accurate synchronization of clocks among members in a system network is realized.
Drawings
FIG. 1 is a flow chart of a method of system clock synchronization;
FIG. 2 is a schematic diagram of system clock synchronization according to an embodiment;
FIG. 3 is a block diagram of a process for measuring the delay time of a transmit channel according to an embodiment;
FIG. 4 is a block diagram of a process for measuring the delay time of a receive channel according to one embodiment;
fig. 5 is a flowchart of measuring the delay time of the pseudo code sync pulse according to an embodiment.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
The first embodiment is as follows:
referring to fig. 1, the present embodiment provides a system clock synchronization method for clock synchronization between a non-reference member device and a reference member device in a system, including:
104, calculating a first time error delta t1 according to the time point t1, the time point t2, the time point t3 and the time point t 4;
and 105, performing first timing on the non-reference member device according to the first time error delta t1 to realize clock synchronization between the non-reference member device and the reference member device.
As can be seen from fig. 2, there is a first time error Δ t1 between the non-reference member device and the reference member device, which is obtained by the way that the non-reference member device sends the inquiry message and the reference member device sends the response message after receiving the inquiry message.
The first time error Δ t1 is calculated by the equation one:
where, T1 is T2, T2 is T4-T1, and Td is the interval between sending the query message and sending the response message.
Through the first time error delta t1 obtained by the active timing, the non-reference member device realizes clock synchronization with the reference member device. The non-reference member equipment can finish the accurate synchronization of the clock once by performing the active timing once, and in each first timing cycle (time element), each non-reference member equipment can be ensured to finish the accurate synchronization of the equipment clock by performing the active timing at least once.
Example two:
because each non-reference member device in the system generally performs timing only once in the corresponding first timing period, and the timing accuracy is poor, this embodiment further includes, on the basis of the first embodiment:
constructing a timing model according to the time error and a preset timing period T1;
obtaining a second time error delta t2 according to the timing model;
a second comparison is made to the non-reference member device after the first timing end time T2 based on the second time error at 2.
In this embodiment, the timing model is as follows:
Δ T2 ═ kt + T equation two
Where T is a first timing cycle of the non-reference member device, k is a clock drift per unit time, and T is a delay time.
In one embodiment, the first timing period is 200-300 ms.
The delay time T is the sum of the delay time of a system transmitting channel, the delay time of a receiving channel and the delay time of a pseudo code synchronous pulse. The delay time is basically a fixed value under the condition that the hardware design is consistent, and the delay time T can be obtained through measurement of a plurality of samples and probability statistical analysis.
For example, the delay time of the transmission channel can be obtained by the method shown in fig. 3, which generates a radio frequency signal by a radio frequency signal generator, obtains a radio frequency signal coupling detection after the radio frequency signal passes through the transmission channel, and obtains the delay time of the transmission channel by starting/stopping a timer.
The delay time of the receiving channel can be obtained by the method shown in fig. 4, which generates a radio frequency signal by a radio frequency signal generator, generates a pseudo code synchronous timing pulse after the radio frequency signal passes through the receiving channel, and obtains the delay time of the receiving transmitting channel by starting/stopping a timer for timing.
The pseudo code synchronization pulse delay time can be obtained by the method shown in fig. 5, after the pseudo code digital baseband is generated, the digital demodulator generates a pseudo code synchronization signal, and then the start/stop timer is used for timing to obtain the pseudo code synchronization pulse delay time of the receiving transmission channel.
Time T2 is less than the first timing period of the non-reference member device. In one embodiment, time T2 is less than 10ns to 20 ns.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.
Claims (7)
1. A system clock synchronization method for clock synchronization between a non-reference member device and a reference member device in a system, comprising:
the non-reference member device sends a query message to the reference member device at its assigned query time point t 1;
after receiving the inquiry message at the time point t2, the reference member device transmits a response message to the non-reference member device at a response time point t3 assigned thereto;
the non-reference member device receives the reply message at time point t 4;
calculating a first time error Δ t1 according to the time point t1, the time point t2, the time point t3 and the time point t 4;
and performing first timing on the non-reference member device according to the first time error delta t1 to realize clock synchronization between the non-reference member device and the reference member device.
2. The method for synchronizing system clocks according to claim 1, wherein said first time error Δ t1 is calculated by the equation one:
where, T1 is T2, T2 is T4-T1, and Td is the interval between sending the query message and sending the response message.
3. The method for synchronizing system clocks according to claim 1, further comprising:
constructing a timing model according to the time error delta T and a preset timing period T1;
obtaining a second time error delta t2 according to the timing model;
a second comparison is made to the non-reference member device after the first timing end time T2 based on the second time error at 2.
4. The method for synchronizing system clocks according to claim 3, wherein said timing model has the equation two:
Δ T2 ═ kt + T equation two
Where T is a first timing cycle of the non-reference member device, k is a clock drift per unit time, and T is a delay time.
5. The method for synchronizing system clocks according to claim 4, wherein the first timing period is 200-300 ms.
6. The method for synchronizing system clocks according to claim 4, wherein said delay time T is the sum of the system transmission channel delay time, the reception channel delay time and the pseudo code synchronization pulse delay time.
7. The method of system clock synchronization of claim 4, wherein the time T2 is less than a first timing period of a non-reference member device.
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| CN112019290A (en) * | 2020-08-30 | 2020-12-01 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Multi-antenna system time synchronization method |
| CN113891451A (en) * | 2021-10-28 | 2022-01-04 | 安徽奇智科技有限公司 | High-precision clock synchronization method between base stations |
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