CN111078292A - 算术处理设备和控制算术处理设备的方法 - Google Patents

算术处理设备和控制算术处理设备的方法 Download PDF

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Publication number
CN111078292A
CN111078292A CN201910973303.4A CN201910973303A CN111078292A CN 111078292 A CN111078292 A CN 111078292A CN 201910973303 A CN201910973303 A CN 201910973303A CN 111078292 A CN111078292 A CN 111078292A
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operand
exponent
multiply
zero
bit
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Chinese (zh)
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小野滝男
和田洋征
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Fujitsu Ltd
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Fujitsu Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4876—Multiplying
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Nonlinear Science (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
CN201910973303.4A 2018-10-18 2019-10-14 算术处理设备和控制算术处理设备的方法 Pending CN111078292A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018196803A JP7115211B2 (ja) 2018-10-18 2018-10-18 演算処理装置および演算処理装置の制御方法
JP2018-196803 2018-10-18

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CN111078292A true CN111078292A (zh) 2020-04-28

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Country Link
US (1) US11226791B2 (fr)
EP (1) EP3640792A1 (fr)
JP (1) JP7115211B2 (fr)
CN (1) CN111078292A (fr)

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WO2021258954A1 (fr) * 2020-06-23 2021-12-30 中兴通讯股份有限公司 Appareil de traitement de données et procédé de traitement de données

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US11650819B2 (en) 2019-12-13 2023-05-16 Intel Corporation Apparatuses, methods, and systems for instructions to multiply floating-point values of about one
US11875154B2 (en) 2019-12-13 2024-01-16 Intel Corporation Apparatuses, methods, and systems for instructions to multiply floating-point values of about zero
US11847450B2 (en) 2019-12-13 2023-12-19 Intel Corporation Apparatuses, methods, and systems for instructions to multiply values of zero
US20210182056A1 (en) * 2019-12-13 2021-06-17 Intel Corporation Apparatuses, methods, and systems for instructions to multiply values of one
US20230129750A1 (en) * 2021-10-27 2023-04-27 International Business Machines Corporation Performing a floating-point multiply-add operation in a computer implemented environment

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US6363476B1 (en) * 1998-08-12 2002-03-26 Kabushiki Kaisha Toshiba Multiply-add operating device for floating point number
US20040186870A1 (en) * 2003-03-19 2004-09-23 International Business Machines Corporation Power saving in a floating point unit using a multiplier and aligner bypass
US20100017635A1 (en) * 2008-07-18 2010-01-21 Barowski Harry S Zero indication forwarding for floating point unit power reduction
CN101692202A (zh) * 2009-09-27 2010-04-07 北京龙芯中科技术服务中心有限公司 一种64比特浮点乘加器及其浮点运算流水节拍处理方法
JP2010218197A (ja) * 2009-03-17 2010-09-30 Nec Computertechno Ltd 浮動小数点積和演算装置、浮動小数点積和演算方法、及び浮動小数点積和演算用プログラム
CN102707921A (zh) * 2011-02-17 2012-10-03 Arm有限公司 用于执行浮点加法的装置和方法
CN103119579A (zh) * 2010-09-24 2013-05-22 英特尔公司 用于向量整数乘加指令的功能单元
US20140122555A1 (en) * 2012-10-31 2014-05-01 Brian Hickmann Reducing power consumption in a fused multiply-add (fma) unit responsive to input data values
US20140136587A1 (en) * 2012-11-12 2014-05-15 Advanced Micro Devices, Inc. Floating point multiply-add unit with denormal number support
CN104657107A (zh) * 2013-11-21 2015-05-27 三星电子株式会社 浮点加法器、通过浮点加法器执行的方法和信息处理系统
US20150193203A1 (en) * 2014-01-07 2015-07-09 Nvidia Corporation Efficiency in a fused floating-point multiply-add unit
CN108287681A (zh) * 2018-02-14 2018-07-17 中国科学院电子学研究所 一种单精度浮点融合点乘运算单元

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US5574672A (en) * 1992-09-25 1996-11-12 Cyrix Corporation Combination multiplier/shifter
EP0645699A1 (fr) * 1993-09-29 1995-03-29 International Business Machines Corporation Séquence d'instructions pour la multiplication-addition rapide dans un processeur à virgule flottante du type pipeline
US5999960A (en) * 1995-04-18 1999-12-07 International Business Machines Corporation Block-normalization in multiply-add floating point sequence without wait cycles
US5748516A (en) * 1995-09-26 1998-05-05 Advanced Micro Devices, Inc. Floating point processing unit with forced arithmetic results
US6298367B1 (en) * 1998-04-06 2001-10-02 Advanced Micro Devices, Inc. Floating point addition pipeline including extreme value, comparison and accumulate functions
US8106914B2 (en) 2007-12-07 2012-01-31 Nvidia Corporation Fused multiply-add functional unit
US10360163B2 (en) 2016-10-27 2019-07-23 Google Llc Exploiting input data sparsity in neural network compute units

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US6363476B1 (en) * 1998-08-12 2002-03-26 Kabushiki Kaisha Toshiba Multiply-add operating device for floating point number
US20040186870A1 (en) * 2003-03-19 2004-09-23 International Business Machines Corporation Power saving in a floating point unit using a multiplier and aligner bypass
US20100017635A1 (en) * 2008-07-18 2010-01-21 Barowski Harry S Zero indication forwarding for floating point unit power reduction
JP2010218197A (ja) * 2009-03-17 2010-09-30 Nec Computertechno Ltd 浮動小数点積和演算装置、浮動小数点積和演算方法、及び浮動小数点積和演算用プログラム
CN101692202A (zh) * 2009-09-27 2010-04-07 北京龙芯中科技术服务中心有限公司 一种64比特浮点乘加器及其浮点运算流水节拍处理方法
CN103119579A (zh) * 2010-09-24 2013-05-22 英特尔公司 用于向量整数乘加指令的功能单元
CN102707921A (zh) * 2011-02-17 2012-10-03 Arm有限公司 用于执行浮点加法的装置和方法
US20140122555A1 (en) * 2012-10-31 2014-05-01 Brian Hickmann Reducing power consumption in a fused multiply-add (fma) unit responsive to input data values
JP2014093085A (ja) * 2012-10-31 2014-05-19 Intel Corp 入力データ値に応じたｆｍａユニットにおける電力消費の低減
US20140136587A1 (en) * 2012-11-12 2014-05-15 Advanced Micro Devices, Inc. Floating point multiply-add unit with denormal number support
CN104657107A (zh) * 2013-11-21 2015-05-27 三星电子株式会社 浮点加法器、通过浮点加法器执行的方法和信息处理系统
US20150193203A1 (en) * 2014-01-07 2015-07-09 Nvidia Corporation Efficiency in a fused floating-point multiply-add unit
CN108287681A (zh) * 2018-02-14 2018-07-17 中国科学院电子学研究所 一种单精度浮点融合点乘运算单元

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021258954A1 (fr) * 2020-06-23 2021-12-30 中兴通讯股份有限公司 Appareil de traitement de données et procédé de traitement de données

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US20200125331A1 (en) 2020-04-23
JP2020064504A (ja) 2020-04-23
US11226791B2 (en) 2022-01-18
JP7115211B2 (ja) 2022-08-09

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Application publication date: 20200428