CN111064538B - Time service message sending method, device and equipment, medium main control board and frame type equipment - Google Patents
Time service message sending method, device and equipment, medium main control board and frame type equipment Download PDFInfo
- Publication number
- CN111064538B CN111064538B CN201911286174.8A CN201911286174A CN111064538B CN 111064538 B CN111064538 B CN 111064538B CN 201911286174 A CN201911286174 A CN 201911286174A CN 111064538 B CN111064538 B CN 111064538B
- Authority
- CN
- China
- Prior art keywords
- signal propagation
- duration
- clock chip
- time
- target service
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0644—External master-clock
Abstract
The disclosure provides a time service message sending method and device, electronic equipment and a computer readable storage medium. The method is used for sending a time service message to a target service board by a main control board of frame type equipment, and comprises the following steps: when the circuit switcher is detected to meet the preset condition, the circuit switcher is switched to conduct a time service communication loop among the clock chip, the circuit switcher and the target service board; enabling the clock chip to send a time length measuring message to measure a first signal propagation time length of the time service communication loop; acquiring a second signal propagation time length and a third signal propagation time length; and calculating downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and sending a time service message to the target service board according to the downlink propagation delay. The method and the device can realize accurate clock synchronization among all single boards of the frame type equipment.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a time service packet sending method and apparatus, an electronic device, and a computer-readable storage medium.
Background
The frame type equipment is network equipment with flexible replacement of single boards and good expansibility, and is internally provided with a plurality of slot positions, each slot position can be inserted into different types of single boards, and different single boards can be connected with each other and transmit data after being inserted into different slot positions. The single board includes a main control board, a service board, etc. In practical application, each board of the frame device needs to perform accurate clock synchronization.
Disclosure of Invention
The invention aims to provide a time service message sending method and device, electronic equipment and a computer readable storage medium.
The first aspect of the present disclosure provides a time service packet sending method, configured to send a time service packet to a target service board by a main control board of a frame device, where the main control board is provided with a clock chip and a circuit switcher, and the circuit switcher is connected to the target service board through a symmetric link;
the method comprises the following steps:
when the condition that the clock chip meets the preset condition is detected, switching a circuit switcher to conduct a time service communication loop among the clock chip, the circuit switcher and the target service board;
enabling the clock chip to send a time length measuring message to measure a first signal propagation time length of the time service communication loop;
acquiring an uplink second signal propagation time length and a downlink third signal propagation time length between the clock chip and the circuit switcher in the time service communication loop;
and calculating downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and sending a time service message to the target service board according to the downlink propagation delay.
According to the time service message sending method provided by the first aspect of the disclosure, the clock chip and the circuit switcher are arranged in the main control board, and the circuit switcher is connected with the target service board by adopting the symmetric link, so that the automatic measurement of the downlink propagation delay can be realized; because the automatic measurement does not depend on manual participation any longer, the measurement can be carried out at any time, and therefore, according to the preset condition, when the condition that the automatic measurement meets the preset condition is detected, the automatic measurement of the downlink propagation delay can be triggered, for example, the downlink propagation delay can be automatically measured according to the conditions of environment temperature change, humidity change, difference of hardware of different service boards and the like, so that the measured downlink propagation delay can accurately reflect the current line state in real time; furthermore, the time service message is sent to the target service board according to the downlink propagation delay, so that the time service information in the time service message has higher accuracy, and accurate clock synchronization among the single boards of the frame-type equipment is realized.
The second aspect of the present disclosure provides a time service packet sending apparatus, configured to send a time service packet to a target service board by a main control board of a frame-type device, where the main control board is provided with a clock chip and a circuit switcher, and the circuit switcher is connected to the target service board through a symmetric link;
the device comprises:
the time service loop conduction module is used for switching the circuit switcher to conduct the time service communication loop among the clock chip, the circuit switcher and the target service board when detecting that the preset condition is met;
the first time length measuring module is used for enabling the clock chip to send a time length measuring message so as to measure the first signal propagation time length of the time service communication loop;
the time length information acquisition module is used for acquiring uplink second signal propagation time length and downlink third signal propagation time length between the clock chip and the circuit switcher in the time service communication loop;
and the downlink time delay calculation module is used for calculating the downlink time delay between the clock chip and the target service board according to the first signal propagation time length, the second signal propagation time length and the third signal propagation time length, and sending a time service message to the target service board according to the downlink time delay.
A third aspect of the present disclosure provides an electronic device, comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the computer program when executing the computer program to implement the method of the first aspect of the present disclosure.
A fourth aspect of the present disclosure provides a computer readable medium having computer readable instructions stored thereon which are executable by a processor to implement the method of the first aspect of the present disclosure.
The time service message sending device provided by the second aspect, the electronic device provided by the third aspect, and the computer-readable storage medium provided by the fourth aspect of the present disclosure are based on the same inventive concept as the time service message sending method provided by the first aspect, and have the same beneficial effects as the time service message sending method provided by the first aspect.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the disclosure. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 illustrates a schematic diagram of time service message transmission provided in the prior art;
fig. 2 illustrates a schematic diagram of a main control board provided by some embodiments of the present disclosure;
fig. 3 shows a schematic diagram of a block-type device provided in some embodiments of the present disclosure;
fig. 4 is a flowchart illustrating a time service message sending method according to some embodiments of the present disclosure;
fig. 5 is a schematic diagram illustrating a time service message sending apparatus according to some embodiments of the present disclosure;
FIG. 6 illustrates a schematic diagram of an electronic device provided by some embodiments of the present disclosure;
FIG. 7 illustrates a schematic diagram of a computer-readable storage medium provided by some embodiments of the present disclosure.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which this disclosure belongs.
In addition, the terms "first" and "second", etc. are used to distinguish different objects, rather than to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Referring to fig. 1, which shows a schematic diagram of time service message transmission provided in the prior art, as shown in fig. 1, a clock module of a main control board transmits a time service message to a clock module of each service board through a bus, so as to ensure that each service board and the main control board keep clock synchronization. However, since the clock module of the main control board is connected to the clock module of each service board through a bus, there is a certain line delay when the time service packet arrives at each service board, and therefore, the line delay needs to be measured and compensated in the time service packet.
In the prior art, the line delay from a main control board clock module to each service board clock module is directly measured by an oscilloscope in a manual mode, and then the line delay is used for compensating the time service information in the time service message. However, factors such as environmental temperature change, humidity change, and hardware differences of different service boards all affect the line delay, which results in misalignment of the time service information in the time service message, and thus cannot achieve accurate clock synchronization between the single boards of the frame device.
Based on the above description, the embodiments of the present disclosure provide a time service packet sending method and apparatus, an electronic device, and a computer readable storage medium, so as to implement accurate clock synchronization between boards of a frame-type device, which is described below with reference to the accompanying drawings.
The time service message sending method provided by the embodiment of the present disclosure is mainly used for sending a time service message to a target service board by a main control board of a frame type device, and the main control board is briefly described as follows:
referring to fig. 2, which illustrates a schematic diagram of a main control board for a frame device according to some embodiments of the present disclosure, as shown in the drawing, the main control board 10 for a frame device may include: the clock circuit comprises a clock chip 101, a circuit switcher 102 and a processor 103, wherein the clock chip 101, the circuit switcher 102 and the processor 103 are connected in pairs, and the clock chip 101 can be realized based on a Time To Digital Converter (TDC); wherein the content of the first and second substances,
the processor 103 is configured to calculate a downlink propagation delay between the clock chip and the target service board by executing the time service packet sending method provided in the following embodiments of the present disclosure, and send a time service packet to the target service board.
The processor 103 may be configured to send a circuit switching instruction to the circuit switcher 102 and a duration measurement instruction to the clock chip 101 when it is detected that a preset condition is met;
the circuit switcher 102 is configured to conduct a time service communication loop among the clock chip 101, the circuit switcher 102, and the target service board under the control of the circuit switching instruction;
the clock chip 101 is configured to send a duration measurement packet under the control of the duration measurement instruction, so as to measure a first signal propagation duration of the time service communication loop, and feed back the first signal propagation duration to the processor 103;
next, the processor 103 may obtain an uplink second signal propagation duration and a downlink third signal propagation duration between the clock chip 101 and the circuit switch 102 in the time service communication loop, calculate a downlink propagation delay between the clock chip 101 and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and then send a time service packet to the target service board according to the downlink propagation delay.
The second signal propagation duration and the third signal propagation duration may be measured in real time, or may be measured in advance, stored, and called in real time when needed, which may both achieve the purpose of the embodiment of the present disclosure.
In the embodiment of the present disclosure, a clock chip 101, a circuit switch 102 and a processor 103 are configured in a main control board 10, where the circuit switch 102 may conduct a time service communication loop between the clock chip 101 and a target service board under the control of the processor 103, and since the clock chip 101 is implemented based on a time-to-digital converter, a first signal propagation duration corresponding to the time service communication loop may be measured, and the processor 103 may calculate a downlink propagation delay between the clock chip 101 and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, so as to implement automatic measurement of the downlink propagation delay; because the automatic measurement does not depend on manual participation any longer, the measurement can be performed at any time, and therefore, the processor 103 can trigger the automatic measurement of the downlink propagation delay according to the preset condition whenever the condition that the automatic measurement meets the preset condition is detected, for example, the downlink propagation delay is automatically measured according to the conditions of environmental temperature change, humidity change, difference of hardware of different service boards, and the like, so that the measured downlink propagation delay can accurately reflect the current line state in real time; and sending the time service message to the target service board according to the downlink propagation delay, so that the time service information in the time service message has higher accuracy, and accurate clock synchronization among the single boards of the frame-type equipment is realized.
It should be noted that the target service board may be any one of a plurality of service boards connected to the main control board, and the processor 103 may detect whether each service board meets a preset condition one by one, and respectively and sequentially measure the downlink propagation delay for the detected service boards (as target service boards) meeting the preset condition.
Specifically, the processor 103 may send a circuit switching instruction to the circuit switch 102 to control the circuit switch 102 to turn on the time service communication loop between the clock chip 101 and the target service board to be measured, where the circuit switching instruction is used to instruct the circuit switch 102 to turn on the time service communication loop between the clock chip 101 and the target service board to be measured.
After the time service communication loop is turned on, the processor 103 may further send a time length measurement instruction to the clock chip 101 to control the clock chip 101 to measure a first signal propagation time length of the turned-on time service communication loop, and feed back the first signal propagation time length to the processor, where the time length measurement instruction is used to instruct the clock chip 101 to measure the first signal propagation time length of the turned-on time service communication loop.
In some embodiments, the clock chip 101 may be implemented based on a TDC (Time to Digital converter) using a DPLL (Digital Phase Locked Loop), and the ports and the connection mode of the clock chip 101 may refer to fig. 3, so that the clock chip 101 may be used to accurately measure the signal propagation Time in a Loop, and the measurement accuracy may reach picosecond level, and is high in accuracy.
In some variations of embodiments of the present disclosure, the preset condition may include at least one of:
the interval duration of the downlink propagation delay calculated for the target service board at the last time exceeds a preset interval duration threshold;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environment temperature exceeds the change threshold value of the environment temperature;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environmental humidity exceeds the change threshold value of the environmental humidity;
the communication link with the target service board changes.
If the preset condition includes any of the above items, if any one of the items is met, the preset condition is judged to be met, and the downlink propagation delay can be triggered to be measured.
By the embodiment, the downlink propagation delay can be measured again at intervals of the preset interval time length threshold, and the downlink propagation delay can be timely updated no matter what kind of change occurs to the communication link between the main control board and the service board, so that the accuracy of the time service information in the time service message is ensured. Or when detecting the environmental temperature change, the environmental humidity change or the change of the communication link between the target service board and the target service board, triggering in real time to re-measure the downlink propagation delay so as to update the downlink propagation delay more timely, thereby ensuring the accuracy of the time service information in the time service message more in real time.
The communication link between the target service board and the target service board may include, but is not limited to, a new insertion of the target service board into the frame device, a re-insertion of the target service board into the frame device after the target service board is pulled out, a change of a connection line between the target service board and the target service board, and a change of a main control board (for example, when switching with a standby main control board), which are not limited in the embodiment of the present disclosure.
It should be noted that, in the embodiment of the present disclosure, the symmetric link may refer to that physical connection lines of the uplink communication link and the downlink communication link are equal in length, or that signal propagation durations of the uplink communication link and the downlink communication link are equal. In addition, the downlink may refer to a direction in which a signal or a message is sent out by the clock chip 101, and the uplink may refer to a direction in which a signal or a message returns to the clock chip 101.
In most cases, a plurality of components and circuits are disposed between the clock chip 101 and the circuit switch 102, so that the communication link between the clock chip 101 and the circuit switch 102 is an asymmetric link, and therefore, the present disclosure needs to measure the signal propagation duration of each link in the asymmetric link, i.e., the second signal propagation duration and the third signal propagation duration.
Specifically, please refer to fig. 3 to explain the following embodiments, in some modified embodiments of the present disclosure, the first output terminal of the clock chip 101 is connected to the circuit switch 102 through a first communication link, the first input terminal of the clock chip 101 is connected to the circuit switch 102 through a second communication link, and the first communication link and the second communication link are asymmetric links;
the processor 103 is configured to calculate a downlink propagation delay between the clock chip 101 and the target service board according to the following formula:
Ta＝((T3-T2-T1)/2)+T1
in the formula, Ta represents a downlink propagation delay, T3 represents a first signal propagation duration, T2 represents a second signal propagation duration corresponding to the second communication link, and T1 represents a third signal propagation duration corresponding to the first communication link.
In this embodiment, the downlink propagation delay may be accurately calculated under the condition that the first communication link and the second communication link are asymmetric.
The second signal propagation time length and the third signal propagation time length in the above embodiments may be obtained by measurement with an oscilloscope, or may be determined in the following manner:
as will be appreciated with reference to fig. 3, in some embodiments, the second input of the clock chip 101 is connected to the circuit switch 102 via a third communication link;
the circuit switch 102 is further configured to conduct a first loop formed by the first communication link and the third communication link under the control of the processor 103;
the clock chip 101 is further configured to measure a fourth signal propagation duration of the turned-on first loop under the control of the processor 103, and feed back the fourth signal propagation duration to the processor 103;
the processor 103 is further configured to determine a third signal propagation duration corresponding to the first communication link by calculating a difference between the fourth signal propagation duration and a fifth signal propagation duration, where the fifth signal propagation duration is a signal propagation duration corresponding to the third communication link.
In this embodiment, the third communication link may be implemented by using a printed circuit on a circuit board, and the second input terminal of the clock chip 101 is directly connected to the circuit switcher 102 through the printed circuit, and the printed circuit has high stability and is not easily affected by factors such as ambient temperature and humidity, so that the fifth signal propagation duration may be measured by using an oscilloscope for calculating the third signal propagation duration.
Through the implementation mode, the automatic measurement of the third signal propagation time length can be realized by the main control board, and the precision is high.
As will be understood with reference to fig. 3, in some modified embodiments of the disclosed embodiment, the circuit switch 102 is further configured to conduct a second loop formed by the first communication link and the second communication link under the control of the processor 103;
the clock chip 101 is further configured to measure a sixth signal propagation duration of the turned-on second loop under the control of the processor 103, and feed back the sixth signal propagation duration to the processor 103;
the processor 103 is further configured to determine a second signal propagation duration corresponding to the second communication link by calculating a difference between the sixth signal propagation duration and the third signal propagation duration.
Through the embodiment, the automatic measurement of the second signal propagation time length can be realized by the main control board, and the precision is high.
In some modified embodiments of the present disclosure, the processor 103 is further configured to calculate an uplink propagation delay between the clock chip 101 and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration, and check a time service response packet returned by the target service board according to the uplink propagation delay.
In this embodiment, after the clock chip 101 sends a time service packet, the target service board updates a local clock according to the time service information in the time service packet, then generates a time service response packet according to the local clock information and sends the time service response packet to the clock chip 101, and after receiving the time service response packet, the clock chip 101 may check whether the updated clock information of the target service board is accurate according to the uplink propagation delay and the local clock of the clock chip 101, and if not, trigger to re-measure the downlink propagation delay for the target service board and re-send the time service packet.
By the embodiment, the accuracy of time service to the target service board can be further ensured through the verification process, and accurate clock synchronization between the service board and the main control board is ensured.
In addition to the above embodiments, in some modified embodiments, if the time service communication loop between the clock chip and the target service board is a symmetric link, one half of the propagation time of the first signal may be directly determined as the downlink propagation delay and the uplink propagation delay between the clock chip and the target service board.
In other modified embodiments, please refer to fig. 3 for understanding, the first output terminal of the clock chip 101 is connected to the circuit switch 102 through a first communication link, the first input terminal of the clock chip 101 is connected to the circuit switch 102 through a second communication link, the first communication link and the second communication link are asymmetric links, and the circuit switch 102 and the target service board are connected through a symmetric link;
the processor 103 is configured to calculate an uplink propagation delay between the clock chip 101 and the target service board according to the following formula:
Tb＝((T3-T2-T1)/2)+T2
in the formula, Tb represents an uplink propagation delay, T3 represents a first signal propagation duration, T2 represents a second signal propagation duration corresponding to the second communication link, and T1 represents a third signal propagation duration corresponding to the first communication link.
In this embodiment, the downlink propagation delay may be accurately calculated under the condition that the first communication link and the second communication link are asymmetric.
In some variations of the disclosed embodiments, the clock chip 101 further comprises a third input and a second output, the third input and the second output connected by a fourth communication link,
the clock chip 101 is further configured to use a signal propagation duration corresponding to the fourth communication link as a timing reference value, and perform timing according to the timing reference value.
As can be understood with reference to fig. 3, the third input terminal and the second output terminal are connected by a physical connection line that is as short as possible, the purpose of the connection line being as short as possible is that the third input terminal needs to be used as a reference input for measuring the time delay, and the signal is output from the second output terminal to the third input terminal, and the smaller the influence of the physical connection line, the better.
By the embodiment, the timing accuracy of the clock chip 101 can be further ensured, and the clock synchronization accuracy between the main control board and the service board can be further improved.
Based on the above description, the time service message transmission method provided by the present disclosure is described as follows, and the following description of the embodiments can be understood with reference to the above description:
referring to fig. 4, a flowchart of a time service packet sending method according to some embodiments of the present disclosure is shown, where the time service packet sending method is used for a main control board of a frame device to send a time service packet to a target service board, where the main control board is provided with a clock chip and a circuit switch, the circuit switch is connected to the target service board through a symmetric link, and the time service packet sending method may include the following steps:
step S101: when the condition that the clock chip meets the preset condition is detected, switching a circuit switcher to conduct a time service communication loop among the clock chip, the circuit switcher and the target service board;
step S102: enabling the clock chip to send a time length measuring message to measure a first signal propagation time length of the time service communication loop;
step S103: acquiring an uplink second signal propagation time length and a downlink third signal propagation time length between the clock chip and the circuit switcher in the time service communication loop;
step S104: and calculating downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and sending a time service message to the target service board according to the downlink propagation delay.
According to the time service message sending method provided by the embodiment of the disclosure, the clock chip and the circuit switcher are arranged in the main control board, and the circuit switcher is connected with the target service board by adopting the symmetrical link, so that the automatic measurement of the downlink propagation delay can be realized; because the automatic measurement does not depend on manual participation any longer, the measurement can be carried out at any time, and therefore, according to the preset condition, when the condition that the automatic measurement meets the preset condition is detected, the automatic measurement of the downlink propagation delay can be triggered, for example, the downlink propagation delay can be automatically measured according to the conditions of environment temperature change, humidity change, difference of hardware of different service boards and the like, so that the measured downlink propagation delay can accurately reflect the current line state in real time; furthermore, the time service message is sent to the target service board according to the downlink propagation delay, so that the time service information in the time service message has higher accuracy, and accurate clock synchronization among the single boards of the frame-type equipment is realized.
In some embodiments, the Time service packet may be a packet based on a Precision Time Protocol (PTP) Protocol, and is sent to the target service board for clock synchronization based on the PTP Protocol.
In some variations of the disclosed embodiments, the preset condition includes at least one of:
the interval duration of the downlink propagation delay calculated for the target service board at the last time exceeds a preset interval duration threshold;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environment temperature exceeds the change threshold value of the environment temperature;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environmental humidity exceeds the change threshold value of the environmental humidity;
the communication link with the target service board changes.
If the preset condition includes any of the above items, if any one of the items is met, the preset condition is judged to be met, and the downlink propagation delay can be triggered to be measured.
By the embodiment, the downlink propagation delay can be measured again at intervals of the preset interval time length threshold, and the downlink propagation delay can be timely updated no matter what kind of change occurs to the communication link between the main control board and the service board, so that the accuracy of the time service information in the time service message is ensured. Or when detecting the environmental temperature change, the environmental humidity change or the change of the communication link between the target service board and the target service board, triggering in real time to re-measure the downlink propagation delay so as to update the downlink propagation delay more timely, thereby ensuring the accuracy of the time service information in the time service message more in real time.
The preset interval time threshold, the ambient temperature change threshold and the ambient humidity change threshold can be flexibly set according to actual requirements, and the embodiment of the disclosure is not limited. The communication link between the target service board and the target service board changes, which may include but is not limited to a new insertion of the target service board into the frame device, a re-insertion of the target service board into the frame device after the target service board is pulled out, a change in a connection between the target service board and the target service board, and a change in a main control board (for example, when switching with a standby main control board), which are not limited in the embodiment of the present disclosure.
In some modified embodiments of the embodiment of the present disclosure, the calculating a downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration includes:
calculating the downlink propagation delay between the clock chip and the target service board according to the following formula:
Ta＝((T3-T2-T1)/2)+T1
in the formula, Ta represents a downlink propagation delay, T3 represents the first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
Since the circuit switch is connected to the target service board through the symmetric link, according to the embodiment, the downlink propagation delay can be accurately calculated under the condition that the communication link between the clock chip and the circuit switch is an asymmetric link.
The second signal propagation time length and the third signal propagation time length in the above embodiments may be obtained by measurement with an oscilloscope, or may be determined in the following manner:
as will be appreciated with reference to fig. 3, in some embodiments, the first output of the clock chip is connected to the circuit switch via a first communication link and the second input of the clock chip is connected to the circuit switch via a third communication link;
the method further comprises the following steps:
switching a circuit switch to conduct a first loop comprised of the first communication link and the third communication link;
enabling the clock chip to send a time length measuring message to measure the propagation time length of a fourth signal of the conducted first loop;
determining a third signal propagation duration corresponding to the first communication link by calculating a difference between the fourth signal propagation duration and a fifth signal propagation duration, wherein the fifth signal propagation duration is a signal propagation duration corresponding to the third communication link.
In this embodiment, the third communication link may be implemented by using a printed circuit on a circuit board, and the third communication link does not pass through any other component, so that the second input terminal of the clock chip is directly connected to the circuit switcher through the printed circuit, and since the printed circuit has high stability and is not easily affected by factors such as ambient temperature and humidity, the fifth signal propagation duration may be measured by using an oscilloscope for calculating the third signal propagation duration.
Through the implementation mode, the automatic measurement of the third signal propagation time can be realized, and the accuracy is high.
As will be appreciated with reference to fig. 3, in some variations of the disclosed embodiments, the first input of the clock chip is connected to the circuit switch via a second communication link;
the method further comprises the following steps:
switching a circuit switch to conduct a second loop comprised of the first communication link and the second communication link;
enabling the clock chip to send a duration measurement message to measure the propagation duration of a sixth signal of the conducted second loop;
and determining a second signal propagation duration corresponding to the second communication link by calculating a difference between the sixth signal propagation duration and the third signal propagation duration.
Through the embodiment, the automatic measurement of the second signal propagation time can be realized, and the accuracy is high.
It should be noted that the second signal propagation duration and the third signal propagation duration may be calculated in real time, or may be calculated in advance and stored, and then called in real time when needed, and correspondingly, the second signal propagation duration and the third signal propagation duration obtained in step S103 may be calculated in real time through the foregoing embodiment, or may be calculated in advance and stored in a memory, and both of them may achieve the purpose of the embodiment of the present disclosure.
In some variations of the disclosed embodiments, the method further comprises:
and calculating the uplink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and checking a time service response message returned by the target service board according to the uplink propagation delay.
In this embodiment, after the time service packet is sent, the target service board updates the local clock according to the time service information in the time service packet, then generates a time service response packet according to the local clock information and feeds the time service response packet back to the main control board, and after receiving the time service response packet, the main control board can check whether the updated clock information of the target service board is accurate according to the uplink propagation delay and the local clock of the clock chip, and if not, trigger to re-measure the downlink propagation delay for the target service board and re-send the time service packet.
By the embodiment, the accuracy of time service to the target service board can be further ensured through the verification process, and accurate clock synchronization between the service board and the main control board is ensured.
On the basis of the foregoing embodiment, in some modified embodiments, the calculating an uplink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration includes:
calculating the uplink propagation delay between the clock chip and the target service board according to the following formula:
Tb＝((T3-T2-T1)/2)+T2
in the formula, Tb represents an uplink propagation delay, T3 represents a first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
Since the circuit switch is connected to the target service board through the symmetric link, according to the embodiment, the downlink propagation delay can be accurately calculated under the condition that the communication link between the clock chip and the circuit switch is an asymmetric link.
To facilitate understanding of the embodiments of the present disclosure, reference is made to fig. 3, which is a schematic diagram of a block device provided in some embodiments of the present disclosure, and in some embodiments, the clock chip may be implemented based on a TDC (time-to-digital converter) using a DPLL (digital phase-locked loop), and the communication link is clocked by a TDC function. As shown in fig. 3, B and D on the clock chip are signal output terminals, high-frequency signals with the same frequency and phase are set to be output, A, C and H are signal input terminals, the output terminal B and the input terminal a are connected by a physical connection line as short as possible, the purpose of the connection line as short as possible is that the terminal a needs to be used as a reference input for measuring time delay, and the terminal B outputs the reference input to the terminal a, and the influence of the physical connection line is smaller as better.
The SWITCH, i.e. the circuit SWITCH, in the main control board of fig. 3 is used to control signal gating, so that the signal can be output to a different service board or to the C, H terminal of the clock chip. The SWITCH is symmetrical with the bidirectional physical connection of each service board. The time delay measuring method comprises the following steps:
the first step is as follows: the delay (i.e., the fourth signal propagation duration) of the small loop (i.e., the first loop) of D-E-G-H is measured, and then the PCB link delay (i.e., the fifth signal propagation duration) of G-H (i.e., the third communication link) is subtracted to obtain the delay T1 (i.e., the third signal propagation duration) of D-E (i.e., the first communication link).
The second step is that: the delay (i.e., the sixth signal propagation duration) of the D-E-F-C loop (i.e., the second loop) is measured and then subtracted by T1 (i.e., the third signal propagation duration) to obtain the link delay T2 (i.e., the second signal propagation duration) of the F-C (i.e., the second communication link).
The third step: the large loop (i.e., time service communication loop) delay T3 (i.e., first signal propagation duration) of the D-E-target service board clock chip-F-C is measured.
The fourth step: and repeating the third step, and measuring the corresponding first signal propagation time length for the time service communication links corresponding to all the service boards.
The fifth step: and calculating the downlink propagation delay from the clock chip of the main control board to the service board as Ta ═ ((T3-T2-T1)/2) + T1, and the uplink propagation delay as Tb ═ ((T3-T2-T1)/2) + T2.
In the foregoing embodiment, a time service message sending method is provided, and correspondingly, the present disclosure also provides a time service message sending apparatus. The time service message sending device provided by the embodiment of the disclosure can implement the time service message sending method, and the time service message sending device can be implemented by software, hardware or a combination of software and hardware. For example, the time service message sending apparatus may include integrated or separate functional modules or units to execute corresponding steps in the above methods. Please refer to fig. 5, which illustrates a schematic diagram of a time service message sending apparatus according to some embodiments of the present disclosure. Since the apparatus embodiments are substantially similar to the method embodiments, they are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for relevant points. The device embodiments described below are merely illustrative.
As shown in fig. 5, the time service packet sending apparatus 20 is configured to send a time service packet to a target service board by a main control board of a frame-type device, where the main control board is provided with a clock chip and a circuit switcher, and the circuit switcher is connected to the target service board through a symmetric link;
the apparatus 20 comprises:
a time service loop conducting module 201, configured to switch a circuit switcher to conduct a time service communication loop between the clock chip, the circuit switcher, and the target service board when detecting that a preset condition is met;
a first time length measuring module 202, configured to enable the clock chip to send a time length measuring packet to measure a first signal propagation time length of the time service communication loop;
a time length information obtaining module 203, configured to obtain an uplink second signal propagation time length and a downlink third signal propagation time length between the clock chip and the circuit switch in the time service communication loop;
a downlink delay calculation module 204, configured to calculate a downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration, and send a time service packet to the target service board according to the downlink propagation delay. The method can comprise the following steps:
in some variations of the disclosed embodiments, the preset condition includes at least one of:
the interval duration of the downlink propagation delay calculated for the target service board at the last time exceeds a preset interval duration threshold;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environment temperature exceeds the change threshold value of the environment temperature;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environmental humidity exceeds the change threshold value of the environmental humidity;
the communication link with the target service board changes.
In some modified embodiments of the embodiment of the present disclosure, the downlink delay calculating module 204 includes:
a downlink delay calculating unit, configured to calculate a downlink propagation delay between the clock chip and the target service board according to the following formula:
Ta＝((T3-T2-T1)/2)+T1
in the formula, Ta represents a downlink propagation delay, T3 represents the first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
In some variations of the disclosed embodiments, the first output of the clock chip is connected to the circuit switch via a first communication link, and the second input of the clock chip is connected to the circuit switch via a third communication link;
the apparatus 20, further comprising:
a first loop conducting module, configured to switch a circuit switch to conduct a first loop composed of the first communication link and the third communication link;
the fourth time length measuring module is used for enabling the clock chip to send a time length measuring message so as to measure the fourth signal propagation time length of the conducted first loop;
a third time length calculating module, configured to determine a third signal propagation time length corresponding to the first communication link by calculating a difference between the fourth signal propagation time length and a fifth signal propagation time length, where the fifth signal propagation time length is the signal propagation time length corresponding to the third communication link.
In some variations of the disclosed embodiments, the first input of the clock chip is connected to the circuit switch via a second communication link;
the apparatus 20, further comprising:
a second loop conducting module for switching a circuit switcher to conduct a second loop composed of the first communication link and the second communication link;
a sixth time length measuring module, configured to enable the clock chip to send a time length measuring packet to measure a sixth signal propagation time length of the second loop that is turned on;
a second time length calculation module, configured to determine a second signal propagation time length corresponding to the second communication link by calculating a difference between the sixth signal propagation time length and the third signal propagation time length.
In some variations of the disclosed embodiments, the apparatus 20 further comprises:
and the uplink propagation delay calculation module is used for calculating the uplink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and checking the time service response message returned by the target service board according to the uplink propagation delay.
In some modified embodiments of the present disclosure, the uplink propagation delay calculation module includes:
an uplink propagation delay calculating unit, configured to calculate an uplink propagation delay between the clock chip and the target service board according to the following formula:
Tb＝((T3-T2-T1)/2)+T2
in the formula, Tb represents an uplink propagation delay, T3 represents a first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
The time service message sending apparatus 20 provided in the embodiment of the present disclosure has the same beneficial effects as the time service message sending method provided in the foregoing embodiment of the present disclosure.
The disclosed embodiment further provides an electronic device corresponding to the time service message sending method provided by the foregoing embodiment, where the electronic device may include, but is not limited to, a frame device, a main control board in the frame device, and the like, so as to execute the time service message sending method.
Referring to fig. 6, a schematic diagram of an electronic device provided in some embodiments of the disclosure is shown. As shown in fig. 6, the electronic device 30 includes: the system comprises a processor 300, a memory 301, a bus 302 and a communication interface 303, wherein the processor 300, the communication interface 303 and the memory 301 are connected through the bus 302; the memory 301 stores a computer program that can be executed on the processor 300, and the processor 300 executes the time service message transmission method provided by any one of the foregoing embodiments of the present disclosure when executing the computer program.
The Memory 301 may include a Random Access Memory (RAM) and a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. The communication connection between the network element of the system and at least one other network element is realized through at least one communication interface 303 (which may be wired or wireless), and the internet, a wide area network, a local network, a metropolitan area network, and the like can be used.
Bus 302 can be an ISA bus, PCI bus, EISA bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. The memory 301 is configured to store a program, and the processor 300 executes the program after receiving an execution instruction, and the time service message sending method disclosed in any embodiment of the present disclosure may be applied to the processor 300, or implemented by the processor 300.
Processor 300 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 300. The Processor 300 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; but may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present disclosure may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present disclosure may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 301, and the processor 300 reads the information in the memory 301 and completes the steps of the method in combination with the hardware thereof.
The electronic device provided by the embodiment of the disclosure and the time service message sending method provided by the embodiment of the disclosure have the same inventive concept and have the same beneficial effects as the method adopted, operated or realized by the electronic device.
Referring to fig. 7, a computer-readable storage medium is shown as an optical disc 40, on which a computer program (i.e., a program product) is stored, where the computer program is executed by a processor to execute the time service message transmission method provided in any of the foregoing embodiments.
It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory, or other optical and magnetic storage media, which are not described in detail herein.
The computer-readable storage medium provided by the above embodiment of the present disclosure and the time service message sending method provided by the embodiment of the present disclosure are based on the same inventive concept, and have the same beneficial effects as methods adopted, operated, or implemented by application programs stored in the computer-readable storage medium.
It should be noted that the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present disclosure, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some physical ports, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present disclosure may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present disclosure may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present disclosure. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present disclosure, and not for limiting the same; while the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present disclosure, and they should be construed as being included in the following claims and description.
Claims (9)
1. A time service message sending method is characterized in that a main control board used for frame type equipment sends a time service message to a target service board, the main control board is provided with a clock chip and a circuit switcher, and the circuit switcher is connected with the target service board through a symmetrical link;
the method comprises the following steps:
when the circuit switcher is detected to meet the preset condition, the circuit switcher is switched to conduct the time service communication loop among the clock chip, the circuit switcher and the target service board,
enabling the clock chip to send a time length measuring message to measure the first signal propagation time length of the time service communication loop,
acquiring an upstream second signal propagation time length and a downstream third signal propagation time length between the clock chip and the circuit switcher in the time service communication loop,
calculating downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and sending a time service message to the target service board according to the downlink propagation delay;
wherein the calculating a downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration includes:
calculating the downlink propagation delay between the clock chip and the target service board according to the following formula:
Ta＝((T3-T2-T1)/2)+T1
in the formula, Ta represents a downlink propagation delay, T3 represents the first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
2. The method of claim 1, wherein the preset condition comprises at least one of:
the interval duration of the downlink propagation delay calculated for the target service board at the last time exceeds a preset interval duration threshold;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environment temperature exceeds the change threshold value of the environment temperature;
compared with the last calculation of the downlink propagation delay for the target service board, the change value of the environmental humidity exceeds the change threshold value of the environmental humidity;
the communication link with the target service board changes.
3. The method of claim 1, wherein the first output of the clock chip is connected to the circuit switch via a first communication link and the second input of the clock chip is connected to the circuit switch via a third communication link;
the method further comprises the following steps:
switching a circuit switch to conduct a first loop comprised of the first communication link and the third communication link;
enabling the clock chip to send a time length measuring message to measure the propagation time length of a fourth signal of the conducted first loop;
determining a third signal propagation duration corresponding to the first communication link by calculating a difference between the fourth signal propagation duration and a fifth signal propagation duration, wherein the fifth signal propagation duration is a signal propagation duration corresponding to the third communication link.
4. The method of claim 3, wherein the first input of the clock chip is connected to the circuit switch via a second communication link;
the method further comprises the following steps:
switching a circuit switch to conduct a second loop comprised of the first communication link and the second communication link;
enabling the clock chip to send a duration measurement message to measure the propagation duration of a sixth signal of the conducted second loop;
and determining a second signal propagation duration corresponding to the second communication link by calculating a difference between the sixth signal propagation duration and the third signal propagation duration.
5. The method of claim 1, further comprising:
and calculating the uplink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration and the third signal propagation duration, and checking a time service response message returned by the target service board according to the uplink propagation delay.
6. The method of claim 5, wherein said calculating an upstream propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration comprises:
calculating the uplink propagation delay between the clock chip and the target service board according to the following formula:
Tb＝((T3-T2-T1)/2)+T2
in the formula, Tb represents an uplink propagation delay, T3 represents a first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
7. A time service message sending device is characterized in that a main control board used for frame type equipment sends a time service message to a target service board, the main control board is provided with a clock chip and a circuit switcher, and the circuit switcher is connected with the target service board through a symmetrical link;
the device comprises:
a time service loop conduction module, which is used for switching the circuit switcher to conduct the time service communication loop among the clock chip, the circuit switcher and the target service board when detecting that the preset condition is met,
a first time length measuring module, configured to enable the clock chip to send a time length measuring message to measure a first signal propagation time length of the time service communication loop,
a time length information obtaining module, configured to obtain an uplink second signal propagation time length and a downlink third signal propagation time length between the clock chip and the circuit switch in the time service communication loop,
a downlink time delay calculation module, configured to calculate a downlink time delay between the clock chip and the target service board according to the first signal propagation time, the second signal propagation time, and the third signal propagation time, and send a time service packet to the target service board according to the downlink time delay;
wherein the calculating a downlink propagation delay between the clock chip and the target service board according to the first signal propagation duration, the second signal propagation duration, and the third signal propagation duration includes:
calculating the downlink propagation delay between the clock chip and the target service board according to the following formula:
Ta＝((T3-T2-T1)/2)+T1
in the formula, Ta represents a downlink propagation delay, T3 represents the first signal propagation duration, T2 represents the second signal propagation duration, and T1 represents the third signal propagation duration.
8. An electronic device, comprising: memory, processor and computer program stored on the memory and executable on the processor, characterized in that the processor executes the computer program to implement the method according to any of claims 1 to 6.
9. A computer-readable storage medium having computer-readable instructions stored thereon, the computer-readable instructions being executable by a processor to implement the method of any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911286174.8A CN111064538B (en) | 2019-12-13 | 2019-12-13 | Time service message sending method, device and equipment, medium main control board and frame type equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911286174.8A CN111064538B (en) | 2019-12-13 | 2019-12-13 | Time service message sending method, device and equipment, medium main control board and frame type equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111064538A CN111064538A (en) | 2020-04-24 |
| CN111064538B true CN111064538B (en) | 2021-12-24 |
Family
ID=70301597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911286174.8A Active CN111064538B (en) | 2019-12-13 | 2019-12-13 | Time service message sending method, device and equipment, medium main control board and frame type equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111064538B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111865466B (en) * | 2020-07-10 | 2023-11-03 | 润电能源科学技术有限公司 | Time synchronization method, device, time-given equipment and storage medium |
| CN116436555B (en) * | 2023-06-09 | 2023-08-18 | 新华三技术有限公司 | Time synchronization method and device and distributed network equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109818701A (en) * | 2019-02-19 | 2019-05-28 | 烽火通信科技股份有限公司 | The high-accuracy clock synchronization method and system of communication equipment |
| CN110474853A (en) * | 2018-05-11 | 2019-11-19 | 华为技术有限公司 | A kind of method, network node and system that message is sent |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110417503B (en) * | 2019-07-31 | 2021-03-05 | 锐捷网络股份有限公司 | Method for testing clock network delay and digital communication equipment |
-
2019
- 2019-12-13 CN CN201911286174.8A patent/CN111064538B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110474853A (en) * | 2018-05-11 | 2019-11-19 | 华为技术有限公司 | A kind of method, network node and system that message is sent |
| CN109818701A (en) * | 2019-02-19 | 2019-05-28 | 烽火通信科技股份有限公司 | The high-accuracy clock synchronization method and system of communication equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111064538A (en) | 2020-04-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111064538B (en) | Time service message sending method, device and equipment, medium main control board and frame type equipment | |
| US9535119B2 (en) | Duty cycle based timing margining for I/O AC timing | |
| US20200124709A1 (en) | Circuit, method and related chip for time measurement, system, and device | |
| EP2437175A1 (en) | Delay adjustment device and delay adjustment method | |
| US9520877B2 (en) | Apparatus and method for detecting or repairing minimum delay errors | |
| CN111082887B (en) | System, method, device, equipment and medium for signal transmission delay compensation | |
| JP2016118825A (en) | Communication device and transmission delay measuring method | |
| CN115698898B (en) | System and method for synchronizing nodes in a network device | |
| KR100868995B1 (en) | Test Apparatus, Regulating Apparatus, Regulating Method, and Computer Readable Medium on which Regulating Program is recorded | |
| CN112395231A (en) | Method and device for calculating data delay time among multiple processors | |
| US20090302917A1 (en) | Delay circuit and test method for delay circuit | |
| US9361253B2 (en) | Signal control circuit, information processing apparatus, and duty ratio calculation method | |
| CN113252958A (en) | Digital oscilloscope and automatic calibration method for delay difference between channels thereof | |
| US20170372598A1 (en) | Data collection system | |
| US20130070829A1 (en) | Sampling phase calibrating method, storage system utilizing the sampling phase calibrating method | |
| US9198150B2 (en) | Link path delay estimator that combines coarse and fine delay estimates | |
| JP2008202956A (en) | Semiconductor testing device | |
| JP5525942B2 (en) | First lane detection circuit and method, and deskew circuit and method | |
| WO2010079749A1 (en) | Data transfer device and camera | |
| KR102196996B1 (en) | Test system for semiconductor apparatus and test method using the same | |
| JP3408486B2 (en) | Synchronous circuit between devices | |
| JPS59193650A (en) | Device for assigning automatically slave device address | |
| JP2000258563A (en) | Transmission delay time-measuring device | |
| JPH02198375A (en) | Testing apparatus of ic | |
| US7701192B2 (en) | System and method for removal of frequency-dependent timing distortion |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |