CN111063695A - Display panel and preparation method thereof - Google Patents

Display panel and preparation method thereof Download PDF

Info

Publication number
CN111063695A
CN111063695A CN201911257825.0A CN201911257825A CN111063695A CN 111063695 A CN111063695 A CN 111063695A CN 201911257825 A CN201911257825 A CN 201911257825A CN 111063695 A CN111063695 A CN 111063695A
Authority
CN
China
Prior art keywords
layer
electrode
display panel
electrode layer
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201911257825.0A
Other languages
Chinese (zh)
Inventor
林振国
周星宇
徐源竣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to CN201911257825.0A priority Critical patent/CN111063695A/en
Priority to US16/627,377 priority patent/US20210335968A1/en
Priority to PCT/CN2019/126879 priority patent/WO2021114368A1/en
Publication of CN111063695A publication Critical patent/CN111063695A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/828—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/10—Transparent electrodes, e.g. using graphene
    • H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
    • H10K2102/103—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising indium oxides, e.g. ITO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention provides a display panel, which comprises thin film transistors arranged in an array, wherein a source electrode and a drain electrode of each thin film transistor comprise an electrode layer, and the electrode layers of the source electrode or the drain electrode extend to a pixel opening area and can be used as pixel electrodes, so that a dielectric layer for arranging the pixel electrodes is reduced, compared with the prior art, the photomask manufacturing process can be reduced, and the cost is reduced.

Description

Display panel and preparation method thereof
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
Organic Light-Emitting Diode (OLED) displays are becoming the mainstream of the display industry due to their advantages of wide viewing angle, high color gamut, low power consumption, etc.
Currently, a Thin Film Transistor (TFT) for preparing a channel layer by using a metal oxide semiconductor has been widely used in an OLED display panel, and a top gate TFT is preferred in the industry due to a small parasitic capacitance. However, the number of mask processes required for fabricating the array substrate of the top gate TFT is large, and the current technology requires 8 or more masks, which is costly.
In summary, in the process of fabricating the OLED display panel in the prior art, the number of the photo-masks is large, which is not favorable for saving the production cost, and the number of the photo-masks needs to be reduced by improving the fabrication process and the film structure.
Disclosure of Invention
The invention provides a display panel, which is characterized in that transparent metal and source and drain electrode metal are arranged in a laminated manner, so that a dielectric layer for arranging a pixel electrode is reduced; the display panel solves the technical problems that in the manufacturing process of the display panel in the prior art, the number of the light shades is large, and the production cost is not saved favorably.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the present invention provides a display panel including:
the array substrate comprises a substrate and thin film transistors arranged on the substrate in an array mode;
the source and/or drain of the thin film transistor comprises a first electrode layer and a second metal layer, wherein:
the first electrode layer is a transparent electrode layer, and the first electrode layer of the source electrode or the drain electrode extends to a pixel opening region of the display panel.
According to an embodiment of the present invention, the thin film transistor includes a light shielding layer, an active layer, a patterned gate insulating layer, a gate electrode, an inter-insulating layer, and the first electrode layer and the second metal layer, which are disposed on the substrate, wherein the first electrode layer is disposed on a surface of the inter-insulating layer, the second metal layer is disposed on a surface of the first electrode layer, and an overlapping layer of the first electrode layer and the second metal layer is patterned to form the source electrode and the drain electrode.
According to an embodiment of the present invention, the display panel is an OLED display panel, the pixel opening region is correspondingly located in a light emitting region of the OLED display panel, and the first electrode layer of the source or the drain extends to the light emitting region to serve as an anode of an OLED device or an electrode constituting a pixel capacitor.
According to an embodiment of the present invention, the light emitting region is further provided with a second electrode layer, the second electrode layer and the first electrode layer form a pixel capacitor, and the second electrode layer and the active layer are located on the surface of the same film layer and are made of the same material as the active layer.
According to an embodiment of the present invention, the display panel is an LCD display panel, the pixel opening region is located in a sub-pixel region of the LCD display panel, and the first electrode layer of the source or the drain extends to the sub-pixel region to serve as a pixel electrode.
According to an embodiment of the invention, the material used for the first electrode layer is one or a combination of IZO and ITO.
According to an embodiment of the present invention, the material used for the second metal layer is Cu.
According to the above object of the present invention, a method for manufacturing a display panel is provided, the method comprising:
step S10, providing a substrate, and fabricating a thin film transistor on the substrate, wherein the fabricating step of the thin film transistor includes:
step S101, preparing a shading layer, a buffer layer, an active layer, a gate insulating layer, a grid electrode and an interlayer insulating layer on the substrate;
step S102, preparing a first electrode layer on the surface of the interlayer insulating layer, and then preparing a second metal layer on the surface of the first electrode layer;
step S103, performing a yellow light processing on the combined layer of the first electrode layer and the second metal layer to form a source electrode and a drain electrode, wherein the electrode layers of the source electrode and the drain electrode are electrically connected to the ion doped region of the active layer through a through hole, and the electrode layer of the source electrode or the drain electrode extends to the pixel opening region of the display panel.
According to an embodiment of the present invention, the step S101 includes: the active layer is provided with a channel and ion doped regions positioned at two ends of the channel, the gate insulating layer is subjected to patterning treatment to form a gate insulating pattern layer, the gate insulating pattern layer and the channel region are arranged in an aligned mode, and the grid electrode and the gate insulating layer are arranged in an aligned mode.
According to an embodiment of the present invention, the first electrode layer is made of one or a combination of IZO and ITO, and the second metal layer is made of Cu.
The invention has the beneficial effects that: according to the display panel and the preparation method of the display panel, provided by the invention, the source/drain metal of the TFT device is set as the superposed layer of the transparent metal and the nonferrous metal, the transparent metal layer is extended to the light emitting area of the OLED panel or the pixel area of the LCD panel to be used as the pixel electrode, or the transparent metal layer and other electrodes in the light emitting area of the OLED panel form a pixel capacitor, and the arrangement of a dielectric layer is reduced under the condition that the whole light emitting system is complete, so that a photomask for preparing a contact hole is reduced, and the production cost is saved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic view of a film structure of a display panel according to the present invention.
Fig. 2a-2k are schematic diagrams of a process for manufacturing a display panel according to the present invention.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
The present invention is directed to the technical problem that the number of photomasks is large in the manufacturing process of the display panel in the prior art, which is not favorable for saving the production cost.
As shown in fig. 1, taking an OLED display panel as an example, the display panel provided in the present invention includes pixel units distributed in an array, where the pixel units include a control region for disposing a TFT (Thin Film Transistor) device and a light emitting region for disposing an OLED device.
The control area includes: the light-emitting device comprises a patterned light-shielding layer 102 prepared on the surface of a transparent substrate 101, a buffer layer 103 covering the light-shielding layer 102, a semiconductor layer (active layer) prepared on the buffer layer 103, a gate insulating layer 104 positioned on the surface of the semiconductor layer, a gate electrode 106 positioned on the surface of the gate insulating layer 104, an interlayer insulating layer 107 prepared on the buffer layer 103 and covering the semiconductor layer, the gate insulating layer 104 and the gate electrode 106, a drain electrode composite metal layer and a source electrode composite metal layer prepared on the surface of the interlayer insulating layer 107, a passivation layer 108 prepared on the surface of the interlayer insulating layer 107 and covering the drain electrode composite metal layer and the source electrode composite metal layer, and a pixel defining layer 109 prepared on the surface of the passivation layer 108.
The gate insulating layer 104 is patterned to form a gate insulating pattern layer, which is disposed in the control region and covers a portion of the semiconductor layer.
The semiconductor layer includes a first semiconductor pattern at the control region, which is not ionized to maintain semiconductor characteristics by the gate insulating pattern layer and the gate electrode 106 after the semiconductor layer is ionized, and a second semiconductor pattern at the light emitting region, which is not film-covered to form a drain doped region 1054 and a source doped region 1055, which is ionized to form a drain doped region 1053 and a source doped region 1055 of the TFT device, which are not ionized to form a conductor pattern 1052.
A drain contact hole connected to the drain doping region 1054 and a source contact hole connected to the source doping region 1055 are formed on the interlayer insulating layer 107; the drain clad metal layer is connected to the drain doped region 1054 through the drain contact hole, and the source clad metal layer is connected to the source doped region 1055 through the source contact hole.
The drain electrode composite metal layer comprises a first electrode layer 111 prepared on the surface of the interlayer insulating layer 107 and a second metal layer 112 laminated with the first electrode layer 111, and the source electrode composite metal layer comprises a second electrode layer 113 prepared on the surface of the interlayer insulating layer 107 and a third metal layer 114 laminated with the second electrode layer 113; the first electrode layer 111 and the second electrode layer 113 are formed on the surface of the inter-insulating layer 107 and in the contact hole, and the second electrode layer 113 extends into the light-emitting region.
The light emitting region includes: a conductor pattern 1052 formed by ionization, the conductor pattern 1052 and the second electrode layer 113 in the light emitting region forming a pixel capacitance; the pixel defining layer 109 forms a pixel area 115 in the light emitting area, the pixel area 115 is provided with a light emitting layer 116, one signal end of the light emitting layer 116 is connected to the second electrode layer 113 in the light emitting area, the second electrode layer 113 serves as an anode of the light emitting layer 116, and the other signal end of the light emitting layer 116 is provided with a cathode 117.
The material adopted by the light-shielding layer 102 is one or more than two of Mo, Al, Cu and Ti, and the thickness of the light-shielding layer 102 is 500-2000A.
The buffer layer 103 is made of a single-layer film of SiOx or SiNx or a multilayer film formed by combining the single-layer film and the multilayer film, and the film thickness of the buffer layer 103 is 1000-5000A.
The semiconductor layer is made of one of IGZO, IZTO and IGZTO, and the thickness of the film layer of the semiconductor layer is 100-1000A.
The gate insulating layer 104 is made of a single-layer film of SiOx or SiNx or a multilayer film of SiOx or SiNx and a combination thereof, and the film thickness of the gate insulating layer 104 is 1000-3000A.
The gate 106 is made of one or more of Mo, Al, Cu and Ti, and the thickness of the gate 106 is 2000-8000A.
The material of the inter-insulating layer 107 is a single-layer film of SiOx or SiNx or a multi-layer film of the combination of the two, and the film thickness of the inter-insulating layer 107 is 2000-10000A.
The first electrode layer 111 and the second electrode layer 113 are made of one or two of IZO and ITO, the thicknesses of the first electrode layer 111 and the second electrode layer 113 are 300-.
The preparation process of the OLED display panel provided by the embodiment of the invention is as follows:
as shown in fig. 2a, providing a transparent substrate 201, and arranging a light emitting area and a control area on one side of the light emitting area on the transparent substrate 201 in an array; the control region is prepared with a patterned light-shielding layer 202.
As shown in fig. 2b, preparing a buffer layer 203 covering the light-shielding layer 202 and a semiconductor layer on the buffer layer 203 on the transparent substrate 201; and patterning the semiconductor layer to form a first semiconductor pattern 2051 in the control region and a second semiconductor pattern 2052 in the light emitting region.
As shown in fig. 2c, a gate insulating layer 204 covering the semiconductor layer is prepared on the buffer layer 203, and a gate metal layer is prepared on the gate insulating layer 204.
As shown in fig. 2d, a photoresist pattern 210 is formed on the surface of the gate metal layer, and a yellow light process is used to process fig. 2c, so as to form the gate 206.
As shown in fig. 2e, the gate insulating layer 204 is etched to form a gate insulating pattern layer by using a gate 206 self-aligned process.
As shown in fig. 2f, the first semiconductor pattern 2051 and the second semiconductor pattern 2052 are ionized, the area of the first semiconductor pattern 2051 covered by the gate insulating pattern layer is not ionized and keeps the semiconductor characteristic, a channel 2053 of the TFT device is formed, the exposed area of the first semiconductor pattern 2051 is ionized to form a drain doped region 2054 and a source doped region 2055, and the second semiconductor pattern 2052 is ionized to form a conductor 2052'.
As shown in fig. 2g, an interlayer insulating layer 207 is formed on the buffer layer 203, and a first contact hole 2071 corresponding to the drain doped region 2054 and a second contact hole 2072 corresponding to the source doped region 2055 are formed on the interlayer insulating layer 207.
As shown in fig. 2h, a transparent metal layer 21 is formed on the surface of the inter-insulating layer 207 and in the first and second contact holes 2071 and 2072, the transparent metal layer 21 in the contact holes is connected to the corresponding doped regions, and then a colored metal layer 22 is formed on the surface of the transparent metal layer 21.
As shown in fig. 2i, the composite film layer of the transparent metal layer 21 and the colored metal layer 22 is patterned by using a conventional, half-tone combined mask to form a drain composite metal pattern and a source composite metal pattern, the drain composite metal layer includes a first electrode layer 211 and a second metal layer 212, the source composite metal layer includes a second electrode layer 213 and a third metal layer 214, and the second electrode layer 213 extends into the light-emitting region.
As shown in fig. 2j, a passivation layer 208 is formed on the surface of the inter-insulating layer 207, a pixel defining layer 209 is formed on the surface of the passivation layer 208, and an opening of a pixel region 215 is formed at a position of the light emitting region corresponding to the passivation layer 208 and the pixel defining layer 209.
As shown in fig. 2k, an OLED device 216 is formed in the opening of the pixel region 215, one signal terminal of the OLED device 216 is connected to the second electrode layer 213, and the other signal terminal of the OLED device 216 is formed with a cathode 217.
Therefore, according to the OLED display panel and the preparation method of the OLED display surface provided by the embodiment of the invention, the source/drain metal of the TFT device is arranged as the superposed layer of the electrode layer and the metal layer, the electrode layer extends to the light emitting region to be used as the anode of the OLED device and form the pixel capacitor, and the arrangement of a dielectric layer is reduced under the condition that the whole light emitting system is kept, so that a photomask for preparing the contact hole is reduced, and the production cost is further saved.
Similarly, the display panel can also be an LCD display panel and comprises sub-pixel areas distributed in an array mode, the electrode layer of the source electrode or the drain electrode extends to the sub-pixel areas to be used as pixel electrodes, a potential difference is formed between the electrode layer and a common electrode to drive liquid crystal molecules to deflect, the arrangement of a dielectric layer is reduced under the condition that a whole light-emitting system is ensured, a photomask for preparing contact holes is reduced, and further production cost is saved.
In summary, the display panel and the method for manufacturing the display panel provided by the invention set the source/drain metal of the TFT device as the superimposed layer of the transparent metal and the nonferrous metal, and extend the transparent metal layer to the light emitting area of the OLED panel or the pixel area of the LCD panel to be used as the pixel electrode, or form the pixel capacitor with other electrodes in the light emitting area of the OLED, and reduce the arrangement of a dielectric layer under the condition of complete light emitting system, thereby reducing a mask for manufacturing the contact hole and further saving the production cost
Although the present invention has been described with reference to the preferred embodiments, it is to be understood that the present invention is not limited to the disclosed embodiments, and that various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention.

Claims (10)

1. A display panel, comprising:
the array substrate comprises a substrate and thin film transistors arranged on the substrate in an array mode;
the source and/or drain of the thin film transistor comprises a first electrode layer and a second metal layer, wherein:
the first electrode layer is a transparent electrode layer, and the electrode layer of the source electrode or the drain electrode extends to a pixel opening region of the display panel.
2. The display panel according to claim 1, characterized in that: the thin film transistor comprises a shading layer, an active layer, a patterned gate insulating layer, a grid electrode, an inter-insulating layer, the first electrode layer and the second metal layer, wherein the shading layer, the active layer, the patterned gate insulating layer, the grid electrode, the inter-insulating layer, the first electrode layer and the second metal layer are arranged on the substrate, the first electrode layer is arranged on the surface of the inter-insulating layer, the second metal layer is arranged on the surface of the first electrode layer, and the source electrode and the drain electrode are formed after the superposed layer of the first electrode layer and the second metal.
3. The display panel according to claim 2, characterized in that: the display panel is an OLED display panel, the pixel opening region is correspondingly positioned in a light emitting region of the OLED display panel, and the first electrode layer of the source electrode or the drain electrode extends to the light emitting region to be used as an anode of an OLED device or an electrode forming a pixel capacitor.
4. The display panel according to claim 3, wherein the light-emitting region is further provided with a second electrode layer, the second electrode layer and the first electrode layer form a pixel capacitor, and the second electrode layer and the active layer are located on the surface of the same film layer and are made of the same material as the active layer.
5. The display panel according to claim 2, characterized in that: the display panel is an LCD display panel, the pixel opening region is correspondingly positioned in a sub-pixel region of the LCD display panel, and the first electrode layer of the source electrode or the drain electrode extends to the sub-pixel region to be used as a pixel electrode.
6. The display panel according to claim 1, wherein the first electrode layer is made of one or a combination of IZO and ITO.
7. The display panel according to claim 6, wherein the material used for the second metal layer is Cu.
8. A method of making a display panel, the method comprising:
step S10, providing a substrate, and fabricating a thin film transistor on the substrate, wherein the fabricating step of the thin film transistor includes:
step S101, preparing a shading layer, a buffer layer, an active layer, a gate insulating layer, a grid electrode and an interlayer insulating layer on the substrate;
step S102, preparing a first electrode layer on the surface of the interlayer insulating layer, and then preparing a second metal layer on the surface of the first electrode layer;
step S103, performing a yellow light processing on the combined layer of the first electrode layer and the second metal layer to form a source electrode and a drain electrode, wherein the electrode layers of the source electrode and the drain electrode are electrically connected to the ion doped region of the active layer through a through hole, and the electrode layer of the source electrode or the drain electrode extends to the pixel opening region of the display panel.
9. The method according to claim 8, wherein the step S101 comprises:
the active layer is provided with a channel and ion doped regions positioned at two ends of the channel, the gate insulating layer is subjected to patterning treatment to form a gate insulating pattern layer, the gate insulating pattern layer and the channel region are arranged in an aligned mode, and the grid electrode and the gate insulating layer are arranged in an aligned mode.
10. The method according to claim 8, wherein the first electrode layer is made of one or a combination of IZO and ITO, and the second metal layer is made of Cu.
CN201911257825.0A 2019-12-10 2019-12-10 Display panel and preparation method thereof Pending CN111063695A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201911257825.0A CN111063695A (en) 2019-12-10 2019-12-10 Display panel and preparation method thereof
US16/627,377 US20210335968A1 (en) 2019-12-10 2019-12-20 Display panel and method of manufacturing same
PCT/CN2019/126879 WO2021114368A1 (en) 2019-12-10 2019-12-20 Display panel and manufacturing method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911257825.0A CN111063695A (en) 2019-12-10 2019-12-10 Display panel and preparation method thereof

Publications (1)

Publication Number Publication Date
CN111063695A true CN111063695A (en) 2020-04-24

Family

ID=70300392

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911257825.0A Pending CN111063695A (en) 2019-12-10 2019-12-10 Display panel and preparation method thereof

Country Status (3)

Country Link
US (1) US20210335968A1 (en)
CN (1) CN111063695A (en)
WO (1) WO2021114368A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420784A (en) * 2020-11-05 2021-02-26 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel
CN112968031A (en) * 2021-02-02 2021-06-15 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel
WO2021232532A1 (en) * 2020-05-19 2021-11-25 武汉华星光电半导体显示技术有限公司 Array substrate and method for manufacturing same
CN113707693A (en) * 2021-08-13 2021-11-26 深圳市华星光电半导体显示技术有限公司 Organic light emitting diode pixel structure and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752439A (en) * 2015-01-05 2015-07-01 上海天马有机发光显示技术有限公司 Array substrate, display device and array substrate manufacturing method
CN105629598A (en) * 2016-03-11 2016-06-01 深圳市华星光电技术有限公司 FFS mode array substrate and manufacturing method
CN109273498A (en) * 2018-09-25 2019-01-25 京东方科技集团股份有限公司 A kind of array substrate and preparation method thereof, display panel, display device
CN109378326A (en) * 2018-09-21 2019-02-22 深圳市华星光电半导体显示技术有限公司 Display panel and preparation method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7456911B2 (en) * 2000-08-14 2008-11-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN105826248A (en) * 2016-03-11 2016-08-03 深圳市华星光电技术有限公司 FFS-mode type array substrate and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104752439A (en) * 2015-01-05 2015-07-01 上海天马有机发光显示技术有限公司 Array substrate, display device and array substrate manufacturing method
CN105629598A (en) * 2016-03-11 2016-06-01 深圳市华星光电技术有限公司 FFS mode array substrate and manufacturing method
CN109378326A (en) * 2018-09-21 2019-02-22 深圳市华星光电半导体显示技术有限公司 Display panel and preparation method thereof
CN109273498A (en) * 2018-09-25 2019-01-25 京东方科技集团股份有限公司 A kind of array substrate and preparation method thereof, display panel, display device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021232532A1 (en) * 2020-05-19 2021-11-25 武汉华星光电半导体显示技术有限公司 Array substrate and method for manufacturing same
CN112420784A (en) * 2020-11-05 2021-02-26 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel
CN112968031A (en) * 2021-02-02 2021-06-15 深圳市华星光电半导体显示技术有限公司 Array substrate, preparation method thereof and display panel
CN113707693A (en) * 2021-08-13 2021-11-26 深圳市华星光电半导体显示技术有限公司 Organic light emitting diode pixel structure and manufacturing method thereof
CN113707693B (en) * 2021-08-13 2023-12-05 深圳市华星光电半导体显示技术有限公司 Organic light-emitting diode pixel structure and manufacturing method thereof

Also Published As

Publication number Publication date
WO2021114368A1 (en) 2021-06-17
US20210335968A1 (en) 2021-10-28

Similar Documents

Publication Publication Date Title
US9356052B2 (en) Thin film transistor with integrated connecting portion
CN111063695A (en) Display panel and preparation method thereof
US9449998B2 (en) Manufacturing method of pixel structure with data line, scan line and gate electrode formed on the same layer
US8183097B2 (en) Thin-film transistor substrate and method of manufacturing the same
US10770531B2 (en) Organic light emitting unit, method for manufacturing thereof and display panel
WO2020200168A1 (en) Amoled display screen, display device and mobile terminal
US8405788B2 (en) TFT-LCD array substrate and manufacturing method thereof
KR20100091123A (en) Display device
CN113471257B (en) Display panel and mobile terminal
US20160005772A1 (en) Array substrate, manufacturing method thereof, and display device
CN110908199A (en) Array substrate and liquid crystal display panel
US9230995B2 (en) Array substrate, manufacturing method thereof and display device
CN110931510B (en) Array substrate, display panel and preparation method of array substrate
CN110660813A (en) OLED panel and manufacturing method thereof
US10361261B2 (en) Manufacturing method of TFT substrate, TFT substrate, and OLED display panel
CN109659322B (en) Array substrate and preparation method thereof
CN111276527A (en) Display panel and manufacturing method thereof
KR20120043404A (en) Display apparatus and method of manufacturing the same
CN113629072A (en) Array substrate, preparation method thereof and display panel
KR20050029826A (en) Fpd and method of fabricating the same
CN111312732B (en) Display panel, manufacturing method thereof, display module and electronic device
CN114464656A (en) Display panel, manufacturing method and display device
CN109742102B (en) Display panel and manufacturing method thereof
US20200098792A1 (en) Array substrate, manufacturing method of the array substrate, and display panel
KR101224049B1 (en) Method of fabricating liquid crystal display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20200424