CN111048532B - 阵列基板、其制作方法及显示面板 - Google Patents
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- 239000000758 substrate Substances 0.000 title claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 45
- 230000004888 barrier function Effects 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000002161 passivation Methods 0.000 claims abstract description 22
- 229920002120 photoresistant polymer Polymers 0.000 claims description 18
- 238000000059 patterning Methods 0.000 claims description 15
- 238000009413 insulation Methods 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 16
- 230000007547 defect Effects 0.000 abstract description 9
- 239000010408 film Substances 0.000 description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- 239000010409 thin film Substances 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 239000000463 material Substances 0.000 description 8
- 238000004544 sputter deposition Methods 0.000 description 8
- 238000005240 physical vapour deposition Methods 0.000 description 5
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 229910052738 indium Inorganic materials 0.000 description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 238000005507 spraying Methods 0.000 description 4
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- 150000003863 ammonium salts Chemical class 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 235000006408 oxalic acid Nutrition 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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Abstract
本发明涉及显示技术领域,公开了一种阵列基板、其制作方法及显示面板,所述阵列基板的制作方法包括以下步骤:提供基板,并在所述基板上依次形成栅极、栅极绝缘层、有源层薄膜以及在所述栅极上方的图案化刻蚀阻挡层;在所述刻蚀阻挡层上形成图案化源漏极;以图案化的所述源漏极为掩膜对所述有源层薄膜进行刻蚀以形成有源层,而使所述源漏极与所述有源层中远离所述刻蚀阻挡层的外侧边缘,自我对准;以及,在所述源漏极上依次形成钝化层和图案化的像素电极,以形成所述阵列基板。本发明减少了一次掩膜工艺,简化了工艺流程,避免了有源层形成过程中表面受损,降低有源层与ESL之间层界面缺陷,从而提升显示面板的显示品质。
Description
技术领域
本发明涉及显示技术领域,具体涉及一种阵列基板、其制作方法及显示面板。
背景技术
目前,液晶显示面板(LCD,Liquid Crystal Display)和电致发光(EL,electroluminescence)显示面板等显示装置已广泛地进入到人们的生活中。在这些显示装置中,薄膜晶体管(TFT,Thin Film Transistor)起着控制各像素开关的作用。其中金属氧化物TFT因其具有大尺寸、高帧率处理能力和在可见光范围内穿透率高等显著优点,而在有源矩阵液晶显示(AMLCD)和有源矩阵有机电致发光二极管(AMOLED)等领域具有广阔的应用前景。
其中刻蚀阻挡型金属氧化物TFT有刻蚀阻挡层(ESL)的保护,因而呈现出较好的稳定性,已实现量产。然而刻蚀阻挡型金属氧化物TFT虽然避免了源/漏极背沟道刻蚀对有源层的损伤,但是所用Mask较多,且有源层与ESL层界面缺陷并未改善。
故如何避免有源层表面受损,降低有源层与ESL层界面缺陷,从而提升显示装置的显示品质,是本领域技术人员亟待解决的技术问题。
发明内容
为解决上述技术问题,本发明提供了一种阵列基板、其制作方法及显示面板。
一方面,本发明提供了一种阵列基板的制作方法,所述方法包括以下步骤:
提供基板,并在所述基板上依次形成栅极、栅极绝缘层、有源层薄膜以及在所述栅极上方的图案化刻蚀阻挡层;
在所述刻蚀阻挡层上形成图案化源漏极;
以图案化的所述源漏极为掩膜对所述有源层薄膜进行刻蚀以形成有源层,而使所述源漏极与所述有源层中远离所述刻蚀阻挡层的外侧边缘,自我对准;以及,
在所述源漏极上依次形成钝化层和图案化的像素电极,以形成所述阵列基板。
根据本发明的一优选实施例,所述步骤还包括:形成所述栅极的同时,还形成第一电极。
根据本发明的一优选实施例,所述有源层薄膜的材料包括IGZO、IGZTO和IZO中的至少一种。
根据本发明的一优选实施例,所述步骤还包括:
在所述有源层薄膜上形成刻蚀阻挡层薄膜;
对所述刻蚀阻挡层薄膜进行图案化以形成所述刻蚀阻挡层。
根据本发明的一优选实施例,所述步骤还包括:形成所述源漏极的同时,还形成第二电极。
根据本发明的一优选实施例,所述步骤还包括:
在所述源漏极上形成钝化层薄膜;
对所述钝化层薄膜进行图案化处理,包括形成第一过孔和第二过孔,其中,所述第一过孔暴露漏极部分上表面,所述第二过孔暴露所述第一电极部分上表面;以及,
在钝化层上形成像素电极薄膜,进行图案化处理以形成断续的所述像素电极,其中,所述像素电极通过第一过孔与所述漏极搭接,并通过所述第二过孔与所述第一电极搭接。
另一方面,本发明提供了一种阵列基板,包括:
基板;
栅极,设置于所述基板上;
栅极绝缘层,设置于所述基板上,并覆盖所述栅极;
有源层,设置于所述栅极绝缘层上;
刻蚀阻挡层,设置于所述栅级上方的所述有源层上;
源漏极,设置于所述刻蚀阻挡层上,并与所述有源层中远离所述刻蚀阻挡层的外侧边缘,自我对准;
钝化层,设置于所述源漏极上,并覆盖所述有源层和部分所述源漏极;以及,
像素电极,设置于所述钝化层上。
根据本发明的一优选实施例,所述阵列基板还包括:
第一电极,设置于所述基板上;
第二电极,设置于所述有源层上。
根据本发明的一优选实施例,所述阵列基板还包括:
所述钝化层包括第一过孔和第二过孔,所述第一过孔暴露漏极部分上表面,所述第二过孔暴露所述第一电极部分上表面;
所述像素电极通过所述第一过孔与所述漏极搭接,并通过所述第二过孔与所述第一电极搭接。
再一方面,本发明提供了一种显示面板,所述显示面板包括前述的阵列基板。
本发明的有益效果为:本发明提供的阵列基板的制作方法在形成有源层时不使用掩膜板,在图案化形成源漏极后,先不剥离源漏极上的光刻胶,以图案化后的源漏极为掩膜对有源层薄膜进行刻蚀以形成有源层,从而使得源漏极与有源层在远离刻蚀阻挡层的外侧边缘,自我对准。本发明减少了一次形成有源层的掩膜工艺,简化了工艺流程,且避免了有源层形成过程中光刻胶涂覆、刻蚀及光刻胶剥离对有源层表面的损伤,降低了有源层与刻蚀阻挡层之间层界面缺陷,从而提升显示面板的显示品质。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明提供的阵列基板的制作方法流程框图;
图2a至2g为本发明提供的阵列基板制作方法流程示意图。
具体实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的阵列基板中刻蚀阻挡型TFT的有源层表面受损,从而导致有源层与刻蚀阻挡层之间层界面缺陷严重,进而影响显示面板显示品质,本发明实施例用以解决该问题。
如图1和图2a至2g所示,本发明的一实施例提供一种阵列基板的制作方法,该方法包括以下步骤:在步骤S1中,提供基板101,并在所述基板101上依次形成栅极201、栅极绝缘层301、有源层薄膜401以及在所述栅极201上方的图案化刻蚀阻挡层502;在步骤S2中,在所述刻蚀阻挡层502上形成图案化源漏极602、603;在步骤S3中,以图案化的所述源漏极602、603为掩膜对所述有源层薄膜401进行刻蚀以形成有源层402,而使所述源漏极602、603与所述有源层402中远离所述刻蚀阻挡层502的外侧边缘,自我对准;在步骤S4中,在所述源漏极602、603上依次形成钝化层701和图案化的像素电极801,以形成所述阵列基板。
具体地,如图2a至2b所示,制作所述阵列基板时,首先需要在基板101上通过喷涂、溅射等方式形成第一金属层(图中未示出)。在本发明的一实施例中,所述基板101可以为玻璃,所述第一金属层通过物理气相(PVD)溅射形成。所述第一金属层的材料可以为钼(Mo)或钼铜合金。所述第一金属层经图案化处理形成所述栅极201和第一电极202,图案化处理完成后,剥离剩余的光刻胶。其中,在图案化处理过程中,可采用的蚀刻剂可以为H2O2系蚀刻剂或者铵盐类蚀刻剂。
所述第一金属层图案化处理完成后,通过化学气相法在所述栅极201和所述第一电极202上形成所述栅极绝缘层301,所述栅极绝缘层的材料可以为氧化硅(SiOx)或氮化硅与氧化硅(SiNx+SiOx)的叠层。
随后通过喷涂、溅射等方式在所述栅极绝缘层301上形成所述有源层薄膜401。作为新型半导体材料的氧化铟镓锌(IGZO)、氧化铟镓锌锡(IGZTO)和氧化铟锌(IZO),有着比非晶硅(a-Si)更高的电子迁移率和开态电流,因而被广泛应用到显示行业TFT器件中。在本发明的一实施例中,所述有源层薄膜401的材料包括氧化铟镓锌(IGZO)、氧化铟镓锌锡(IGZTO)和氧化铟锌(IZO)中的至少一种,所述有源层薄膜401通过PVD溅射形成后,并经退火处理。
在所述有源层薄膜401上利用化学气相沉积法形成所述刻蚀阻挡层薄膜501,所述刻蚀阻挡层薄膜501的材料可以为氧化硅(SiOx)或氮化硅与氧化硅(SiNx+SiOx)的叠层。
如图2c所示,对所述刻蚀阻挡层薄膜501进行图案化处理,以形成所述刻蚀阻挡层502。其中,对所述刻蚀阻挡层薄膜501的图案化处理,可采用氟气(F2)、氯气(Cl2)等氧化性气体形成电浆的干法刻蚀工艺实现。
如图2d所示,在所述刻蚀阻挡层502上,通过喷涂、溅射等方式形成第二金属层601。在本发明的一实施例中,所述第一金属层通过PVD溅射形成。所述第一金属层的材料可以为钼(Mo)或钼铜合金。
如图2e所示,所述第二金属层601经图案化处理形成所述源极602、所述漏极603和所述第二电极604,图案化处理完成后,先不剥离所述源极602和所述漏极603上的光刻胶,保留光刻胶并以图案化后的所述源极602和所述漏极603为掩膜对所述有源层薄膜401进行刻蚀以形成所述有源层402,从而使得所述源极602和所述漏极603与所述有源层402在栅极扫描线方向上远离所述刻蚀阻挡层502的外侧边缘,自我对准。
在本发明的实施例中,采用光刻胶、图案化的所述源极602和所述漏极603作为掩膜对所述有源层薄膜401进行刻蚀,不仅在所述阵列基板的制程中减少了一道掩模,同时由于光阻的存在,在一定程度上避免了刻蚀所述有源层薄膜401时对所述源极602和所述漏极603的表面造成损伤,且所述第二金属层601与所述有源层薄膜401进行连续刻蚀,保护了所述有源层402的表面不受光刻胶涂覆、刻蚀以及光刻胶剥离过程中药液的侵蚀及破坏进而导致的界面缺陷严重,保证了沟道区域所述有源层402与所述刻蚀阻挡层502之间层界面缺陷最低,更好地体现刻蚀阻挡型TFT的优越性,进而提升显示装置的显示品质。
进一步地,所述有源层402可通过干法刻蚀或者采用草酸系蚀刻剂进行湿法刻蚀实现。采用干法刻蚀时,可通过调整刻蚀选择比主要对所述有源层薄膜401进行刻蚀,减小对所述刻蚀阻挡层502表面的损伤。
当形成图案化的所述有源层402时,再将所述源极602和所述漏极603之上的光刻胶剥离。
如图2f所示,在所述源极602和所述漏极603上通过化学气相法沉积形成所述钝化层薄膜(图中未示出),所述钝化层薄膜的材料可以为氧化硅(SiOx)或氮化硅与氧化硅(SiNx+SiOx)的叠层。
对所述钝化层薄膜进行图案化处理,形成所述钝化层701,包括形成所述第一过孔702和所述第二过孔703。其中,所述第一过孔702暴露所述漏极603部分上表面,所述第二过孔703包括贯穿所述栅极绝缘层301,并暴露所述第一电极202部分上表面。
所述钝化层薄膜的图案化处理可通过采用氟气(F2)、氯气(Cl2)等氧化性气体形成电浆的干法刻蚀工艺实现。
如图2g所示,在所述钝化层701上通过喷涂、溅射等方式形成所述像素电极薄膜(图中未示出)。在本发明一实施例中,通过PVD溅射在所述钝化层701上形成所述像素电极薄膜,所述像素电极薄膜的材料为氧化铟锡(ITO)。
对所述像素电极薄膜进行图案化处理,以形成断续的所述像素电极801,其中,所述像素电极801通过所述第一过孔702与所述漏极603搭接,并通过所述第二过孔703与所述第一电极202搭接。
进一步地,所述第一电极202通过所述像素电极801与所述第二电极604形成电容。在扇出区以共通电极(图中未示出)与所述像素电极801搭接,最终通过成盒制程中框胶中的金球而实现对彩膜基板一侧的像素电极施加电压。
本发明还提供了一种由上述方法制得的阵列基板,以及包括所述的阵列基板的显示面板。
根据以上实施例可知:本发明实施例提供的阵列基板及其制作方法,采用光刻胶、图案化的所述源极602和所述漏极603作为掩膜对所述有源层薄膜401进行刻蚀,从而使得所述源极602、所述漏极603与所述有源层402在远离所述刻蚀阻挡层502的外侧边缘,自我对准。本发明实施例提供的阵列基板的制作方法减少了一道掩模,简化了工艺流程,同时由于光刻胶的存在,在一定程度上避免了刻蚀所述有源层薄膜401时对所述源极602和所述漏极603的表面造成损伤,且所述第二金属层601与所述有源层薄膜401进行连续刻蚀,保护了所述有源层402的表面不受光刻胶涂覆、刻蚀以及光刻胶剥离过程中药液的侵蚀及破坏进而导致的界面缺陷严重,保证了沟道区域所述有源层402与所述刻蚀阻挡层502之间层界面缺陷最低,进而提升显示装置的显示品质。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。
Claims (5)
1.一种阵列基板的制作方法,其特征在于,所述方法包括以下步骤:
提供基板,并在所述基板上依次形成栅极、第一电极、栅极绝缘层、有源层薄膜以及在所述栅极上方的图案化刻蚀阻挡层,第一电极与所述栅极同层设置;
在所述刻蚀阻挡层上形成图案化源漏极和第二电极,并保留所述源漏极上的光刻胶;
以所述光刻胶、图案化的所述源漏极为掩膜对所述有源层薄膜进行刻蚀以形成有源层,并剥离所述光刻胶,而使所述源漏极与所述有源层中远离所述刻蚀阻挡层的外侧边缘,自我对准;以及,
在所述源漏极上形成钝化层薄膜;
对所述钝化层薄膜进行图案化处理,包括形成第一过孔和第二过孔,其中,所述第一过孔暴露漏极部分上表面,所述第二过孔暴露所述第一电极部分上表面;以及,
在钝化层上形成像素电极薄膜,进行图案化处理以形成断续的像素电极,其中,所述像素电极通过第一过孔与所述漏极搭接,并通过所述第二过孔与所述第一电极搭接,所述第一电极通过所述像素电极与所述第二电极形成电容,以形成所述阵列基板。
2.根据权利要求1所述的阵列基板的制作方法,其特征在于,所述有源层薄膜的材料包括IGZO、IGZTO和IZO中的至少一种。
3.根据权利要求1所述的阵列基板的制作方法,其特征在于,所述步骤还包括:
在所述有源层薄膜上形成刻蚀阻挡层薄膜;
对所述刻蚀阻挡层薄膜进行图案化以形成所述刻蚀阻挡层。
4.一种阵列基板,其特征在于,所述阵列基板包括:
基板;
栅极,设置于所述基板上;
第一电极,设置于所述基板上;
栅极绝缘层,设置于所述基板上,并覆盖所述栅极;
有源层,设置于所述栅极绝缘层上;
刻蚀阻挡层,设置于所述栅极 上方的所述有源层上;
第二电极,设置于所述有源层上;
源漏极,设置于所述刻蚀阻挡层上,并与所述有源层中远离所述刻蚀阻挡层的外侧边缘,自我对准;
钝化层,设置于所述源漏极上,并覆盖所述有源层和部分所述源漏极;以及,
像素电极,设置于所述钝化层上;
所述钝化层包括第一过孔和第二过孔,所述第一过孔暴露漏极部分上表面,所述第二过孔暴露所述第一电极部分上表面;
所述像素电极通过所述第一过孔与所述漏极搭接,并通过所述第二过孔与所述第一电极搭接;所述第一电极通过所述像素电极与所述第二电极形成电容。
5.一种显示面板,其特征在于,所述显示面板包括权利要求4所述的阵列基板。
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