CN111035384A - Circuit structure applied to electroencephalogram signal acquisition and stimulation - Google Patents
Circuit structure applied to electroencephalogram signal acquisition and stimulation Download PDFInfo
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- CN111035384A CN111035384A CN201911343120.0A CN201911343120A CN111035384A CN 111035384 A CN111035384 A CN 111035384A CN 201911343120 A CN201911343120 A CN 201911343120A CN 111035384 A CN111035384 A CN 111035384A
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/24—Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
- A61B5/316—Modalities, i.e. specific diagnostic methods
- A61B5/369—Electroencephalography [EEG]
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/24—Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof
- A61B5/316—Modalities, i.e. specific diagnostic methods
- A61B5/369—Electroencephalography [EEG]
- A61B5/377—Electroencephalography [EEG] using evoked responses
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/72—Signal processing specially adapted for physiological signals or for diagnostic purposes
- A61B5/7225—Details of analog processing, e.g. isolation amplifier, gain or sensitivity adjustment, filtering, baseline or drift compensation
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Abstract
The invention belongs to the technical field of integrated circuits, and particularly discloses a circuit structure applied to electroencephalogram signal acquisition and stimulation, which comprises a reference unit, a low-voltage-difference linear voltage stabilizer, a multi-electrode multiplexing analog front end, a multi-electrode multiplexing stimulation circuit, a multiplexer, an analog-to-digital converter and a logic control unit, wherein the reference unit is connected with the low-voltage-difference linear voltage stabilizer through a bus; the multi-electrode multiplexing analog front end comprises a low noise amplifier, a filter, a low power consumption instrument amplifier and a low power consumption comparator/buffer (multiplexing) circuit; the multiplexer comprises a stimulator and an H-bridge switch; the system can complete the functions of electroencephalogram signal acquisition and quantification, electrode stimulation, impedance detection, overcurrent protection and the like, is optimized for low power consumption, and can effectively reduce the power consumption overhead of the system.
Description
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a circuit structure applied to electroencephalogram signal acquisition and stimulation.
Background
With the development of the integrated circuit industry, more and more chips are used in the fields of biological medicine and the like which are closely related to human beings, especially in the aspect of disease treatment, wearable and implantable products can provide a great deal of useful information for doctors and patients; however, in the field of disease treatment related to electroencephalogram signals, a discrete chip is a main system implementation form, a brain-computer interface system with high integration level is lacked, and meanwhile, the power consumption of the system is large, so that the requirements of the biomedical field on the system are difficult to meet.
Disclosure of Invention
In order to solve the above problems, the present invention provides a circuit structure for electroencephalogram signal acquisition and stimulation, which is characterized in that the circuit structure comprises a reference unit, a low-dropout linear regulator, a multi-electrode multiplexing analog front end, a multi-electrode multiplexing stimulation circuit, a multiplexer, an analog-to-digital converter and a logic control unit; the multi-electrode multiplexing analog front end comprises a low-noise amplifier, a filter, a low-power consumption instrument amplifier and a low-power consumption comparator/buffer; the multiplexer comprises a stimulator and an H-bridge switch;
the output end of the reference unit is connected with the input end of the low-dropout linear regulator;
the output end of the low dropout linear regulator is connected with the power ends of the analog-to-digital converter, the low noise amplifier, the filter, the low power consumption instrument amplifier, the low power consumption comparator/buffer, the multiplexer and the logic control unit;
the output end of the low-noise amplifier is connected with the input end of the filter;
the output end of the filter is connected with one input end of the multiplexer;
the output end of the multiplexer is connected with the input end of the analog-to-digital converter;
the output end of the analog-to-digital converter is connected with the logic control unit;
the output end of the low-power consumption instrument amplifier is connected with the input end of the low-power consumption comparator/buffer;
the output end of the low-power consumption comparator/buffer is connected with the other input end of the multiplexer;
the output end of the stimulator is connected with the H-bridge switch.
As a further explanation of the above scheme, the low noise amplifier adopts a dc coupling or ac coupling structure and a chopper self-stabilization structure is built in.
As a further illustration of the above scheme, the filter is a 3 rd order filter based on salen-key.
The invention has the beneficial effects that:
(1) the invention realizes an integrated brain-computer interface circuit, and simultaneously comprises a signal acquisition amplifying and quantizing circuit, a stimulating circuit and a state control circuit, thereby greatly reducing the area overhead of the system.
(2) The invention adopts a multi-electrode multiplexing technology, is assisted by a low-power consumption path and a pre-judgment technology, and greatly reduces the power consumption of an analog front end and a subsequent digital circuit.
Drawings
FIG. 1: a circuit structure block diagram applied to electroencephalogram signal acquisition and stimulation;
description of reference numerals:
reference cell I1; the low dropout linear regulator I2; an analog-to-digital converter I3; a low noise amplifier I4; a filter I5; a low power consumption instrumentation amplifier I6; a low power comparator/buffer I7; a multiplexer I8; a logic control unit I9; stimulator I10.
Detailed Description
The invention will be further described with reference to fig. 1 and the following detailed description.
Example 1:
the circuit structure applied to electroencephalogram signal acquisition and stimulation provided by the embodiment is characterized by comprising a reference unit I1, a low-dropout linear regulator I2, a multi-electrode multiplexing analog front end, a multi-electrode multiplexing stimulation circuit, a multiplexer I8, an analog-to-digital converter I3 and a logic control unit I9; the multi-electrode multiplexing analog front end comprises a low noise amplifier I4, a filter I5, a low power consumption instrument amplifier I6 and a low power consumption comparator/buffer (multiplexing) I7; the multiplexer I8 comprises a stimulator I10 and an H bridge switch;
the reference unit I1 provides a reference voltage for the low dropout regulator I2, and the low dropout regulator I2 provides a stable, low-noise and low-ripple high-quality power supply voltage for an internal low-voltage circuit; the multi-electrode multiplexing analog front end can collect and amplify electroencephalogram signals, and the module is multi-electrode multiplexing; the multi-electrode multiplexing stimulation circuit can perform polarity-variable self-customized stimulation on the electrodes; multiplexer I8 is capable of polling the select electrode signal; the analog-to-digital converter I3 is a 16-bit analog-to-digital converter I3 for quantizing the last bit for multiple times; the logic control unit I9 controls the modules of the circuit to switch the system state.
The connection relationship is as follows: the output of the reference unit I1 is a reference voltage, and the output end of the reference unit I1 is connected with the input end of the low dropout linear regulator I2; the low dropout linear regulator I2 is a power supply of the circuit, the output end of the low dropout linear regulator is connected with the power supply ends of an analog-to-digital converter I3, a low noise amplifier I4, a filter I5, a low power consumption path circuit, a multiplexer I8 and a logic control unit I9, and a decoupling capacitor is required to be led out to the external connection; electroencephalogram signals are input from electrodes (Elec _ Aref-Elec _ B4), are input to the input end of a low-noise amplifier I4 after being switched on and switched off, and the output end of the low-noise amplifier I4 is connected with the input end of a filter I5; the output end of the filter I5 is connected with one input end of a multiplexer I8; the output end of the multiplexer I8 is connected with the input end of an analog-to-digital converter I3; the output end of the analog-to-digital converter I3 is connected with a logic control unit I9 for simple logic processing; in the low power consumption mode, the electroencephalogram signal is input to the input end of a low power consumption instrument amplifier I6, and the output end of a low power consumption instrument amplifier I6 is connected with the input end of a low power consumption comparator/buffer I7; the low-power consumption comparator/buffer I7 is used as a buffer, and the output end of the low-power consumption comparator/buffer I7 is connected with the other input end of the multiplexer I8; in fig. 1, channels B and a are identical, and their inputs are also connected to multiplexer I8, which is selected and quantized by the ADC; the output end of the stimulator I10 is connected with a bridge switch H, and any electrode can be selected to be stimulated.
Example 2:
on the basis of the embodiment 1, the low-noise amplifier I4 adopts a direct-current coupling or alternating-current coupling structure, is internally provided with a chopping self-stabilizing structure, can effectively eliminate low-frequency noise, has variable gain, and can be flexibly configured according to the needs of users; the filter I5 adopts a 3 rd order filter I5 based on salen-key, which can adjust the low-pass cut-off frequency and can be flexibly adjusted according to the frequency band of interest of a user.
In this embodiment, each pair of electrodes corresponds to one analog front-end channel, but in order to save power consumption, the circuit adopts a multi-electrode multiplexing technology, and through the control of a switch, the analog front end is time-division multiplexed.
Because the time proportion occupied by the disease attack is small, the power consumption is large in all time periods, amplification filtering with high acquisition quality consumes a large amount of power, the circuit also adopts a low-power consumption path and a pre-judgment technology, the low-power consumption instrument amplifier I6 has lower power consumption but larger noise compared with a main operational amplifier, can carry out rough signal acquisition and amplification, and is connected with a low-power consumption comparator/buffer I7 at the rear end, and the main path can be realized only when the electroencephalogram signal exceeds a threshold set by a user.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or applied directly or indirectly to other related technical fields, are included in the scope of the present invention.
Claims (3)
1. A circuit structure applied to electroencephalogram signal acquisition and stimulation is characterized by comprising a reference unit, a low-dropout linear regulator, a multi-electrode multiplexing analog front end, a multi-electrode multiplexing stimulation circuit, a multiplexer, an analog-to-digital converter and a logic control unit; the multi-electrode multiplexing analog front end comprises a low noise amplifier, a filter, a low power consumption instrument amplifier and a low power consumption comparator/buffer; the multiplexer comprises a stimulator and a bridge switch;
the output end of the reference unit is connected with the input end of the low-dropout linear regulator;
the output end of the low dropout linear regulator is connected with the power ends of the analog-to-digital converter, the low noise amplifier, the filter, the low power consumption instrument amplifier, the low power consumption comparator/buffer, the multiplexer and the logic control unit;
the output end of the low-noise amplifier is connected with the input end of the filter;
the output end of the filter is connected with one input end of the multiplexer;
the output end of the multiplexer is connected with the input end of the analog-to-digital converter;
the output end of the analog-to-digital converter is connected with the logic control unit;
the output end of the low-power consumption instrument amplifier is connected with the input end of the low-power consumption comparator;
the output end of the low-power consumption comparator is connected with the other input end of the multiplexer;
the output end of the stimulator is connected with the H-bridge switch.
2. The circuit structure for electroencephalogram signal acquisition and stimulation according to claim 1, wherein the low-noise amplifier adopts a direct-current coupling or alternating-current coupling structure and a chopping self-stabilization structure is arranged inside.
3. The circuit structure for electroencephalogram signal acquisition and stimulation of claim 2, wherein the filter is a 3 rd order filter based on salen-key.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911343120.0A CN111035384A (en) | 2019-12-23 | 2019-12-23 | Circuit structure applied to electroencephalogram signal acquisition and stimulation |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911343120.0A CN111035384A (en) | 2019-12-23 | 2019-12-23 | Circuit structure applied to electroencephalogram signal acquisition and stimulation |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114224366A (en) * | 2021-11-15 | 2022-03-25 | 深圳先进技术研究院 | Chip compatible with nerve signal measurement and stimulation functions and brain-computer interface equipment |
| CN114795249A (en) * | 2022-03-30 | 2022-07-29 | 上海脑虎科技有限公司 | Brain-computer interface front-end device and brain electrode system |
-
2019
- 2019-12-23 CN CN201911343120.0A patent/CN111035384A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114224366A (en) * | 2021-11-15 | 2022-03-25 | 深圳先进技术研究院 | Chip compatible with nerve signal measurement and stimulation functions and brain-computer interface equipment |
| CN114224366B (en) * | 2021-11-15 | 2024-04-09 | 深圳先进技术研究院 | Chip compatible with nerve signal measurement and stimulation functions and brain-computer interface device |
| CN114795249A (en) * | 2022-03-30 | 2022-07-29 | 上海脑虎科技有限公司 | Brain-computer interface front-end device and brain electrode system |
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