CN111030622A - Two-dimensional distributed high-gain traveling wave power amplifier - Google Patents
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Abstract
The invention discloses a two-dimensional distributed high-gain traveling wave power amplifier, which comprises an input power distribution network, a first input artificial transmission line, a second input artificial transmission line, a first high-gain three-stack self-adaptive amplification network, a second high-gain three-stack self-adaptive amplification network, a third high-gain three-stack self-adaptive amplification network, a fourth high-gain three-stack self-adaptive amplification network, a drain electrode offset and load network and an output two-dimensional artificial transmission line network.
Description
Technical Field
The invention relates to the field of field effect transistor radio frequency power amplifiers and integrated circuits, in particular to a two-dimensional distributed high-gain traveling wave power amplifier applied to a transmitting module at the tail end of a radio frequency microwave transceiver.
Background
With the rapid development of wireless communication systems and rf microwave circuits, rf front-end transceivers are also developing in the direction of high performance, high integration, and low power consumption. Therefore, the rf and microwave power amplifiers of the transmitter are urgently required to have high output power, high gain, high efficiency, low cost and other performances in the market, and the integrated circuit is a key technology expected to meet the market demand. However, when the integrated circuit process design is adopted to realize the chip circuit of the radio frequency and microwave power amplifier, the performance and the cost are limited to a certain extent, and the method mainly comprises the following steps:
(1) the broadband high gain amplification capability is limited: the traditional single transistor is influenced by a gain-bandwidth product, and the ultra-wideband amplification capability can be obtained only by sacrificing gain, so that the high-gain amplification capability of the wideband is severely limited.
(2) The broadband high power amplification capability is limited: the characteristic frequency of transistors in semiconductor processes is higher and higher, thereby bringing about low breakdown voltage and limiting the power capacity of a single transistor. In order to obtain high power capability, multi-transistor power synthesis is often required, but the efficiency of the power amplifier is low due to energy loss of a multi-synthesis network, and the circuit cannot meet the requirements of low power consumption or green communication.
The circuit structure of the common ultra-wideband high-power amplifier is many, most typically the conventional distributed amplifier, but it is difficult for the conventional distributed amplifier to satisfy the requirements of various parameters at the same time, mainly because:
① in the traditional distributed power amplifier, the core amplifying circuit is realized by a distributed amplifying arrangement of a plurality of single transistors, because the single transistors are affected by parasitic parameters, the power gain of the single transistors will be significantly reduced and the power characteristics will be significantly deteriorated as the working frequency increases, therefore, in order to obtain an ultra-wideband flat amplifying structure, the low frequency gain must be sacrificed to balance the high frequency loss, resulting in the ultra-wideband gain of the traditional distributed amplifier being very low;
② in order to improve the amplifier gain and isolation, it is also possible to use a Cascode two-transistor distributed amplification structure, but although Cascode two-transistor increases circuit isolation, it is not possible to achieve a tendency that gain is significantly deteriorated with frequency, and it is also not possible to achieve optimum impedance matching between Cascode two-transistors, thereby reducing output power characteristics.
Therefore, the design difficulty of the ultra-wideband radio frequency power amplifier based on the integrated circuit process is as follows: the high power output difficulty under the ultra-wide band is large; there are many limitations to the conventional single transistor structure or the distributed amplification structure of the Cascode transistor.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a two-dimensional distributed high-gain traveling wave power amplifier, which combines a three-stack adaptive amplification network technology and a two-dimensional traveling wave amplification technology and has the advantages of wide band, high power, high gain, low cost, simple power supply network and the like.
The technical scheme for solving the technical problems is as follows: a two-dimensional distributed high-gain traveling wave power amplifier is characterized by comprising an input power dividing network, a first input artificial transmission line, a second input artificial transmission line, a first high-gain three-stack adaptive amplification network, a second high-gain three-stack adaptive amplification network, a third high-gain three-stack adaptive amplification network, a fourth high-gain three-stack adaptive amplification network, a drain electrode offset and load network and an output two-dimensional artificial transmission line network;
the input end of the input power dividing network is the input end of the whole power amplifier, the first output end of the input power dividing network is connected with the input end of the first input artificial transmission line, and the second output end of the input power dividing network is connected with the input end of the second input artificial transmission line;
the first output end and the second output end of the first input artificial transmission line are respectively connected with the input ends of the first high-gain three-stack self-adaptive amplification network and the second high-gain three-stack self-adaptive amplification network, and the first output end and the second output end of the second input artificial transmission line are respectively connected with the input ends of the third high-gain three-stack self-adaptive amplification network and the fourth high-gain three-stack self-adaptive amplification network;
the output ends of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network and the fourth high-gain three-stack adaptive amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the output two-dimensional artificial transmission line network;
the output end of the drain electrode biasing and loading network is connected with the fifth input end of the output two-dimensional artificial transmission line network;
the output end of the output two-dimensional artificial transmission line network is the output end of the whole power amplifier.
The beneficial effect of above-mentioned scheme is: the three-stack self-adaptive amplification network and the two-dimensional traveling wave amplification structure adopted by the invention have ultra wide band frequency response characteristics and a simplified series voltage division structure, so that the whole power amplifier obtains good broadband, high gain, high efficiency and high power output capability, and meanwhile, the power supply network is simple and easy.
Furthermore, the input end of the input power dividing network is connected with a microstrip line TL1Microstrip line TL1Is connected with the microstrip line TL at the other end2And microstrip line TL3Microstrip line TL2The other end of the microstrip line TL is connected with the first output end of the input power dividing network3The other end of the input power dividing network is connected with a second output end of the input power dividing network;
the beneficial effects of the further scheme are as follows: the input power dividing network can realize equal power division structurally, and meanwhile, the length of the microstrip line can be adjusted according to the layout requirement of the circuit structure.
Furthermore, the input ends of the first input artificial transmission line and the second input artificial transmission line are connected with the microstrip line TLojMicrostrip line TLojThe other end of the first input artificial transmission line is connected with the first output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLpjMicrostrip line TLpjThe other end of the first input artificial transmission line or the second input artificial transmission line is connected with the second output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLqjMicrostrip line TLqjAnother end of the resistor R is connected with a resistor RgjResistance RgjIs connected with the microstrip line TL at the other endgjMicrostrip line TLgjThe other end of the capacitor is connected with a grounding capacitor CgjWherein j is 1, 2. Microstrip line TLg1And ground capacitance Cg1The connection node of (a) is further connected to a bias voltage Vg。
The beneficial effects of the further scheme are as follows: the core circuit adopted in the first to fourth high-gain three-stack self-adaptive amplification networks is a three-stack field effect transistor, so that the gain and the power capacity of the amplifier can be remarkably improved, and high efficiency and high power of circuit output are realized.
Further, an input end of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network or the fourth high-gain three-stack adaptive amplification network is connected with an inductor LpjInductance LpjThe other end of the capacitor is connected with a grounding capacitor CpjAnd an inductance LojInductance LojIs connected with the field effect transistor M at the other endpjOf a field effect transistor MpjIs grounded, field effect transistor MpjIs connected to the drain of the field effect transistor MqjSource electrode of, field effect transistor MqjThe grid of the capacitor is connected with a grounding capacitor CqjAnd a resistance RqjResistance RqjThe other end of the resistor is connected with a grounding resistor RpjAnd a resistance RrjTerminal a of (1), field effect transistor MqjIs connected to the drain of the field effect transistor MojSource electrode of, field effect transistor MojThe grid of the capacitor is connected with a grounding capacitor CojAnd a resistance RojResistance RojAnother end of the resistor R is connected with a resistor RrjTerminal b and resistor RsjResistance RsjIs connected with the field effect transistor M at the other endojAnd the drain of the first high-gain three-stack adaptive amplification network, or the second high-gain three-stack adaptive amplification network, or the third high-gain three-stack adaptive amplification network or the fourth high-gain three-stack adaptive amplification network, wherein j is 1,2, 3, 4.
The beneficial effects of the further scheme are as follows: the first input artificial transmission line and the second input artificial transmission line can realize broadband impedance matching and simultaneously ensure the good stability of the amplifier.
Furthermore, microstrip lines TL in output two-dimensional artificial transmission line networkout1Microstrip line TLout3Microstrip line TLout5Microstrip line TLout7Are connected together at the same time, microstrip line TLout1The other end of the microstrip line TL is connected with a first input end of an output two-dimensional artificial transmission line networkout3To another one ofThe end of the microstrip line TL is connected with the third input end of the two-dimensional artificial transmission line networkout5The other end of the microstrip line TL is connected with a fifth input end of an output two-dimensional artificial transmission line networkout5While the other end is connected with a microstrip line TLout2Microstrip line TLout4And microstrip line TLout6Microstrip line TLout2The other end of the microstrip line TL is connected with a second input end of the output two-dimensional artificial transmission line networkout4The other end of the microstrip line TL is connected with a fourth input end of an output two-dimensional artificial transmission line networkout6The other end of the capacitor is connected with a DC blocking capacitor Cout1Capacitor Cout1Is connected with the microstrip line TL at the other endout8Microstrip line TLout8The other end of the two-dimensional artificial transmission line network is connected with the output end of the output two-dimensional artificial transmission line network.
The beneficial effects of the further scheme are as follows: the output two-dimensional artificial transmission line network adopted by the invention can realize the power synthesis of four paths of radio frequency signals, and the artificial transmission line has the advantages of wide bandwidth, good reflection coefficient index and the like, and can ensure the broadband output power and efficiency of the amplifier.
Further, the output end of the drain electrode bias and load network is connected with a resistor Rc1And microstrip line TLc1Microstrip line TLc1Is connected with a bias voltage V at the other enddAnd a ground capacitor Cc1Resistance Rc1The other end of the capacitor is connected with a grounding capacitor Cc2。
The beneficial effects of the further scheme are as follows: the drain electrode bias and the load network adopted by the invention can ensure stable power supply and filter low-frequency clutter.
Drawings
FIG. 1 is a schematic block diagram of a power amplifier of the present invention;
fig. 2 is a circuit diagram of a power amplifier according to the present invention.
Detailed Description
Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It is to be understood that the embodiments shown and described in the drawings are merely exemplary and are intended to illustrate the principles and spirit of the invention, not to limit the scope of the invention.
The embodiment of the invention provides a two-dimensional distributed high-gain traveling wave power amplifier, which comprises an input power division network, a first input artificial transmission line, a second input artificial transmission line, a first high-gain three-stack self-adaptive amplification network, a second high-gain three-stack self-adaptive amplification network, a third high-gain three-stack self-adaptive amplification network, a fourth high-gain three-stack self-adaptive amplification network, a drain electrode offset and load network and an output two-dimensional artificial transmission line network, wherein the first input artificial transmission line is connected with the input power division network;
as shown in fig. 1, the input end of the input power dividing network is the input end of the whole power amplifier, the first output end of the input power dividing network is connected with the input end of the first input artificial transmission line, and the second output end of the input power dividing network is connected with the input end of the second input artificial transmission line;
the first output end and the second output end of the first input artificial transmission line are respectively connected with the input ends of the first high-gain three-stack self-adaptive amplification network and the second high-gain three-stack self-adaptive amplification network, and the first output end and the second output end of the second input artificial transmission line are respectively connected with the input ends of the third high-gain three-stack self-adaptive amplification network and the fourth high-gain three-stack self-adaptive amplification network;
the output ends of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network and the fourth high-gain three-stack adaptive amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the output two-dimensional artificial transmission line network;
the output end of the drain electrode biasing and loading network is connected with the fifth input end of the output two-dimensional artificial transmission line network;
the output end of the output two-dimensional artificial transmission line network is the output end of the whole power amplifier.
As shown in fig. 2, the input end of the input power dividing network is connected to the microstrip line TL1Microstrip line TL1Is connected with the microstrip line TL at the other end2And microstrip line TL3Microstrip line TL2The other end of the microstrip line TL is connected with the first output end of the input power dividing network3The other end of the first power dividing network is connected with the second end of the input power dividing networkAn output end;
the input ends of the first input artificial transmission line and the second input artificial transmission line are connected with a microstrip line TLojMicrostrip line TLojThe other end of the first input artificial transmission line is connected with the first output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLpjMicrostrip line TLpjThe other end of the first input artificial transmission line or the second input artificial transmission line is connected with the second output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLqjMicrostrip line TLqjAnother end of the resistor R is connected with a resistor RgjResistance RgjIs connected with the microstrip line TL at the other endgjMicrostrip line TLgjThe other end of the capacitor is connected with a grounding capacitor CgjWherein j is 1, 2. Microstrip line TLg1And ground capacitance Cg1The connection node of (a) is further connected to a bias voltage Vg。
The input end of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network or the fourth high-gain three-stack adaptive amplification network is connected with an inductor LpjInductance LpjThe other end of the capacitor is connected with a grounding capacitor CpjAnd an inductance LojInductance LojIs connected with the field effect transistor M at the other endpjOf a field effect transistor MpjIs grounded, field effect transistor MpjIs connected to the drain of the field effect transistor MqjSource electrode of, field effect transistor MqjThe grid of the capacitor is connected with a grounding capacitor CqjAnd a resistance RqjResistance RqjThe other end of the resistor is connected with a grounding resistor RpjAnd a resistance RrjTerminal a of (1), field effect transistor MqjIs connected to the drain of the field effect transistor MojSource electrode of, field effect transistor MojThe grid of the capacitor is connected with a grounding capacitor CojAnd a resistance RojResistance RojAnother end of the resistor R is connected with a resistor RrjTerminal b and resistor RsjResistance RsjIs connected with the field effect transistor M at the other endojThe drain electrode of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network or the fourth high-gain three-stack adaptive amplification networkAnd the output end of the gain three-stack adaptive amplification network, wherein j is 1,2, 3 and 4.
Microstrip line TL in output two-dimensional artificial transmission line networkout1Microstrip line TLout3Microstrip line TLout5Microstrip line TLout7Are connected together at the same time, microstrip line TLout1The other end of the microstrip line TL is connected with a first input end of an output two-dimensional artificial transmission line networkout3The other end of the microstrip line TL is connected with a third input end of an output two-dimensional artificial transmission line networkout5The other end of the microstrip line TL is connected with a fifth input end of an output two-dimensional artificial transmission line networkout5While the other end is connected with a microstrip line TLout2Microstrip line TLout4And microstrip line TLout6Microstrip line TLout2The other end of the microstrip line TL is connected with a second input end of the output two-dimensional artificial transmission line networkout4The other end of the microstrip line TL is connected with a fourth input end of an output two-dimensional artificial transmission line networkout6The other end of the capacitor is connected with a DC blocking capacitor Cout1Capacitor Cout1Is connected with the microstrip line TL at the other endout8Microstrip line TLout8The other end of the two-dimensional artificial transmission line network is connected with the output end of the output two-dimensional artificial transmission line network.
Output end connecting resistor R of drain electrode bias and load networkc1And microstrip line TLc1Microstrip line TLc1Is connected with a bias voltage V at the other enddAnd a ground capacitor Cc1Resistance Rc1The other end of the capacitor is connected with a grounding capacitor Cc2。
The specific working principle and process of the present invention are described below with reference to fig. 2:
radio frequency input signal through input terminal RFinThe input circuit equally divides two signals into two paths, the two paths of signals enter a first input artificial transmission line and a second input artificial transmission line, the two paths of signals simultaneously enter the input ends of a first high-gain three-stack adaptive amplification network to a fourth high-gain three-stack adaptive amplification network after impedance transformation matching is carried out on the two paths of signals through the first input artificial transmission line and the second input artificial transmission line, the two paths of signals are simultaneously output from the output ends of the first high-gain three-stack adaptive amplification network to the fourth high-gain three-stack adaptive amplification network after power amplification is carried outThen, the four signals are combined into one signal from the output end RFoutAnd (6) outputting.
Based on the circuit analysis, the difference between the two-dimensional distributed high-gain traveling wave power amplifier provided by the invention and the traditional amplifier structure based on the integrated circuit process is that the core architecture adopts a two-dimensional distributed three-stacked field effect transistor:
the three-stack field effect transistor is different from the traditional single transistor in structure, and the description is omitted;
the difference between the two-dimensional distributed three-stacked field effect transistor and the traditional distributed field effect transistor is that the traditional distributed power amplifier only has one input artificial transmission line and one output artificial transmission line, and particularly when the input impedance of a transistor is high, capacitance voltage division is often needed to realize 50-ohm matching, so that the input matching characteristic is deteriorated, the high-frequency roll-off is serious, and the gain flatness index is poor; the two-dimensional distributed three-stacked field effect transistor provided by the invention is provided with two input artificial transmission lines and a common output artificial transmission line, the two input artificial transmission lines with 100 ohms are equivalently connected in parallel, the input impedance matching is better, and meanwhile, the output matching adopts a form of the common transmission line, so that the efficiency and the power index can be obviously improved under the condition of equal power with the traditional distributed power amplifier.
In the whole two-dimensional high-gain traveling wave power amplifier, the size of a transistor and the sizes of other resistors and capacitors are determined after the gain, bandwidth, output power and other indexes of the whole circuit are comprehensively considered, and through later-stage layout design and reasonable layout, the required indexes can be better realized, and the high-power output capacity, high-power gain and good input-output matching characteristic are realized.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (6)
1. A two-dimensional distributed high-gain traveling wave power amplifier is characterized by comprising an input power dividing network, a first input artificial transmission line, a second input artificial transmission line, a first high-gain three-stack adaptive amplification network, a second high-gain three-stack adaptive amplification network, a third high-gain three-stack adaptive amplification network, a fourth high-gain three-stack adaptive amplification network, a drain electrode offset and load network and an output two-dimensional artificial transmission line network;
the input end of the input power dividing network is the input end of the whole power amplifier, the first output end of the input power dividing network is connected with the input end of a first input artificial transmission line, and the second output end of the input power dividing network is connected with the input end of a second input artificial transmission line;
the first output end and the second output end of the first input artificial transmission line are respectively connected with the input ends of the first high-gain three-stack adaptive amplification network and the second high-gain three-stack adaptive amplification network, and the first output end and the second output end of the second input artificial transmission line are respectively connected with the input ends of the third high-gain three-stack adaptive amplification network and the fourth high-gain three-stack adaptive amplification network;
the output ends of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network and the fourth high-gain three-stack adaptive amplification network are respectively connected with the first input end, the second input end, the third input end and the fourth input end of the output two-dimensional artificial transmission line network;
the output end of the drain electrode biasing and loading network is connected with the fifth input end of the output two-dimensional artificial transmission line network;
and the output end of the output two-dimensional artificial transmission line network is the output end of the whole power amplifier.
2. The two-dimensional distributed high-gain traveling-wave power amplifier according to claim 1, wherein the input end of the input power dividing network is connected with a microstrip line TL1Microstrip line TL1Is connected with the microstrip line TL at the other end2And microstrip line TL3Microstrip line TL2The other end of the microstrip line TL is connected with the first output end of the input power dividing network3And the other end of the input power dividing network is connected with a second output end of the input power dividing network.
3. The two-dimensional distributed high-gain traveling-wave power amplifier of claim 1, wherein the input ends of the first and second input artificial transmission lines are connected with a microstrip line TLojMicrostrip line TLojThe other end of the first input artificial transmission line is connected with the first output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLpjMicrostrip line TLpjThe other end of the first input artificial transmission line or the second input artificial transmission line is connected with the second output end of the first input artificial transmission line or the second input artificial transmission line and the microstrip line TLqjMicrostrip line TLqjAnother end of the resistor R is connected with a resistor RgjResistance RgjIs connected with the microstrip line TL at the other endgjMicrostrip line TLgjThe other end of the capacitor is connected with a grounding capacitor CgjWherein j is 1, 2. Microstrip line TLg1And ground capacitance Cg1The connection node of (a) is further connected to a bias voltage Vg。
4. The two-dimensional distributed high-gain traveling-wave power amplifier according to claim 1, wherein an input terminal of the first high-gain three-stack adaptive amplification network, the second high-gain three-stack adaptive amplification network, the third high-gain three-stack adaptive amplification network, or the fourth high-gain three-stack adaptive amplification network is connected with an inductor LpjInductance LpjThe other end of the capacitor is connected with a grounding capacitor CpjAnd an inductance LojInductance LojIs connected with the field effect transistor M at the other endpjOf a field effect transistor MpjIs grounded, field effect transistor MpjIs connected to the drain of the field effect transistor MqjSource electrode of, field effect transistor MqjThe grid of the capacitor is connected with a grounding capacitor CqjAnd a resistance RqjResistance RqjThe other end of the resistor is connected with a grounding resistor RpjAnd a resistance RrjTerminal a of (1), field effect transistor MqjIs connected to the drain of the field effect transistorMojSource electrode of, field effect transistor MojThe grid of the capacitor is connected with a grounding capacitor CojAnd a resistance RojResistance RojAnother end of the resistor R is connected with a resistor RrjTerminal b and resistor RsjResistance RsjIs connected with the field effect transistor M at the other endojAnd an output of the first, second, third, or fourth high-gain three-stack adaptive amplification network, wherein j is 1,2, 3, 4.
5. The two-dimensional distributed high-gain traveling-wave power amplifier according to claim 1, wherein the microstrip line TL in the output two-dimensional artificial transmission line networkout1Microstrip line TLout3Microstrip line TLout5Microstrip line TLout7Are connected together at the same time, microstrip line TLout1The other end of the microstrip line TL is connected with a first input end of the output two-dimensional artificial transmission line networkout3The other end of the microstrip line TL is connected with a third input end of the output two-dimensional artificial transmission line networkout5The other end of the microstrip line TL is connected with a fifth input end of the output two-dimensional artificial transmission line networkout5While the other end is connected with a microstrip line TLout2Microstrip line TLout4And microstrip line TLout6Microstrip line TLout2The other end of the microstrip line TL is connected with a second input end of the output two-dimensional artificial transmission line networkout4The other end of the microstrip line TL is connected with a fourth input end of the output two-dimensional artificial transmission line networkout6The other end of the capacitor is connected with a DC blocking capacitor Cout1Capacitor Cout1Is connected with the microstrip line TL at the other endout8Microstrip line TLout8The other end of the two-dimensional artificial transmission line network is connected with the output end of the output two-dimensional artificial transmission line network.
6. The two-dimensional distributed high-gain traveling-wave power amplifier according to claim 1, wherein the output terminals of the drain bias and load network are connectedConnecting resistor Rc1And microstrip line TLc1Microstrip line TLc1Is connected with a bias voltage V at the other enddAnd a ground capacitor Cc1Resistance Rc1The other end of the capacitor is connected with a grounding capacitor Cc2。
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| CN111934632A (en) * | 2020-09-27 | 2020-11-13 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband high-power amplifier |
| CN111934632B (en) * | 2020-09-27 | 2021-02-09 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband high-power amplifier |
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