CN1110162C - Precise PN code synchronizing method and device for wide-band CDMA system - Google Patents
Precise PN code synchronizing method and device for wide-band CDMA system Download PDFInfo
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Abstract
The present invention relates to a PN code precise synchronous method for a wideband CDMA system, which comprises the steps of over sampling signal reception, early sampling data forming, late sampling data forming and demodulation sampling data forming, tracking error signal generation by early sampling data and late sampling data, sampling data demodulation for obtaining demodulation data, channel estimation and hard decision of the demodulation data, tracking error signal compensation, signal low-pass filtering after the compensation; comparison of a filtered signal and a preset threshold value, and corresponding adjustment of a code piece clock. A baseband synchronous receiving demodulation device of the method is adopted and comprises an over sampler (100), a searcher (300), a controller (200), a multi-path combiner (500) and a synchronous demodulation finger peak group (400). The present invention reduces tracking jitter, decreases noise influences, andincreases the overall performance.
Description
The present invention relates to the simultaneous techniques of Wideband Code Division Multiple Access (WCDMA) in the communication field (W-CDMA) system PN sign indicating number, specifically, relate to the precise synchronization method and the synchronous receiving demodulation device of base band based on this of PN sign indicating number in Wideband Code Division Multiple Access (WCDMA) (W-CDMA) system.
Have the phenomenon of multipath transmission in mobile communication, promptly signal emits from transmitter, arrives receiver through too much transmission paths.And, can cause the multipath fading phenomenon when arriving receiver so mix at its multipath reception signal because all there are different transmission delays, different decline and different phase places in every footpath.When the transmission delay difference in each footpath during greater than the width of PN chip, use Rake receiver be merged again after RAKE receiver can this multipath signal be separated, thereby reduce decline, improve systematic function.In Wideband Code Division Multiple Access (WCDMA) (W-CDMA) system, its spreading rate is higher, and the chip width is also narrow than the chip of Narrowband CDMA (N-CDMA) system, and its multipath that can distinguish and be merged increases, thereby it is a lot of that systematic function is improved.As everyone knows, in any spread spectrum communication system, local PN sign indicating number that is produced and the PN sign indicating number in the received signal are an important step in the receiver synchronously.And the basis of realizing the rake performance optimization of Wideband Code Division Multiple Access (WCDMA) (W-CDMA) system is to realize the PN sign indicating number precise synchronization in local PN sign indicating number and the received signal.
Realize that the PN sign indicating number can adopt track loop to realize synchronously.Two kinds of PN code tracking loops the most basic are delay lock loop DLL and Dithering Loops TDL, other code tracking loop MCTL, adaptive code tracking loop ACTL of also having modification or the like, and they all are the distortion of door tracking loop sooner or later, and relevant and incoherent dual mode are all arranged.Delay lock loop DLL is a kind of distortion of phase-locked loop, and its basic composition is consistent with phase-locked loop, and promptly by phase discriminator, loop filtering and FEEDBACK CONTROL three parts are formed; Just its phase discriminators different with phase-locked loop obtain error signal by early slow correlator.Delay lock loop DLL also has relevant and incoherent dual mode, and can difference be utilize the phase information of received signal, can utilize being called of phase information relevant, and unavailable then is incoherent.
Traditional delay lock loop DLL adopts incoherent mode, is characterized in simple in structure, and phase error is extracted easily, and the technology comparative maturity.The structure of this incoherent DLL as shown in Figure 1, it comprises: multiplier 1a early late, 1b, multiplier 1c, integration zero clearing device 2a, 2b, 2c, ask squarer 4a for two, 4b, loop filter 5, summer 6, judging module 7 and the VCC voltage controlled clock generator VCCG 3 that is driven by loop error signal, wherein VCC voltage controlled clock generator VCCG 3 comprises the PN code generator.
Its concrete course of work is: the spread-spectrum signal r (t) that receives enters early multiplier 1a late respectively, among 1b and the multiplier 1c, the PN sign indicating number of three tunnel outs of phase that produced with VCC voltage controlled clock generator VCCG 3 multiplies each other, enter integration zero clearing device 2a separately then respectively, obtain despread signal among 2b and the 2c; By two branch roads above among Fig. 1 is the despread data signal of slow two branch road gained morning, through summer 6, resulting error signal is passed through loop filter 5 filtering loop noises again, the filtering error signal that obtains drives the clock phase of voltage-controlled clock generator VCCG 3 and swings forward or backward, thereby makes despread signal regularly closely follow the swing of multipath peak value; Nethermost branch road is the demodulation branch road among Fig. 1, the spread-spectrum signal of input with carry out relevantly through the PN sign indicating number of regularly adjusting, its result adjudicates demodulated output data through judging module 7 at last.
Be called " MOBILE DEMODULATOR ARCHITECTURE FOR A SPREAD SPRECTRUMMULTIPLE ACCESS COMMUNICATION SYSTEM " in name, the patent No. is US 5,764, adopted incoherent DLL to realize that the PN sign indicating number is synchronous in 687 the United States Patent (USP), because square-law detector also carries out square noise component(s) in the incoherent mode, follow the tracks of the shake reinforcement thereby make, its tracking performance is relatively poor.Though relevant DLL can address this problem, and adopt coherent manner can make signal to noise ratio improve 3dB, yet this need receiver to have precise channels to estimate that this is very difficult under the rapid fading condition than incoherent mode.Be called in name " COHERENTTRACKING APPARATUS AND METHOD FOR CDMA RECEIVER ", the patent No. is US 5,898, introduced in 665 the United States Patent (USP) and adopted relevant DLL to realize the method that the PN sign indicating number is synchronous, because the track loop function of relevant DLL has comprised search and has followed the tracks of two functions, thereby making this PN sign indicating number realize that synchronously control is too complicated, circuit is realized also relatively difficulty.
One of purpose of the present invention is to provide a kind of method of wideband CDMA system PN sign indicating number precise synchronization;
Two of purpose of the present invention is to provide a kind of synchronous receiving demodulation device of wideband CDMA system base band that adopts said method.
The method of a kind of wideband CDMA system PN sign indicating number precise synchronization of the present invention may further comprise the steps:
1. base band spread spectrum analog signal becomes digital signal through over-sampling;
2. oversampled digital signal is selected constantly in difference, formed morning, slow and demodulation three tunnel sampled datas;
3. early, slow sampled data is through the track loop of door generation sooner or later error signal;
4. demodulation sampled data obtains demodulating data through demodulating unit;
5. the demodulating data that 4. step is obtained carries out channel estimating, obtains channel estimation value, and with channel estimation value the track loop error signal that 3. demodulating data and step obtain is compensated, and obtains demodulation offset data and error compensating signal respectively; Then the demodulation offset data is carried out hard decision, resulting result and error compensating signal carry out conjugate multiplication, obtain the correction error signal;
6. the correction error signal is carried out low-pass filtering;
7. filtered correction error signal is got real part and preset gate limit value relatively, if the real part of correction error signal is then adjusted chip clock greater than threshold value;
8. export the demodulation offset data.
A kind of synchronous receiving demodulation device of base band that adopts said method, comprise A/D over-sampling device, searcher, controller and multipath combiner, it is characterized in that: whole system also comprises the synchronous demodulation unit group that is made of n the duplicate synchronous demodulation of structure unit;
The input of described A/D over-sampling device is the base-band spread-spectrum signal that receives, and the output branch is clipped to described searcher and described synchronous demodulation unit group;
Described searcher receives the signal from described A/D over-sampling device, carries out Multipath searching, and Search Results is outputed to described controller;
Described controller is responsible for the multipath from described searcher is selected between described searcher and described synchronous demodulation unit group, and selected multipath is distributed to described synchronous demodulation unit group;
Described multipath combiner receives the output result of described synchronous demodulation unit group, and will export the result and merge by the high specific principle, obtains final despread data;
Described synchronous demodulation unit group of received is carried out accurate tracking and demodulation by the signal that described A/D over-sampling device and described controller produce to the multipath signal in the sampled data, and demodulating data outputs to described multipath combiner.
Synchronous demodulation unit in the described synchronous demodulation unit group further comprises the sampling selector, correlator early, slow correlator, the demodulation correlator, the PN code generator, subtracter, first multiplier, second multiplier, loop filter, get the real part module, the thresholding comparison module, the timing generation module, frequency pilot sign extracts and channel estimation module, the 3rd multiplier, judging module, the energy computing module, thresholding is the losing lock judging module relatively, phase state register and data strobe output module;
Described sampling selector is to carrying out down-sampled from the oversampled signals of described A/D over-sampling device, produce three tunnel different sampled datas constantly, be input to respectively in correlator morning, slow correlator and the demodulation correlator, these three correlators also need to import by the symbol clock of timing generation module generation and the local PN sign indicating number of PN code generator generation;
Early correlator and outputing in the subtracter of correlator late obtain the track loop error signal; The output of the correlator of demodulation simultaneously is input to respectively in frequency pilot sign extraction and channel estimation module, the 3rd multiplier and the energy computing module; Frequency pilot sign extracts and the output result and the track loop error signal of channel estimation module are carried out complex multiplication in first multiplier, and the result of gained imports second multiplier; Simultaneously, the frequency pilot sign extraction and the output result of channel estimation module and the output result of demodulation correlator carry out complex multiplication in the 3rd multiplier, and the result of gained outputs in data strobe output module and the judging module; The result of judging module outputs in second multiplier output multiplication with first multiplier, resulting signal is input to and carries out filtering in the loop filter, output to again and get the real part that obtains signal in the real part module, output to the thresholding comparison module and compare, comparative result is sent into regularly generation module and is adjusted; Regularly generation module will be adjusted the result and export to the phase state register, receive the multipath that is distributed by the phase state register simultaneously and regularly produce timing signal;
The output of demodulation correlator enters the energy that obtains described synchronous demodulation unit behind the energy computing module, and this energy is sent into relatively losing lock judging module of thresholding, controlled signal control data gating output module;
The PN code generator is subjected to the regularly control of generation module output signal, produces the PN sign indicating number and uses for described No. three correlators.
The present invention is described in further detail below in conjunction with drawings and Examples.
Fig. 1 is the structural representation of traditional incoherent delay locked loop;
Fig. 2 is the structural representation of the synchronous receiving demodulation device of base band of the present invention;
Fig. 3 is the structural representation of synchronous demodulation unit 401 among Fig. 2;
Fig. 4 is the structural representation of the correlator 420a among Fig. 2.
The structure of traditional incoherent delay locked loop was as shown in Figure 1 introduced in front in detail, repeated no more here.
The structure of the synchronous receiving demodulation device of base band of the present invention as shown in Figure 2, as can be seen, this device mainly comprises A/D over-sampling device 100, controller 200, searcher 300 and synchronous demodulation unit group 400; Described A/D over-sampling device 100 be input as base-band spread-spectrum signal, output divides and is clipped to described searcher 300 and described synchronous demodulation unit 400; The signal that described searcher 300 receives from described A/D over-sampling device 100, and Search Results outputed to described controller 200; Described controller 200 is responsible for selecting from the multipath of described searcher 300, and selected multipath is distributed to described synchronous demodulation unit 400 between described searcher 300 and described synchronous demodulation unit 400; Described synchronous demodulation unit group 400 receives the signal from described A/D over-sampling device 100 and described controller 200, and the multipath signal in the sampled data is carried out accurate tracking and demodulation, and demodulating data is outputed to described multipath combiner 500; Described synchronous demodulation unit group 400 comprise n synchronous demodulation unit 401,402 ... 40n; Described multipath combiner 500 receives the output result of described synchronous demodulation unit group 400, and will export the result and merge according to the high specific principle, obtains final despread data.
Owing to comprise a plurality of transmission paths in the signal that receives, therefore in the synchronous receiving demodulation device of base band, need to utilize separable footpath stronger in synchronous demodulation unit group 400 and the received signal wherein synchronous; Again because the decline between the separable footpath is separate, so demodulation output result in each footpath merged according to certain rule the influence of decline is reduced greatly, the effect of diversity reception that Here it is.When each the synchronous demodulation unit in the synchronous demodulation unit group 400 and the multipath in the signal are the synchronous error of PN sign indicating number when reducing, the synchronous receiving demodulation device of base band will improve the anti fading performance.
The present invention utilizes synchronous demodulation unit group 400 to realize that accurately sign indicating number is synchronous, and constructs the synchronous receiving demodulation device of base band based on this, and its concrete course of work is as follows:
After received signal became base-band spread-spectrum signal and enters the synchronous receiving demodulation device of base band through AFE (analog front end), through 100 samplings of A/D over-sampling device, this sampled signal entered respectively in searcher 300 and the synchronous demodulation unit group 400 base-band spread-spectrum signal earlier.
The many transmission paths of searcher 300 in are to received signal searched for, and this searcher 300 can adopt matched filter or parallel correlator group to realize; Searcher 300 is searched in the search window of determining, and gives controller 200 with the rough multipath phase place and the intensity of gained.
Searcher 300 can adopt the sequential search method, realizes search with matched filter or parallel correlator group, and parallel correlator is many more, and search speed is just fast more.Matched filter or parallel correlator group are searched for from small to large to received signal by phase deviation, report to controller 200 to then can be used as candidate multipath phase place greater than a certain phase place that presets thresholding; When search phase deviation reached the predefined search window of search, searcher 300 began new search from initial phase again.Search window is big more, and the multipath of search is just many more, but its cost is to prolong search time.Therefore, reach optimum, the size of search window is optimized design with regard to being necessary for making systematic function.Searcher 300 reports to controller 200 with Search Results, is selected by 200 pairs of candidate's multipaths of controller phase place.
Controller 200 with the phase place of a plurality of candidate multipaths of gained and strength ratio, then the resource that demodulation refers to the peak according to system according to multipath by strong to weak order assignment to synchronous demodulation unit 401,402 ..., 40n.
When each synchronous demodulation unit 401 ..., when 40n has been assigned with rough PN sign indicating number locking phase, synchronous demodulation unit 401 ..., 40n just starts, and makes the PN code phase in a certain footpath in the local PN sign indicating number that produces 20 and the received signal realize precise synchronization through the feedback adjusting of several times.
When synchronous demodulation unit 401 ..., when little drift takes place owing to the relative motion of travelling carriage one base station in the 40n multipath phase place of following the tracks of, synchronous demodulation unit 401 ..., 40n can automatically adjust the phase place of local PN sign indicating number 20, makes it closely follow the swing of received signal PN sign indicating number; When multipath in the received signal is suddenly disappeared, synchronous demodulation unit 401 ..., 40n can report controller 200, stops demodulation output simultaneously, and waits for that controller 200 distributes new multipath phase place; After it obtained new multipath PN code phase, just swing fast when swinging to new PN code phase, was exported demodulation result at this moment again.
In addition, searcher 300 is worked simultaneously with synchronous demodulation unit group 400, constantly new Search Results is reported to controller 200, learn the intensity hour of the multipath that the strength ratio new search of the multipath of certain synchronous demodulation element keeps track arrives when controller 200, controller 200 just with this new search to multipath distribute to this synchronous demodulation unit, make it follow the tracks of new multipath.
Because n the synchronous demodulation unit 401 that described synchronous demodulation unit group 400 comprises ..., 40n structure just the same, so Fig. 3 only provides the structural representation of one of them synchronous demodulation unit 401.Among Fig. 3, Reference numeral is 4 * * each part of representative synchronous demodulation unit 401; Reference numeral is the connection signal between each part of double-digit expression, as 20,30,40.
Synchronous demodulation unit 401 comprise sampling selector 410, early correlator 420a, late correlator 420b, demodulation correlator 420c, PN code generator 430, subtracter 440, loop filter 443, get real part module 444, thresholding comparison module 445, regularly generation module 446, frequency pilot sign extracts and channel estimation module 450, judging module 452, energy computing module 460, thresholding relatively losing lock judging module 461, phase state register 470 and data strobe output module 480.
With n=1, promptly have only the situation of a synchronous demodulation unit 401 to describe in the synchronous receiving demodulation device of base band below.
Received signal enters the synchronous receiving demodulation device of base band after becoming base-band spread-spectrum signal through AFE (analog front end), and through 100 samplings of A/D over-sampling device, this over-sampling rate is high more earlier for base-band spread-spectrum signal, and rear end attainable PN code tracking precision is just high more.This sampled signal enters searcher 300 and synchronous demodulation unit group 401 respectively, at first search for by many transmission paths of searcher 300 in to received signal, obtain the distribution situation of multipath, searcher 300 reports to controller 200 with Search Results then, controller 200 is through the selection to candidate multipath phase place, by and synchronous demodulation unit 401 between data wire write phase state register 470 in the synchronous demodulation unit 401, thereby give synchronous demodulation unit 401 with the multipath phase assignments.
I, Q two-way base band oversampled signals by 100 generations of A/D over-sampling device, be introduced into sampling selector 410, it is down-sampled that this sampling selector 410 is pressed 30 pairs of oversampled signals of chip (chip) clock, the purpose that this sampling selector 410 is set is to carry out the PN code phase to adjust synchronously, makes local PN code phase that produces and the multipath PN code phase precise synchronization in the received signal.Sampling selector 410 produces three road complex sampling data: early branch road sampled data, branch road sampled data and demodulation branch road sampled data late, enter early correlator 420a, slow correlator 420b and demodulation correlator 420c respectively, this three tunnel complex data is carried out related operation respectively in three correlators, the data rate of its operation result is reduced to symbol (symbol) level, therefore the input signal of these three correlators also has symbol (symbol) clock 40 except having through the sampled data of over-sampling selector 410 and separating the PN sign indicating number 20 that calls of PN code generator 430 generations.
Early the internal structure of correlator 420a, slow correlator 420b and demodulation correlator 420c is the same, so Fig. 4 has only provided the structural representation of 420a.
In Fig. 4, the complex sampling data are carried out complex multiplication with the PN sign indicating number 20 that produces from PN code generator 430 in complex multiplier 421, the result of gained enters in the integration zero clearing device 422 and adds up, the length that adds up is the length of a demodulation symbol, symbol (symbol) clock 40 that the zero clearing input of integration zero clearing device 422 comes self-timing generation module 446 to produce.
Early the output result of correlator 420a and slow correlator 420b enters and carries out subtraction in the subtracter 440, another road input data that the difference that obtains enters first multiplier, 441, the first multipliers 441 are from extracting through frequency pilot sign and channel estimation module 450 and the conjugation of the channel random phase that obtains.Owing in wideband CDMA system, adopt time-division pilot tone mode, be that frequency pilot sign and data symbol carry out time division multiplexing, then the demodulating data process frequency pilot sign extraction of demodulation correlator 420c output and channel estimation module 450 extract the frequency pilot sign in the demodulating data, utilize linear interpolation to carry out channel estimating again, the result of the channel estimating that obtains is exactly the channel random phase, obtain the conjugation of channel random phase then, and output to first multiplier 441.The output of first multiplier 441 enters second multiplier 442, another input of second multiplier 442 is from judging module 452, this judging module 452 is directly carried out hard decision to the demodulation dateout, demodulating data also passes through the compensation of channel estimation value before judgement, be that demodulating data and channel estimation value multiply each other at the 3rd multiplier 451, its result enters judging module 452.The purpose of channel estimating and judgement is to eliminate decline, random phase in the error signal and the modulating data that is carried thereof.
The output result of second multiplier 442 is exactly the error signal of synchronous demodulation unit 401, and this error signal enters loop filter 443 filtering loop noises, and the output signal of this moment is a complex signal; This complex signal enters gets real part module 444, obtains the real part of this complex signal, and then enters thresholding comparison module 445; Preset threshold value in the thresholding comparison module 445, this threshold value can be write by controller 200; When the value of real part of the complex signal of being got during, then provide the adjustment signal, and the direction of adjusting is decided by the positive and negative of value of real part of this complex signal greater than threshold value.
After regularly generation module 446 receives the comparative result of threshold compataror 445, know whether the multipath phase place of this synchronous demodulation unit 401 lockings this moment needs to adjust.After the instruction of receiving adjustment, regularly generation module 446 can respond this instruction, and making the phase place of chip (chip) clock 30 is the leading or hysteresis of unit with the over-sampling precision, and a such symbol (symbol) clock that is adjusted at only carried out once in 40 cycles.Adjustment result after adjusting can deposit in the phase state register 470, by the data wire between controller 200 and the synchronous demodulation unit 401 result is delivered to controller 200 then.After the multipath of this synchronous demodulation unit 401 lockings disappears because of certain reason, controller 200 distributes new multipath phase place can for this synchronous demodulation unit 401, new multipath phase place and current phase place have certain difference, controller 200 controls this moment regularly generation module 446 are swung fast, make chip (chip) clock 30 carry out the continuous slip of phase place, till sliding into new phase place.In this process, demodulation and tracking work will stop, and wait for and carry out demodulation when locking onto new multipath again again and follow the tracks of computing.Regularly generation module 446 produces chip (chip) clock of adjusting through phase place 30, exports sampling selector 410 and PN code generator 430 to; Symbol (symbol) clock 40 then is subordinated to chip (chip) clock 30, is about to chip (chip) clock 30 and counts frequency division by the used spreading factor of transmitter, just can obtain symbol (symbol) clock 40; 40 on this symbol (symbol) clock exports early correlator 420a, slow correlator 420b and demodulation correlator 430 to.
In addition, also can utilize demodulation output result to carry out locking decision.The dateout of demodulation correlator 420c enters energy computing module 460, calculates signal energy I again in the energy computing module 460
2+ Q
2, again this energy being carried out multiple averaging, this average energy enters relatively losing lock judging module 461 of thresholding.Thresholding relatively losing lock judging module 461 needs two threshold values: " going into lock " threshold value and " losing lock " threshold value, wherein " go into to lock " threshold value greater than " losing lock " threshold value.When being in the lock state, average energy and " losing lock " threshold value are compared, if average energy less than " losing lock " threshold value, is then judged losing lock, otherwise the attitude of remaining stationary; In like manner, when being in out-of-lock condition, with average energy and " go into lock " threshold value relatively,, judge to enter lock-out state when average energy during greater than " going into lock " threshold value, otherwise the attitude of remaining stationary.When being in out-of-lock condition, data strobe output module 480 cuts out, and the demodulation dateout can not be exported.Here, lock-out state is promptly adjudicated the output result should report to controller 200, is controlled the selection of two threshold values by controller 200.
Method of the present invention adopts synchronous demodulation unit group 400 and the searcher 300 accurate PN sign indicating number of incompatible realization that matches synchronous, can reduce and follow the tracks of shake, reduce noise effect, overall performance is improved, and make a yard synchronizing function be divided into two parts and its circuit is realized easily; Improved the anti fading performance based on the synchronous receiving demodulation device of the base band of this method for synchronous.In the present invention and since adopt that new synchronous demodulation unit group 400 can guarantee to follow the tracks of accurately, thereby the receptivity of the synchronous receiving demodulation device of base band is improved greatly.
Claims (9)
1. the method for a broadband CDMA system PN sign indicating number precise synchronization, it is characterized in that: it may further comprise the steps:
1. base band spread spectrum analog signal becomes digital signal through over-sampling;
2. oversampled digital signal is selected constantly in difference, formed morning, slow and demodulation three tunnel sampled datas;
3. morning, branch road sampled data and slow branch road sampled data were through the track loop of door generation sooner or later error signal;
4. demodulation branch road sampled data obtains demodulating data through demodulating unit;
5. the demodulating data that 4. step is obtained carries out channel estimating, obtains channel estimation value, and with channel estimation value the track loop error signal that 3. demodulating data and step obtain is compensated, and obtains demodulation offset data and error compensating signal respectively; Then the demodulation offset data is carried out hard decision, resulting result and error compensating signal carry out conjugate multiplication, obtain the correction error signal;
6. the correction error signal is carried out low-pass filtering;
7. filtered correction error signal is got real part and preset gate limit value relatively, if the real part of correction error signal is then adjusted chip clock (30) greater than threshold value;
8. export the demodulation offset data.
2. the method for a kind of broadband CDMA system PN sign indicating number precise synchronization as claimed in claim 1 is characterized in that: described step is carried out down-sampled back to oversampled signals by chip clock (30) in 2. and is produced three tunnel sampled datas.
3. the method for a kind of broadband CDMA system PN sign indicating number precise synchronization as claimed in claim 1 or 2 is characterized in that: described step extracts the frequency pilot sign in the demodulating data in 5. earlier, utilizes linear interpolation to carry out channel estimating again.
4. the method for a kind of broadband CDMA system PN sign indicating number precise synchronization as claimed in claim 3, it is characterized in that: described step 7. in chip clock (30) be that unit is leading or lag behind and adjust by its phase place with the over-sampling precision, the direction of its adjustment is by the positive and negative decision of the value of real part of filtered track loop error signal, and only carries out once in (40) cycle at a symbol clock.
5. as the method for claim 1,2,4 one of any described a kind of broadband CDMA system PN sign indicating number precise synchronization, it is characterized in that: described step is carried out locking decision according to signal energy mean value, demodulated output data under lock-out state earlier in 8..
6. the method for a kind of broadband CDMA system PN sign indicating number precise synchronization as claimed in claim 5, it is characterized in that: the method for locking decision is:
" going into lock " threshold value and " losing lock " threshold value is set, and " going into lock " threshold value is greater than " losing lock " threshold value; When being in the lock state, signal energy mean value compares with " losing lock " threshold value, if signal energy mean value less than " losing lock " threshold value, is then judged losing lock, otherwise the attitude of remaining stationary; When being in out-of-lock condition, signal energy mean value compares with " going into lock " threshold value,, judge to enter lock-out state greater than " going into lock " threshold value as if signal energy mean value, otherwise the attitude of remaining stationary.
7. one kind is adopted the synchronous receiving demodulation device of base band of method according to claim 1, comprise A/D over-sampling device (100), searcher (300), controller (200) and multipath combiner (500), it is characterized in that: whole system also comprise by n the duplicate synchronous demodulation of structure unit (401,402 ..., 40n) the synchronous demodulation unit group (400) that constitutes;
The input of described A/D over-sampling device (100) is the base-band spread-spectrum signal that receives, and the output branch is clipped to described searcher (300) and described synchronous demodulation unit group (400);
Described searcher (300) receives the signal from described A/D over-sampling device (100), carries out Multipath searching, and Search Results is outputed to described controller (200);
Described controller (200) is positioned between described searcher (300) and the described synchronous demodulation unit group (400), is responsible for to selecting from the multipath of described searcher (300) selected multipath being distributed to described synchronous demodulation unit group (400);
Described multipath combiner (500) receives the output result of described synchronous demodulation unit group (400), and will export the result and merge by the high specific principle, obtains final despread data;
Described synchronous demodulation unit group (400) receives the signal that is produced by described A/D over-sampling device (100) and described controller (200), and the multipath signal in the sampled data is carried out accurate tracking and demodulation, and demodulating data outputs to described multipath combiner (500);
Synchronous demodulation unit (401) in the described synchronous demodulation unit group (400) further comprises sampling selector (410), correlator (420a) early, slow correlator (420b), demodulation correlator (420c), PN code generator (430), subtracter (440), first multiplier (441), second multiplier (442), loop filter (443), get real part module (444), thresholding comparison module (445), timing generation module (446), frequency pilot sign extracts and channel estimation module (450), the 3rd multiplier (451), judging module (452), energy computing module (460), thresholding is losing lock judging module (461) relatively, phase state register (470) and data strobe output module (480);
Described sampling selector (410) is to carrying out down-sampled from the oversampled signals of described A/D over-sampling device (100), produce three tunnel different sampled datas constantly, be input to respectively in correlator (420a) morning, slow correlator (420b) and the demodulation correlator (420c), these three correlators also need input by the symbol clock (40) of timing generation module (446) generation and the local PN sign indicating number (20) of PN code generator (430) generation;
Early correlator (420a) and outputing in the subtracter (440) of correlator (420b) late obtain the track loop error signal; The output of demodulation correlator (420c) simultaneously is input to respectively in frequency pilot sign extraction and channel estimation module (450), the 3rd multiplier (451) and the energy computing module (460); Frequency pilot sign extracts and the output result and the track loop error signal of channel estimation module (450) are carried out complex multiplication in first multiplier (441), and the result of gained imports second multiplier (442); Simultaneously, the frequency pilot sign extraction and the output result of channel estimation module (450) and the output result of demodulation correlator (420c) carry out complex multiplication in the 3rd multiplier (451), the result of gained outputs in data strobe output module (480) and the judging module (452); The result of judging module (452) outputs in second multiplier (442) output multiplication with first multiplier (441), resulting signal is input in the loop filter (443) and carries out filtering, output to again and get the real part that obtains signal in the real part module (444), output to thresholding comparison module (445) and compare, comparative result is sent into regularly generation module (446) and is adjusted; Regularly generation module (446) will be adjusted the result and export to phase state register (470), receive the multipath that is distributed by phase state register (470) simultaneously and regularly produce timing signal (30);
The output of demodulation correlator (420c) enters the energy that obtains described synchronous demodulation unit (401) behind the energy computing module (460), and this energy is sent into relatively losing lock judging module (461) of thresholding, controlled signal control data gating output module (480);
PN code generator (430) is subjected to the regularly control of generation module (446) output signal (30), produces the PN sign indicating number and uses for described No. three correlators.
8. the synchronous receiving demodulation device of a kind of base band as claimed in claim 7 is characterized in that: described searcher (300) is realized with matched filter or parallel correlator group, is adopted the sequential search method.
9. the synchronous receiving demodulation device of a kind of base band as claimed in claim 7 is characterized in that: be provided with threshold value in the described thresholding comparison module (445); Described thresholding relatively losing lock judging module (462) is provided with two threshold values: " going into lock " threshold value and " losing lock " threshold value; Above-mentioned threshold value is controlled by controller (200).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN99124412A CN1110162C (en) | 1999-11-10 | 1999-11-10 | Precise PN code synchronizing method and device for wide-band CDMA system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN99124412A CN1110162C (en) | 1999-11-10 | 1999-11-10 | Precise PN code synchronizing method and device for wide-band CDMA system |
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| CN1267978A CN1267978A (en) | 2000-09-27 |
| CN1110162C true CN1110162C (en) | 2003-05-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN99124412A Expired - Fee Related CN1110162C (en) | 1999-11-10 | 1999-11-10 | Precise PN code synchronizing method and device for wide-band CDMA system |
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Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6795452B2 (en) * | 2002-05-31 | 2004-09-21 | Sandbridge Technologies, Inc. | Method of tracking time intervals for a communication signal |
| CN1323502C (en) * | 2002-06-19 | 2007-06-27 | 上海贝尔有限公司 | WCDMA indicating channel receiver |
| CN100420162C (en) * | 2002-11-15 | 2008-09-17 | 意大利电信股份公司 | Method and device for fine synchronization of a digital telecommunication receiver |
| CN1315272C (en) * | 2004-07-05 | 2007-05-09 | 大唐移动通信设备有限公司 | Synchronous control method and device based on channel evaluation in CDMA communication system |
| CN100438399C (en) * | 2005-06-02 | 2008-11-26 | 北京天碁科技有限公司 | Timing tracking apparatus, receiver, timing tracking and regulating method |
| CN100459445C (en) * | 2005-09-18 | 2009-02-04 | 华为技术有限公司 | Method, apparatus and receiving apparatus for multi-path searching |
| CN100448175C (en) * | 2005-09-19 | 2008-12-31 | 浙江华立通信集团有限公司 | Finger time tracker system |
| CN101834627B (en) * | 2010-03-31 | 2013-09-18 | 清华大学深圳研究生院 | High speed wireless communication receiving method based on ultra wide band wireless technology and receiver |
| CN102244527B (en) * | 2011-08-17 | 2014-12-17 | 航天恒星科技有限公司 | Accurate synchronizing method for wireless SPSP (spread spectrum) receiver |
| CN102624514B (en) * | 2012-03-01 | 2015-03-25 | 江苏中兴微通信息科技有限公司 | Method for improving timing synchronous precision of wireless channel measurement |
| CN102932033B (en) * | 2012-09-29 | 2015-02-11 | 西安空间无线电技术研究所 | Multi-access interference suppression method for spread spectrum receiver based on multi-peak-value detection |
| EP3291460B1 (en) * | 2015-06-25 | 2019-08-14 | Huawei Technologies Co., Ltd. | Method of synchronizing phases and device utilizing same |
| US10879952B2 (en) * | 2018-04-18 | 2020-12-29 | Huawei Technologies Co., Ltd. | Apparatus and receiver for performing synchronization in analog spread spectrum systems |
-
1999
- 1999-11-10 CN CN99124412A patent/CN1110162C/en not_active Expired - Fee Related
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