CN1114292C - Tracking method and device in CDMA communication system containing pilot channel - Google Patents

Tracking method and device in CDMA communication system containing pilot channel Download PDF

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CN1114292C
CN1114292C CN99124283A CN99124283A CN1114292C CN 1114292 C CN1114292 C CN 1114292C CN 99124283 A CN99124283 A CN 99124283A CN 99124283 A CN99124283 A CN 99124283A CN 1114292 C CN1114292 C CN 1114292C
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CN1301090A (en
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卢建民
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Huawei Technologies Co Ltd
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Abstract

The present invention relates to a tracking method and a device in a code division multiple access communication system comprising pilot channels. A delay locking ring (DLL) structure is adopted; three correlators form an early branch, a middle branch and late branch; pilot signals are firstly extracted from each slot through a pilot signal extraction circuit by dispread signals outputted from the early branch and the late branch, and modulated with pilot patterns by multiplication; after coherent accumulations, absolute sums (absolute value sums of IQ two branches) are worked out; the absolute sums of the early branch and the late branch are compared for obtaining phase difference value indication to complete tracking by controlling a local code word phase after loop filtering. The present invention is easily realized, can save hardware resources, and can remove influences of multiplier interference of channel fading, etc. on the tracking.

Description

Contain tracking and device in the pilot channel code division multiple address communication system
The present invention relates in a kind of code division multiple address communication system, at the tracking and the device that contain the employing branch road comparative approach of finishing on the channel of pilot tone.
In code division multiple access (CDMA) system (hereinafter to be referred as cdma system), local sequence and send sequence and whether align and will directly influence signal to noise ratio after the despreading.After though the catching of frequency expansion sequence finished, both are roughly synchronous, but owing to catch the restriction of precision, and The noise, the variation of channel transmission time delay, the skew of send-receive clock frequency etc., it is consistent that the phase place of local sequence and transmission sequence can not maintain a long-term stability.In order to address this problem, just need tracking circuit to control local code word phase place in real time, itself and receiving sequence are consistent, thereby obtain good demodulation characteristics.
Conventional tracker generally adopts delay lock loop (DLL-Delay Locked Loop) principle.Realize tracking to the frequency expansion sequence phase place, key is to want correctly to detect the phase difference of two sequences, goes the phase place of the local sequence of closed-loop adjustment then with this phase difference, makes it consistent as far as possible with receiving sequence, thereby the phase difference of two sequences is controlled at minimum state, promptly realizes following the tracks of.What this phase characteristic relied on is the autocorrelation performance of frequency expansion sequence.As shown in Figure 1, the auto-correlation function R (t) of cdma system transmitting-receiving sequence, when t=0, the correlation maximum; If chip lengths is Tc, after t surpassed Tc, correlation was just very little.As can be seen from the figure, subtract each other after auto-correlation function moved half-chip about respectively, can constitute a phase demodulation curve.T=0, when promptly synchronous fully, it just is zero that phase discriminator output differs.When-Tc/2<t<Tc/2, phase demodulation curve approximation linearity.According to this curve and principle of phase lock loop, can construct tracking loop.If two correlators of interval T c are arranged, their correlation to be subtracted each other, difference is removed closed-loop control local code word generator, makes local code word phase place level off to receiving phase, can finish tracking.These two correlators can be described as " early " " late " branch road respectively, and after tracking was stable, they are the accurate locking phase half-chip of lead and lags respectively.If in the middle of this two-way, place a correlator again, promptly be positioned at sync bit after stablizing, can do accurately demodulation.This correlator can be described as " in " branch road, also be the demodulation branch road.This structure is called delay lock loop.
Conventional tracking loop structure such as accompanying drawing two are divided into slow three tunnel (half-chip length at interval) in morning after data are delayed, do complex multiplication (demodulation), integration (despreading) with local PN sign indicating number respectively---and middle road plural number correlation is demodulation output; After early energy (quadratic sum) difference of two-way plural number correlation is sent into loop filter filtering late, enter the phase adjusted module again, produce the code word address offset, regulate the local code word address, this address directly drives the local code word generator and produces local PN code word.
The deficiency of existence of the prior art is:
1, because the channel condition of modern cdma mobile communication is very abominable, signal to noise ratio is extremely low, and can reach the quick decline of 30-40dB with the degree of depth, for the signal after the demodulation, signal to noise ratio is still very low, and noise jamming is very big, in this case, the accuracy of sending into the phase deviation of loop filter can not guarantee that tracking effect is relatively poor.
2, as mentioned above, the energy that receives data may have the fluctuating of 30-40dB owing to the influence of quick deep fade, though the adjusting of process AGC and power control, because AGC and the response time of power control and the restriction of regulating degree, it fluctuates still very violent up and down.Because this kind decline is the property taken advantage of interference, early the difference of branch road correlation energy also can be subjected to same affect late, and the phase difference value that goes out of the phase demodulation variation of fluctuation of energy that in fact also superposeed at this moment greatly influences loop convergence speed, reduces tracking accuracy.
3, owing to ask for correlation energy and need do quadratic sum, the dynamic range of signal broadens greatly, and required bit wide doubles, on the hardware than consumes resources.
The objective of the invention is in order to overcome defective of the prior art, and propose a kind of be easy to realize and can remove the property taken advantage of interference such as channel fading to the influence followed the tracks of, save hardware resource based on relevant tracking and the device thereof that adds, adopts the branch road comparative approach of time-multiplexed pilot.
The technical scheme that realizes the object of the invention is: a kind of tracking that contains in the pilot channel code division multiple address communication system, adopt delay locked ring structure, and constitute slow three branch roads in morning with three correlators, be characterized in, may further comprise the steps:
A, input data form slow three circuit-switched data in the morning that is spaced apart half-chip behind straight-through and delay circuit, enter early respectively in slow branch road do correlation demodulation;
B, the IQ two paths of signals after the despreading of branch road output early late extract pilot signal by the pilot signal extraction circuit from each time slot, the pilot frequency design that produces with the pilot frequency design generator modulation of multiplying each other;
C, the pilot signal of inciting somebody to action after going to modulate in the early slow branch road carry out asking IQ two-way absolute value sum again behind the coherent accumulation;
D, with the morning that obtains among the step c slow branch road IQ two-way absolute value sum subtract each other, draw phase difference value indication;
By phase controller output local code address, this local code address driving local code word generator produces local code word and enters slow correlator in morning again, finishes the closed-loop control of track loop behind loop filtering for e, phase difference value indication.
Above-mentioned a kind of tracking that contains in the pilot channel cdma communication system, wherein, described each correlator is made of input data I Q two-way and the multiple product branch of local code word IQ two-way, and integration lengths is the product of spreading factor and over-extraction sample code check.
Above-mentioned a kind of tracking that contains in the pilot channel cdma communication system wherein, will extract the signal of pilot signal after despreading, with the pilot frequency design modulation of multiplying each other, the pilot signal homophase of formation.
Above-mentioned a kind of tracking that contains in the pilot channel cdma communication system, wherein, described phase difference value is designated as: when morning the road absolute and greater than road late absolute and the time, comparator output " 1 "; When morning the road absolute and equal slow road absolute and the time, comparator output " 0 "; When morning the road absolute and less than road late absolute and the time, comparator output " 1 ".
Realize the device of above-mentioned tracking, comprise time delay module, correlator, local code word generator, phase regulator, loop filter; Described time delay module is early road, two half-chip time delay modules in road late; Described correlator is early road correlator, middle road correlator and road correlator late; The initial data of input is delivered to road correlator early, delivers to road half-chip time delay module early simultaneously; Deliver to slow road half-chip time delay module through this morning again after the time-delay of road half-chip time delay module, road correlator in delivering to simultaneously; Data after this slow road half-chip time delay module time-delay are delivered to slow road correlator; Described loop filter, phase regulator and local code word generator and three correlators are linked in sequence; Be characterized in, also comprise: early road, road pilot tone abstraction module late, early are concerned with and add module in road, slow road, early the road, Chi Luqiu is absolute and module, the branch road comparison module, pilot frequency design generator and the slow road multiplier that is connected with this pilot frequency design generator, road multiplier morning that is connected with slow road multiplier; From the data order of road correlator output morning with morning road pilot tone abstraction module, early the road multiplier, early the relevant module that adds in road is asked definitely with road early and is connected with module, from the data order of slow road correlator output and slow road pilot tone abstraction module, late the road multiplier, be concerned with and add module and definitely be connected with module with Chi Luqiu in the road late; Deliver to the phase difference value indication that the branch road comparator obtains again from morning road, Chi Luqiu two-way absolute value sum absolute and module output and be transported to described loop filter again, through the signal of loop filter filtering again order is connected with the local code word generator with phase regulator and to being transported to three correlators, the formation loop tracks.
In the said apparatus, described morning the road, late the road time delay module can adopt ring-like memory to realize, the time delay that is spaced apart dateout of its output tap.
In the said apparatus, described morning the road, late road pilot tone abstraction module can be realized by the break-make door, open-minded during pilot frequency locations by the break-make that known structure of time slot comes control gate, turn-off all the other positions.
In the said apparatus, the signal of described pilot frequency design generator output is a pilot frequency design.
In the said apparatus, described morning road, the slow relevant some pilot tone plural number addition of modulating, lifting signal to noise ratios of going that add that module will be adjacent in road.
In the said apparatus, the absolute and module of road, Chi Luqiu of described morning is finished the process of asking I, Q two-way absolute value sum.
In the said apparatus, described branch road comparison module relatively early, late branch road absolute and, when morning the road absolute and greater than road late absolute and the time, comparator output " 1 "; When morning the road absolute and equal slow road absolute and the time, comparator output " 0 "; When morning the road absolute and less than road late absolute and the time, comparator output " 1 ".
In the said apparatus, described loop filtering module can adopt the common ring path filter in the PLL phase-locked loop.
In the said apparatus, the phase difference value of described phase adjusted module after according to loop filtering regulated the address of local code word, drives code word generator and produces local code word.
Because the present invention has adopted above technical scheme, the good effect of its generation is tangible;
1, absolute and (the absolute value sum of I, Q two-way) with signal replaces the quadratic sum in the conventional method to get energy, can reduce the signal bit wide, saves hardware resource, is easy to more realize.
2, with the pilot signal coherent accumulation of basic homophase, make relevant the adding of N pilot tone can improve signal to noise ratio doubly to original N, the signal to noise ratio that improves early slow branch road correlation is to improve tracking performance.
3, utilize the sign symbol of phase difference value to do the phase place indication,, can remove the influence of signal fadeout by moving of this index signal control code word phase place.
For clearer understanding performance of the present invention, characteristics, existing with the following Examples and accompanying drawing do detailed explanation.
Fig. 1 is the autocorrelation performance figure of prior art frequency expansion sequence;
Fig. 2 is a prior art tracking loop structure chart;
Fig. 3 is the overall structure schematic diagram of tracking of the present invention;
Fig. 4 is the structural representation of correlator of the present invention;
Fig. 5 is the error rate of the present invention---the broken line graph of signal to noise ratio.
Modern cdma system mostly provides the channel that comprises pilot tone, and the pattern of pilot tone is known; Though be subjected to the influence of the Doppler frequency shift that high-speed mobile brings, phase place between adjacent signals has certain deflection, but because the code check of modern cdma communication is high, the time interval of adjacent signals is extremely short, so the channel characteristics basically identical that they are gone through has phase place much at one.This is the relevant basis that adds feasibility of pilot tone.
Slow three branch roads during the present invention constitutes early with three correlators, but the signal after the despreading of branch road output late early, directly do not carry out quadratic sum and ask energy, but by the pilot signal extraction circuit pilot signal is extracted from each time slot earlier, with the pilot frequency design modulation of multiplying each other, ask absolute and (IQ two-way absolute value sum) behind the coherent accumulation again.Relatively early late branch road absolute and, draw the phase difference value indication, the local code word phase place of control is to finish tracking behind loop filtering.The steps include:
A, input data form slow three circuit-switched data in the morning that is spaced apart half-chip behind straight-through and delay circuit, enter early respectively in slow branch road do correlation demodulation;
B, the IQ two paths of signals after the despreading of branch road output early late extract pilot signal by the pilot signal extraction circuit from each time slot, the pilot frequency design that produces with the pilot frequency design generator modulation of multiplying each other;
C, the pilot signal of inciting somebody to action after going to modulate in the early slow branch road carry out asking IQ two-way absolute value sum again behind the coherent accumulation;
D, with the morning that obtains among the step c slow branch road IQ two-way absolute value sum subtract each other, draw phase difference value indication;
By phase controller output local code address, this local code address driving local code word generator produces local code word and enters slow correlator in morning again, finishes the closed-loop control of track loop behind loop filtering for e, phase difference value indication.
The prerequisite of track loop running is the structural information of known signal, as: time slot is initial, structure of time slot, pilot frequency locations and pattern or the like.So the extraction of pilot tone and pattern counter modulation are easy to realize.With the described CDMA ascending control channel of in July, 99 3Gpp motion is example, and when translational speed was 120km/h, the channel phase deflection between adjacent signals only had 5 °, can think homophase substantially.But pattern (Pattern) is arranged on the regulation pilot tone in the motion,, add, must remove this phase modulation, just carry out the counter modulation of pilot frequency design for relevant so pilot signal has 0 °/180 ° phase modulation.Counter modulation can be finished with known pilot frequency design and signal multiplication.Like this, adjacent pilot signal after going to modulate can be thought basic homophase.But the pilot tone after the actual modulation of getting on not is complete homophase, and therefore, in fact pilot signal " relevant adding " related among the application should be " accurate relevant adding ", is convenient narration, still adopts the saying of " relevant adding ", explanation hereby.
Suppose that N in-phase signal amplitude all is A, the variance of zero equal Gaussian noise all is ρ 2, and separate, and then the signal to noise ratio of every circuit-switched data is A 2/ ρ 2, N circuit-switched data coherent accumulation, because the signal homophase, amplitude becomes original N doubly, i.e. N * A; Owing to the independence of white Gaussian noise between every circuit-switched data, the noise variance after adding up becomes N * ρ again 2Like this, N the relevant back data signal to noise ratio that adds is (N * A) 2/ (N * ρ 2)=N * A 2/ ρ 2, promptly bring up to original N doubly.Under the restriction of phase of received signal rotary speed, desirable pilot tone as much as possible is relevant to be added, and in this article, recommends to use five, and like this, even under the high speed of 300km/h, the relevant pilot phase deviation maximum that adds also is no more than 67 °.Because the raising of signal to noise ratio, early the correlation of branch road is estimated just more accurate late.
Draw after the relevant I, Q value of branch road early late, with this morning late the signal of two-way branch road obtain absolute and (I, Q two-way absolute value sum) respectively, as the sign of slow energy relationship morning.Get their absolute value sum, adopt branch road method relatively, when morning the road absolute and during greater than road late, comparator just exports 1; Output 0 when equaling; Otherwise output-1.Owing to adopt the branch road comparison method, only be concerned about early the relativeness of branch road late, needn't make every effort to accurate energy, therefore, can adopt I, Q two-way absolute value sum to come amplitude (or energy) relation of reflected signal.If signal is Ae J η, A is an amplitude, η is phase place deflection, I=Acos η then, Q=Asin η.I, Q two-way absolute value sum be A (| cos η |+| sin η |).Because early late two-way chip at interval only on the time can think that early the phase place deflection η of signal is identical late.Like this, early late I, the Q absolute value sum of branch road are correctly to reflect early the amplitude relativeness of signal late.Removed square operation, can reduce the signal bit wide, saved hardware resource, be easy to more realize.
In order to remove the influence of signal fadeout, can only utilize the signal of phase difference value to do the phase difference indication, by moving of this index signal control code word phase place.Because channel fading is almost completely consistent for the influence of branch road late early, so decline can't change early the relative size of branch road correlation energy late, therefore adopt the branch road comparison method to make phase estimation, can remove the variation of the loop convergence speed that the property taken advantage of interference such as channel fading causes fully.This is the theoretical foundation of branch road comparative approach.
The result of branch road comparison is 1,0 and-1, and this is actually the phase adjusted indication.Because The noise, these phase deviation indications may not be reliable, if directly control the address of code word, certainly will cause the shake of phase place.Because code check is quite big in the current 3G system, the variation of signal path time delay is slower relatively, and the frequency of the phase adjustment signal that it is corresponding is also lower, so these phase deviation indications can be sent into the low pass loop filtering, the high dither that removal is caused by noise goes to control local code word phase place again.The speed of Tiao Jieing is not subjected to the influence of signal amplitude like this, has removed the property taken advantage of interference such as signal fadeout.
Be example now, describe the present invention in detail with the described CDMA ascending control channel of in July, 99 3Gpp motion.The described CDMA ascending control channel of in July, 99 3Gpp motion, chip (Chip) speed is 3.84MChip/s, spreading factor is 256 (being that each signal (Symbol) expands into 256 chips), 10 signals constitute 1 time slot (Slot), in each time slot, the first five signal must be a pilot tone, and the pattern of pilot tone is arranged.
The structure of tracking of the present invention still adopts the DLL structure as shown in Figure 3, comprises time delay module, correlator, local code word generator, phase regulator, loop filter; Described time delay module is early road, two half-chip time delay modules in road 301,302 late; Described correlator is early road correlator 303, middle road correlator 304 and road correlator 305 late; The initial data of input is delivered to road correlator 303 early, delivers to road half-chip time delay module 301 early simultaneously; Deliver to slow road half-chip time delay module 302 again after 301 time-delays of road half-chip time delay module, road correlator 304 in delivering to simultaneously through this morning; Data after these slow road half-chip time delay module 302 time-delays are delivered to slow road correlator 305; Described loop filter 316, phase regulator 314 and local code word generator 309 are linked in sequence, and its output also is linked in sequence with three correlators; Also comprise: early road, road pilot tone abstraction module 306,307 late, early are concerned with and add module 310,311 in road, slow road, early the road, Chi Luqiu is absolute and module 312,313, branch road comparison module 315, pilot frequency design generator 308 and road morning that is connected with this pilot frequency design generator 308, slow road multiplier 318,319; From the data batch transportation of road correlator 303 output morning to road pilot tone abstraction module 306 morning, morning, the road multiplier 318, early the road relevant add module 310 and early the road ask absolute and module 312, from the data batch transportation of slow road correlator 305 output to slow road pilot tone abstraction module 307, slow road multiplier 319, late the road is relevant adds module 311 and Chi Luqiu is absolute and module 313, from road morning, Chi Luqiu two-way absolute value sum absolute and module output is delivered to the phase place that branch road comparator 315 obtains again and is indicated batch transportation to arrive described loop filter 316 again, phase regulator 314 and local code word generator 309, three correlators are delivered in its output order again, form tracking loop.
Time delay module 301 and 302 can adopt ring-like memory to realize, the interval of output tap is actual to be exactly the time delay of dateout.
Correlator 303,304 and 305 structures are made of input data I Q two-way and the multiple product branch of local code word IQ two-way as shown in Figure 4, and integration lengths is the product of spreading factor and over-extraction sample code check.
Pilot tone abstraction module 306,307 can realize that open-minded during pilot frequency locations by the break-make that known structure of time slot comes control gate, turn-off all the other positions with the break-make door.
Pilot frequency design also is known, and the pilot signal after itself and the despreading is multiplied each other, and finishes the counter modulation of pilot frequency design, the pilot tone of the output pattern signal that no longer superposes on it.
The relevant some pilot tone plural number addition of modulating, the lifting signal to noise ratios of going that add that module 310,311 will be adjacent.
Ask absolute and module 312,313 is finished the process of asking I, Q two-way absolute value sum.
Branch road comparison module 315 relatively early late branch road absolute and, when morning the road absolute and during greater than road late, just export 1; Output 0 when equaling; Otherwise output-1.
Loop filtering module 316 can adopt the common ring path filter in the PLL phase-locked loop.
Phase adjusted module 314 is regulated the address of local PN code word according to the phase difference value behind the loop filtering, drives code word generator 309 and produces local code word.
Describe as can be known from above-mentioned realization, this method is easy to implement.Be protocol environment now, in the COSSAP simulated environment, realized conventional tracking loop and this method respectively with the described CDMA ascending control channel of in July, 99 3Gpp motion.Under the translational speed of M1225 vehicle-mounted A type multipath channel and 120km/h, done single footpath with signal to noise ratio 1 to 9dB and followed the tracks of contrast test, result such as following table (following table is the error rate comparison sheet of this method and conventional method under the different signal to noise ratios):
Signal to noise ratio snr ?1 ?2 ?3 ?4 ?5 ?6 ?7 ?8 ?9
The conventional error rate (%) of following the tracks of 37.8 ?32.7 ?30.1 ?27.3 ?22.3 ?19.4 ?16.8 ?14.5 ?12.7
This method error rate (%) 32.2 ?29.5 ?26.8 ?24.1 ?21.4 ?18.9 ?16.5 ?14.3 ?12.3
Make the error rate according to the result---the broken line graph such as the accompanying drawing 5 of signal to noise ratio.By test result as can be seen, when signal to noise ratio was higher, relevant add and the branch road comparative approach slightly is better than conventional method,, difference was little; And under the low signal-to-noise ratio situation, the latter can not follow the tracks of main footpath all the time owing to the interference of noise and decline, but free between each bar multipath, causes the rapid deterioration of performance; At this moment, relevant add and the branch road comparative approach but can so performance change is more smooth, improve about 1dB than conventional method all the time with living main footpath.As everyone knows, modern cdma communication system all is to be operated under utmost point low signal-to-noise ratio and the multipath channel than deep fade, and therefore, the proposition of this method has more practical significance and value.
Compared with the prior art, advantage of the present invention is:
1, because relevant the adding of N pilot tone can be improved signal to noise ratio to original N doubly, and it is more accurate that the correlation of early slow branch road is estimated, the precision of phase error estimation and phase error is corresponding improve also, so pilot tone extracts and relevant adding can be improved tracking accuracy.
2, adopt the branch road comparison method to make phase estimation, only need to be concerned about early the late relative size of branch road correlation, can remove the variation of the loop convergence speed that the multiplier interference such as channel fading causes fully, improve the stability (anti-fading property) of following the tracks of.
3, owing to adopt the branch road comparison method, needn't make every effort to precision energy, therefore, can adopt I, Q two-way absolute value sum to come amplitude (or energy) relation of reflected signal. Removed square operation, namely reduced the signal bit wide, can save hardware resource, more be easy to realize.

Claims (14)

1, a kind of tracking that contains in the pilot channel code division multiple address communication system adopts delay locked ring structure, constitutes slow three branch roads in morning with three correlators, it is characterized in that, may further comprise the steps:
A, input data form slow three circuit-switched data in the morning that is spaced apart half-chip behind straight-through and delay circuit, enter early respectively in slow branch road do correlation demodulation;
B, the IQ two paths of signals after the despreading of branch road output early late extract pilot signal by the pilot signal extraction circuit from each time slot, the pilot frequency design that produces with the pilot frequency design generator modulation of multiplying each other;
C, the pilot signal of inciting somebody to action after going to modulate in the early slow branch road carry out asking IQ two-way absolute value sum again behind the coherent accumulation;
D, with the morning that obtains among the step c slow branch road IQ two-way absolute value sum subtract each other, draw phase difference value indication;
By phase controller output local code address, this local code address driving local code word generator produces local code word and enters slow correlator in morning again, finishes the closed-loop control of track loop behind loop filtering for e, phase difference value indication.
2, a kind of tracking that contains in the pilot channel code division multiple address communication system according to claim 1, it is characterized in that, described each correlator is made of input data I Q two-way and the multiple product branch of local code word IQ two-way, and integration lengths is the product of spreading factor and over-extraction sample code check.
3, a kind of tracking that contains in the pilot channel code division multiple address communication system according to claim 1, it is characterized in that, described will extracting the signal of pilot signal after despreading multiplied each other with pilot frequency design and to be modulated the pilot signal homophase that the back forms.
According to the described a kind of tracking that contains in the pilot channel code division multiple address communication system of claim 1, it is characterized in that 4, the described coherent accumulation of step c is meant makes coherent accumulation with the pilot signal of basic homophase.
5, a kind of tracking that contains in the pilot channel code division multiple address communication system according to claim 1 is characterized in that described phase difference value is designated as: when morning the road absolute and greater than road late absolute and the time, comparator output " 1 "; When morning the road absolute and equal slow road absolute and the time, comparator output " 0 "; When morning the road absolute and less than road late absolute and the time, comparator output " 1 ".
6, a kind of device of realizing the described tracking of claim 1 comprises time delay module, correlator, local code word generator, phase regulator, loop filter; Described time delay module is early road, two half-chip time delay modules in road late; Described correlator is early road correlator, middle road correlator and road correlator late; The initial data of input is delivered to road correlator early, delivers to road half-chip time delay module early simultaneously; Deliver to slow road half-chip time delay module through this morning again after the time-delay of road half-chip time delay module, road correlator in delivering to simultaneously; Data after this slow road half-chip time delay module time-delay are delivered to slow road correlator; Described loop filter, phase regulator and local code word generator and three correlators are linked in sequence; It is characterized in that, also comprise: early road, road pilot tone abstraction module late, early are concerned with and add module in road, slow road, early the road, Chi Luqiu is absolute and module, the branch road comparison module, pilot frequency design generator and the slow road multiplier that is connected with this pilot frequency design generator, road multiplier morning that is connected with slow road multiplier; From the data order of road correlator output morning with morning road pilot tone abstraction module, early the road multiplier, early the relevant module that adds in road is asked definitely with road early and is connected with module, from the data order of slow road correlator output and slow road pilot tone abstraction module, late the road multiplier, be concerned with and add module and definitely be connected with module with Chi Luqiu in the road late; Deliver to the phase difference value indication that the branch road comparator obtains again from morning road, Chi Luqiu two-way absolute value sum absolute and module output and be transported to described loop filter again, through the signal of loop filter filtering again order is connected and to batch transportation to three correlator formation loop tracks with the local code word generator with phase regulator.
7, device according to claim 6 is characterized in that, described morning the road, late the road time delay module can adopt ring-like memory to realize, the time delay that is spaced apart dateout of its output tap.
8, device according to claim 6 is characterized in that, described morning the road, late road pilot tone abstraction module can be realized by the break-make door, open-minded during pilot frequency locations by the break-make that known structure of time slot comes control gate, turn-off all the other positions.
9, device according to claim 6 is characterized in that, the signal of described pilot frequency design generator output is a pilot frequency design.
10, device according to claim 6 is characterized in that, described morning road, the slow relevant some pilot tone plural number addition of modulating, lifting signal to noise ratios of going that add that module will be adjacent in road.
11, device according to claim 6 is characterized in that, the absolute and module of road, Chi Luqiu of described morning is finished the process of asking I, Q two-way absolute value sum.
12, device according to claim 6 is characterized in that, described branch road comparison module relatively early, late branch road absolute and, when morning the road absolute and greater than road late absolute and the time, comparator output " 1 "; When morning the road absolute and equal slow road absolute and the time, comparator output " 0 "; When morning the road absolute and less than road late absolute and the time, comparator output " 1 ".
13, device according to claim 6 is characterized in that, described loop filtering module can adopt the common ring path filter in the PLL phase-locked loop.
14, device according to claim 6 is characterized in that, the phase difference value of described phase adjusted module after according to loop filtering regulated the address of local code word, drives code word generator and produces local code word.
CN99124283A 1999-12-21 1999-12-21 Tracking method and device in CDMA communication system containing pilot channel Expired - Fee Related CN1114292C (en)

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