CN111009516A - Manufacturing method of high-quality LED light source - Google Patents
Manufacturing method of high-quality LED light source Download PDFInfo
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- CN111009516A CN111009516A CN201911204517.1A CN201911204517A CN111009516A CN 111009516 A CN111009516 A CN 111009516A CN 201911204517 A CN201911204517 A CN 201911204517A CN 111009516 A CN111009516 A CN 111009516A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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Abstract
The invention relates to a manufacturing method of a high-quality LED light source, which comprises the following steps: step S1: die bonding, step S2: die bonding and baking, step S3: wire bonding, step S4: box dam, step S5: baking the box dam, and step S6: dispensing fluorescent powder glue, and step S7: phosphor settling, step S8: baking the fluorescent powder glue, and step S9: splitting the plate, step S10: spectroscopic, step S11: packaging, adjusting a welding drawing in step S1 to enable the anode and cathode of the LED array to be distributed in a staggered mode, changing the dispensing position in step S6, adjusting the levelness of the sedimentation process in step S7 to enable the fluorescent powder to firstly deviate towards the anode for 5-60 min, and then placing on a horizontal table. The influence of the P-N junction resistance-capacitance effect on the phosphor powder sedimentation process is eliminated or reduced through process design or structure adjustment, or the influence of the P-N junction resistance-capacitance effect on the phosphor powder sedimentation process is eliminated or reduced through BOM structure adjustment, so that the light uniformity is obviously improved, and the problem of uneven distribution of the phosphor powder is thoroughly improved.
Description
Technical Field
The invention relates to the technical field of LED manufacturing, in particular to a manufacturing method of a high-quality LED light source.
Background
The problem that the LED light source of the polycrystalline array type blue light excitation fluorescent powder has uneven light emitting brightness and light color on the light emitting surface; as shown in fig. 1 to 5, such light emission unevenness is shown in that the fluorescent powder is biased to the cathode direction of the LED array, which causes the light to emit blue (biased to high color temperature) in a region close to the anode of the light source and the light to emit yellow (biased to low color temperature) in a region close to the cathode, and the influence on the LED product of the fluorescent powder sedimentation process is more obvious; the higher the light source voltage is, the larger the LED light emitting surface is, and the more obvious the uneven light emitting problem of the surface is; the reason for the uneven light emitting from the surface is that the LED chip has the resistance-capacitance effect of a P-N junction and the fluorescent powder has a Zeta potential, and the two have the influence together.
Disclosure of Invention
In order to solve the above problems, an object of the present invention is to provide a method for manufacturing a high quality LED light source, which can eliminate or reduce the influence of P-N junction resistance-capacitance effect on the phosphor settling process.
The embodiment of the invention is realized by adopting the following scheme: the manufacturing method of the high-quality LED light source is provided and manufactured according to the following steps: step S1: die bonding, step S2: die bonding and baking, step S3: wire bonding, step S4: box dam, step S5: baking the box dam, and step S6: dispensing fluorescent powder glue, and step S7: phosphor settling, step S8: baking the fluorescent powder glue, and step S9: splitting the plate, step S10: spectroscopic, step S11: packaging; in the step S1, the welding pattern is adjusted to enable the anode and cathode of the LED array to be distributed in a staggered manner, so that the problem of phosphor distribution segregation caused by P-N junction resistance-capacitance effect of the phosphor is reduced; in step S6, changing the dispensing position reduces the problem of phosphor segregation caused by P-N junction resistance-capacitance effect; in step S7, the levelness of the sedimentation process is adjusted to make the phosphor shift toward the anode for 5-60 min, and then the horizontal table is placed to counteract the effect of the phosphor bias toward the cathode caused by the P-N junction resistance-capacitance effect.
In an embodiment of the present invention, in step S7, an accelerated settling manner is further adopted to reduce the influence of the resistance-capacitance effect, where the accelerated settling manner is as follows: centrifugal sedimentation, ultrasonic vibration or thermal sedimentation, wherein the thermal sedimentation is oven sedimentation, tunnel furnace sedimentation or hot plate sedimentation.
In an embodiment of the present invention, in step S7, P-N junction resistance-capacitance discharge is further performed in a manner that the positive electrode and the negative electrode are short-circuited before or during the sedimentation process, so as to eliminate the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor, and improve the uniformity of the color and brightness of the light emitted from the light emitting surface.
In an embodiment of the present invention, in step S7, the intensity of the external electromagnetic field is controlled to cancel the electromagnetic field generated by the P-N junction resistance-capacitance effect by introducing the external electromagnetic field during the sedimentation process, so as to eliminate the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor, improve the uniformity of the light color and brightness of the light emitting surface, and effectively control the distribution of the phosphor during the sedimentation process by introducing the external electromagnetic field.
In one embodiment of the present invention, in step S6, a dense coating is first coated on the surface of the wafer to form an isolation layer between the phosphor glue and the P-N junction of the wafer, and then the phosphor glue is spotted to reduce the influence of the resistance-capacitance effect of the P-N junction on the segregation of the phosphor, wherein the dense coating may be an anti-vulcanizing agent or a high-density silica gel.
The invention has the beneficial effects that: the invention provides a manufacturing method of a high-quality LED light source, which eliminates or reduces the influence of P-N junction resistance-capacitance effect on the fluorescent powder sedimentation process through process design or structure adjustment, or eliminates or reduces the influence of P-N junction resistance-capacitance effect on the fluorescent powder sedimentation process through BOM structure adjustment, and can obviously improve the surface light-emitting quality of an array type LED light source by the above mode, and particularly has an especially obvious improvement effect on the LED array light source with a large light-emitting surface aiming at high voltage; the LED light source has obvious segregation of fluorescent powder before improvement, the fluorescent powder is less distributed in the area close to the anode, the fluorescent powder is more distributed in the area close to the cathode, the light-emitting uniformity of the surface of the LED light source is obviously improved after the LED light source is improved by the manufacturing method, and the problem of uneven distribution of the fluorescent powder is thoroughly improved.
Drawings
Fig. 1 is a schematic diagram of a voltage-positively biased diffusion capacitor.
FIG. 2 is a schematic diagram of a voltage reverse bias potential epitaxy capacitor.
FIG. 3 is a Zeta potential diagram of phosphor particles.
FIG. 4 is a schematic diagram of the LED chip generating diffusion capacitance, i.e., P-N junction RC effect.
FIG. 5 is an electrical representation of the diffusion capacitance of the LED chip, i.e., the P-N junction RC effect.
Fig. 6 is a diagram of a process for dispensing material.
Fig. 7 is an electrical diagram of an LED after process improvement.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
Referring to fig. 1 to 7, the present invention provides a method for manufacturing a high quality LED light source, which comprises the following steps: step S1: die bonding, step S2: die bonding and baking, step S3: wire bonding, step S4: box dam, step S5: baking the box dam, and step S6: dispensing fluorescent powder glue, and step S7: phosphor settling, step S8: baking the fluorescent powder glue, and step S9: splitting the plate, step S10: spectroscopic, step S11: packaging; in the step S1, the welding pattern is adjusted to enable the anode and cathode of the LED array to be distributed in a staggered manner, so that the problem of phosphor distribution segregation caused by P-N junction resistance-capacitance effect of the phosphor is reduced; in step S6, changing the dispensing position reduces the problem of phosphor segregation caused by P-N junction resistance-capacitance effect; in step S7, the levelness of the sedimentation process is adjusted to make the phosphor powder shift toward the anode for 5min to 60min, and then the horizontal table is placed to counteract the effect of the phosphor powder to the cathode bias caused by the P-N junction resistance-capacitance effect, and the preferable shift time may be 5min, 6min, 7min, and so on to 60 min.
Referring to fig. 6 to 7, in an embodiment of the present invention, in step S7, the effect of the rc effect is further reduced by using an accelerated settling method, where the accelerated settling method is as follows: centrifugal sedimentation, ultrasonic vibration or thermal sedimentation, wherein the thermal sedimentation is oven sedimentation, tunnel furnace sedimentation or hot plate sedimentation.
In an embodiment of the present invention, in step S7, P-N junction resistance-capacitance discharge is further performed in a manner that the positive electrode and the negative electrode are short-circuited before or during the sedimentation process, so as to eliminate the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor, and improve the uniformity of the color and brightness of the light emitted from the light emitting surface.
In an embodiment of the present invention, in step S7, the intensity of the external electromagnetic field is controlled to cancel the electromagnetic field generated by the P-N junction resistance-capacitance effect by introducing the external electromagnetic field during the sedimentation process, so as to eliminate the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor, improve the uniformity of the light color and brightness of the light emitting surface, and effectively control the distribution of the phosphor during the sedimentation process by introducing the external electromagnetic field.
In one embodiment of the present invention, in step S6, a dense coating is first coated on the surface of the wafer to form an isolation layer between the phosphor glue and the P-N junction of the wafer, and then the phosphor glue is spotted to reduce the influence of the resistance-capacitance effect of the P-N junction on the segregation of the phosphor, wherein the dense coating may be an anti-vulcanizing agent or a high-density silica gel.
The invention has the following working principle:
controlling the strength of the external electromagnetic field to offset the electromagnetic field generated by the P-N junction resistance-capacitance effect;
the positive electrode and the negative electrode are in short circuit, so that the P-N junction resistance-capacitance discharge is realized, and the P-N junction resistance-capacitance effect is eliminated;
the positive and negative electrodes are distributed in a staggered manner, so that the problem of the segregation of the fluorescent powder distribution caused by P-N junction resistance-capacitance effect of the fluorescent powder is reduced; the problem of phosphor distribution segregation caused by P-N junction resistance-capacitance effect of the phosphor is reduced by changing the dispensing position; and adjusting the levelness of the sedimentation process to ensure that the fluorescent powder firstly deflects towards the anode for a period of time and then is placed on a horizontal table surface to counteract the influence of the fluorescent powder on the cathode bias caused by the P-N junction resistance-capacitance effect.
The above description is only a preferred embodiment of the present invention, and should not be construed as limiting the present invention, and all equivalent variations and modifications made in the claims of the present invention should be covered by the present invention.
Claims (5)
1. A manufacturing method of a high-quality LED light source comprises the following steps: step S1: die bonding, step S2: die bonding and baking, step S3: wire bonding, step S4: box dam, step S5: baking the box dam, and step S6: dispensing fluorescent powder glue, and step S7: phosphor settling, step S8: baking the fluorescent powder glue, and step S9: splitting the plate, step S10: spectroscopic, step S11: packaging, characterized in that: in the step S1, the welding pattern is adjusted to enable the anode and cathode of the LED array to be distributed in a staggered manner, so that the problem of phosphor distribution segregation caused by P-N junction resistance-capacitance effect of the phosphor is reduced; in step S6, changing the dispensing position reduces the problem of phosphor segregation caused by P-N junction resistance-capacitance effect; in step S7, the levelness of the sedimentation process is adjusted to make the phosphor shift toward the anode for 5-60 min, and then the horizontal table is placed to counteract the effect of the phosphor bias toward the cathode caused by the P-N junction resistance-capacitance effect.
2. The method of claim 1, wherein the method further comprises: in the step S7, the influence of the resistance-capacitance effect is also reduced by adopting an accelerated settling mode, where the accelerated settling mode is as follows: centrifugal sedimentation, ultrasonic vibration or thermal sedimentation, wherein the thermal sedimentation is oven sedimentation, tunnel furnace sedimentation or hot plate sedimentation.
3. The method of claim 1, wherein the method further comprises: in the step S7, P-N junction resistance-capacitance discharge is performed in a manner of short-circuiting the positive electrode and the negative electrode before or during the sedimentation process, so that the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor is eliminated, and the uniformity of the color and brightness of the light emitting surface is improved.
4. The method of claim 1, wherein the method further comprises: in the step S7, the intensity of the external electromagnetic field is controlled to counteract the electromagnetic field generated by the P-N junction resistance-capacitance effect by introducing the external electromagnetic field during the sedimentation process, so as to eliminate the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor, and improve the uniformity of the color and brightness of the light emitted from the light emitting surface.
5. The method of claim 1, wherein the method further comprises: in step S6, a dense coating is first coated on the surface of the wafer to form an isolation layer between the phosphor glue and the P-N junction of the wafer, and then the phosphor glue is dispensed to reduce the influence of the P-N junction resistance-capacitance effect on the segregation of the phosphor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911204517.1A CN111009516A (en) | 2019-11-29 | 2019-11-29 | Manufacturing method of high-quality LED light source |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911204517.1A CN111009516A (en) | 2019-11-29 | 2019-11-29 | Manufacturing method of high-quality LED light source |
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| CN111009516A true CN111009516A (en) | 2020-04-14 |
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| CN201911204517.1A Pending CN111009516A (en) | 2019-11-29 | 2019-11-29 | Manufacturing method of high-quality LED light source |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113193097A (en) * | 2021-05-25 | 2021-07-30 | 鸿利智汇集团股份有限公司 | Packaging process of double-color COB |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102244165A (en) * | 2011-07-20 | 2011-11-16 | 福建泰德视讯数码科技有限公司 | LED encapsulation process |
| CN108649106A (en) * | 2018-04-24 | 2018-10-12 | 浙江云科智造科技有限公司 | A kind of LED production technology optimization methods based on big data technology |
| CN109524393A (en) * | 2018-12-26 | 2019-03-26 | 福建天电光电有限公司 | A kind of double-colored COB of tunable optical Tai Ji moulding |
-
2019
- 2019-11-29 CN CN201911204517.1A patent/CN111009516A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102244165A (en) * | 2011-07-20 | 2011-11-16 | 福建泰德视讯数码科技有限公司 | LED encapsulation process |
| CN108649106A (en) * | 2018-04-24 | 2018-10-12 | 浙江云科智造科技有限公司 | A kind of LED production technology optimization methods based on big data technology |
| CN109524393A (en) * | 2018-12-26 | 2019-03-26 | 福建天电光电有限公司 | A kind of double-colored COB of tunable optical Tai Ji moulding |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113193097A (en) * | 2021-05-25 | 2021-07-30 | 鸿利智汇集团股份有限公司 | Packaging process of double-color COB |
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Application publication date: 20200414 |
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