CN110995188B - Filter packaging structure and manufacturing method thereof - Google Patents

Filter packaging structure and manufacturing method thereof Download PDF

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Publication number
CN110995188B
CN110995188B CN201911245331.0A CN201911245331A CN110995188B CN 110995188 B CN110995188 B CN 110995188B CN 201911245331 A CN201911245331 A CN 201911245331A CN 110995188 B CN110995188 B CN 110995188B
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substrate
bonding
layer
bonding layer
pad
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CN110995188A (en
Inventor
王家友
唐滨
唐兆云
赖志国
杨清华
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Beijing Huntersun Electronic Co ltd
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Beijing Huntersun Electronic Co ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
    • H03H3/0073—Integration with other electronic structures
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/0072—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks of microelectro-mechanical resonators or networks
    • H03H3/0075—Arrangements or methods specially adapted for testing microelecro-mechanical resonators or networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H03H9/462—Microelectro-mechanical filters
    • H03H9/465—Microelectro-mechanical filters in combination with other electronic elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H03H9/54—Filters comprising resonators of piezo-electric or electrostrictive material
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/021—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the air-gap type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/023—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the membrane type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/027—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the microelectro-mechanical [MEMS] type

Abstract

The application discloses a resonator packaging structure, which comprises: a resonant cavity in the substrate; a piezoelectric film on the substrate and covering the resonant cavity; a bonding pad located on the substrate and connected with the piezoelectric film; a bonding layer prepared by a deposition or coating process, which is positioned on the substrate and at least covers the bonding pad; a capping layer of organic material is located on the bonding layer. According to the resonator packaging structure, the bonding layer prepared by adopting the deposition process replaces the Si cover plate, the Au-Au bonding is eliminated, and the organic sealing cover layer is combined, so that the cost is reduced, the process is simplified, and the packaging reliability is improved.

Description

Filter packaging structure and manufacturing method thereof
Technical Field
The present application relates to a filter package structure and a method for manufacturing the same, and more particularly, to a cavity type BAW Filter (FBAR) package structure with simplified process and a method for manufacturing the same.
Background
Cavity BAW Filters (FBARs) are known components to realize small and light filters, oscillators, resonating elements and acoustic resonance mass sensors. The cavity type BAW filter can be mass-produced at minimum cost and can be realized to have a very small size. In addition, the FBAR may provide a high quality factor (Q) value, which is a main characteristic of a filter, may be used even in a microwave band, and may also realize a specific band of a Personal Communication System (PCS) and a digital radio system (DCS).
As shown in fig. 1, the conventional FBAR wafer level package structure is currently implemented mainly by using a Si cap plate and an Au-Au bonding process. Specifically, a high-resistance single crystal Si substrate having a resonant cavity is first processed, a piezoelectric film, au pads (dot-like array) electrically connected to the piezoelectric film, and an Au layer (continuous or intermittent ring-like shape) serving as a protective dam at the periphery of the Au pads are formed on the top surface of the Si substrate; then forming similar Au bond points/lines under a high-resistance single-crystal Si cover plate (for process cost saving, a waste or spare piece of high-resistance single-crystal Si substrate with cavities as well is generally used); and pressing the Si cover plate and the Si substrate by an Au-Au bonding process, thinning the top surface of the Si cover plate by a diamond grinding wheel grinding process, and finally forming a contact plug by a Through Silicon Via (TSV) process to electrically connect the Au bonding pad.
In this process, the hard cover plate can provide enough protection capability, but the grinding and thinning process for thinning the cover plate can generate mechanical damage to Si and has a certain thickness limit. And the TSV process needs to adopt etchant or laser drilling to form deep grooves or deep holes with large depth-to-width ratio, so that the accuracy control difficulty is high, the surface of the Au bonding pad is easily damaged, and the contact resistance is increased. Further, since the Si cap plate and the Si substrate are bonded by using a soft Au-based material, the cost is high, and the inclination and dislocation are easily caused by uneven stress in the lamination process, so that the packaging effect is poor.
Disclosure of Invention
Therefore, an object of the present application is to provide a filter package structure with low cost and simplified process and a method for manufacturing the same.
The application provides a filter packaging structure, which comprises: a resonant cavity in the substrate; a piezoelectric film on the substrate and covering the resonant cavity; a bonding pad located on the substrate and connected with the piezoelectric film; a bonding layer prepared by a deposition or coating process, which is positioned on the substrate and at least covers the bonding pad; a capping layer of organic material is located on the bonding layer.
Wherein the bonding layer material is selected from any one or a combination of the following: amorphous silicon, microcrystalline silicon, polycrystalline silicon, silicon oxide, silicon nitride, silicon oxynitride.
Wherein, the welding pad does not contain noble metal; preferably, a seal ring is formed at the periphery of the pad, preferably the seal ring is free of noble metals; optionally, the sacrificial layer pattern fills the void between the seal ring and the bond pad; preferably, the bonding layer engages the top surface of the substrate, the bonding layer overlying the sacrificial pattern.
Wherein, the bonding layer and the piezoelectric film are further provided with a second cavity therebetween.
Wherein the contact hole sequentially passes through the sealing layer and the bonding layer to expose the bonding pad, and preferably has a metal contact plug in the contact hole.
The application also provides a filter packaging method, which comprises the following steps: forming a first sacrificial layer pattern in a substrate; forming a piezoelectric film on the first sacrificial layer pattern; forming a pad connected to the piezoelectric film on the substrate; forming a second sacrificial layer pattern on the piezoelectric film; forming a bonding layer on the second sacrificial layer pattern by adopting a deposition or coating process; forming a capping layer of an organic material on the bonding layer; and etching the sealing layer and the bonding layer in sequence to form a contact hole exposing the welding pad.
Wherein the bonding layer material is selected from any one or a combination of the following: amorphous silicon, microcrystalline silicon, polycrystalline silicon, silicon oxide, silicon nitride, silicon oxynitride.
Wherein, the welding pad does not contain noble metal; preferably, the seal ring is formed at the periphery of the pad while the pad is formed, preferably the seal ring is free of noble metal; preferably, the second sacrificial layer pattern covers not only the piezoelectric film but also the top surface of the substrate between the seal ring and the bond pad.
And after the bonding layer is formed, forming an opening exposing the second sacrificial layer pattern, removing the second sacrificial layer pattern and the first sacrificial layer pattern together by isotropic etching, leaving a resonant cavity in the substrate below the piezoelectric film, and leaving a second cavity above the piezoelectric film.
Wherein, after forming the sealing layer, the sealing layer is solidified and bonded with the bonding layer by adopting a bonding process of heating and pressurizing.
According to the filter packaging structure, the bonding layer prepared by adopting the deposition process replaces the Si cover plate, the Au-Au bonding is eliminated, and the organic sealing cover layer is combined, so that the cost is reduced, the process is simplified, and the packaging reliability is improved.
The stated objects of the application, as well as other objects not listed herein, are met within the scope of the independent claims of the present application. Embodiments of the application are defined in the independent claims and specific features are defined in the dependent claims thereof.
Drawings
The technical solution of the present application is described in detail below with reference to the attached drawings, wherein:
FIG. 1 shows a schematic cross-sectional view of a prior art filter package; and
fig. 2 to 8 are schematic cross-sectional views showing respective steps of a filter package manufacturing process according to an embodiment of the present application.
Detailed Description
Features of the technical scheme and technical effects thereof are described in detail below with reference to the accompanying drawings in combination with the exemplary embodiments, and an FBAR package structure with low cost and simplified process and a method for manufacturing the same are disclosed. It should be noted that like reference numerals refer to like structures and that the terms "first," "second," "upper," "lower," and the like as used herein may be used to modify various device structures. These modifications, unless specifically stated, do not imply a spatial, sequential, or hierarchical relationship to the modified device structures.
As shown in fig. 2, an FBAR basic structure is formed. A substrate 10 is provided, in a preferred embodiment of the application, the substrate 10 is a bulk Si substrate, such as a Si wafer commonly used in CMOS processes, in particular an intrinsically doped (i) or first conductivity type (n-or p-) doped single crystal Si wafer. The material of the substrate 10 may be bulk Ge or SOI, geOI substrate to integrate with MEMS devices or CMOS devices, or compound substrate such as GaN, gaAs, inP, gaP to integrate with LED, OLED, HEMT devices, or even transparent insulating material such as glass, plastic, sapphire, etc. to serve as a cover plate or a base plate of an optoelectronic device. In a preferred embodiment of the present application, the substrate 10 is a translucent or fully transparent material, so that the acoustic sensor or filter comprising the FBAR structure is integrated on the optoelectronic device, in particular the transparent cover plate or base plate thereof, to achieve overall miniaturization of the acousto-optic sensor system. It is further preferred that the substrate 10 is a transparent material and that the mechanical sensor is further integrated with the acousto-optic sensor by varying the local hardness or elastic modulus by doping or annealing etc. processes to achieve the required mass for the MEMS.
The substrate 10 is etched to form a cavity serving as a resonant cavity and to fill the first sacrificial layer 11. The etching is preferably an anisotropic process such as a plasma dry etching or reactive ion etching using a fluorocarbon-based etching gas, or a wet etching process using TMAH, so as to precisely control the sidewall morphology of the resonator, thereby precisely adjusting the quality factor Q of the filter. The first sacrificial layer 11 is formed, for example, by a CVD, oxidation, spin-coating, spray coating, screen printing, or the like process, and is made of a dielectric material capable of rapidly reacting with an acidic etching solution (for example, an HF-based etching solution such as dilute hydrofluoric acid dHF, a slow release etching solution dBOE, or the like), for example, a silicon oxide-based material such as undoped silicon oxide USG, phosphorus doped silicon oxide PSG, porous silicon oxide, or the like. In addition, the first sacrificial layer 11 may be a silicon nitride-based material capable of rapidly reacting with hot phosphoric acid, or a silicon oxynitride-based material capable of rapidly reacting with a strong acid/strong oxidizer mixture such as sulfuric acid/nitric acid and hydrogen peroxide mixture, or an amorphous carbon-based material capable of rapidly reacting with an oxygen plasma etching gas such as graphite, carbon black, graphene, or the like.
The piezoelectric film 12 is formed by PECVD, HDPCVD, MOCVD, in situ oxidation, in situ nitridation, MBE, ALD, etc. processes. The material of the piezoelectric film 12 is, for example, znO, alN, BST (barium strontium titanate), BT (barium titanate), PZT (lead zirconate titanate), PBLN (lead barium lithium niobate), PT (lead titanate), or the like. Preferably, the deposition process, e.g., pressure and temperature, deposition time is controlled to optimize film thickness and quality so that the piezoelectric film is also transparent. And patterning the piezoelectric layer by adopting patterning processes such as etching and the like to form a piezoelectric pattern required by the filter.
The sealing ring 13 located at the outer edge of the package structure and the plurality of pads 14 located inside the package structure and in direct contact with and electrically connected to the piezoelectric film 12 are formed on the substrate by conventional processes such as sputtering, deposition, stripping, etc. (only two may be used, or a plurality may be uniformly distributed around the periphery of the piezoelectric film 12 so as to make the current distribution more uniform). Since the present application does not employ Au-Au bonding process, the seal ring 13 and the pad 14 do not need to be Au-based materials, but may be low-cost conductive metals, metal alloys, metal oxides, or metal nitrides. In the embodiment of the application, the lower electrode material is a metal simple substance such as Mo, W, ru, al, cu, ti, ta, in, zn, zr, fe, mg or a metal alloy, or a conductive oxide and a conductive nitride of the metal. In particular, in order to improve adhesion and resistance to external moisture and/or oxygen, the sealing ring 13 is made of a harder refractory metal (Mo, W, ti, ta, etc.) or a refractory metal nitride (WN, tiN, taN). Preferably, the thickness of the sealing ring 13 and the pad 14 is controlled to be transparent.
Next, the second sacrificial layer 15 is formed on the entire device. The material and process of the second sacrificial layer 15 are preferably the same as those of the first sacrificial layer 11, and will not be described here.
As shown in fig. 3, the second sacrificial layer 15 is patterned so as to expose a portion of the surface of the substrate 10 (e.g., a portion corresponding to the outer edge of the package structure), the seal ring 13, and the pad 14, but still cover the piezoelectric film 12. Patterning is, for example, a photolithography-etching process using a mask (soft photoresist, or hard mask of insulating material), and a mask pattern (not shown) is formed on the layer 15, and the second sacrificial layer 15 is anisotropically etched using the mask pattern as a mask until the surface of the substrate 10 or the seal ring 13 or the pad 14 is exposed. In a preferred embodiment of the present application, the second sacrificial layer 15 and the first sacrificial layer 11 are both oxides of silicon such as USG, PSG, etc., and a fluorocarbon-based etching gas is used to perform a plasma dry etching or RIE, and the etching is terminated at the surface of the substrate 10. Preferably, the remaining second sacrificial layer pattern 15A completely covers the piezoelectric film 12, avoiding the etching gas from affecting the defect state distribution of the piezoelectric film surface, so as to reduce parasitic effects. Further preferably, the second sacrificial layer pattern 15A also covers the top surface of the substrate 10 between the seal ring 13 and the pad 14 to serve as an insulating isolation structure between the seal ring 13 and the pad 14 during a subsequent bonding process, thereby improving the resistance of the package to external moisture or oxygen and the insulating property between metal structures, preventing breakdown of the insulating layer caused by local burrs. It is further preferred that the second sacrificial layer pattern 15A also exposes at least a portion of the surface of the substrate 10 as a mechanical support or seed layer for subsequent deposition or coating of a capping layer.
As shown in fig. 4, a bonding layer 16 of a predetermined thickness/height is formed over the entire device. The bonding layer 16 is preferably a hard material to improve mechanical stability of the package structure. In a preferred embodiment of the present application, the bonding layer 16 is a silicon-based material such as amorphous silicon (amorphous silicon), microcrystalline silicon, polysilicon, or a dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, or the like. The bonding layer 16 may be formed by a deposition process such as LPCVD, PECVD, HDPCVD, MBE, ALD, MOCVD, or by a chemical reaction such as thermal oxidation, in situ steam oxidation, nitridation, or by a coating process such as spray coating, spin coating, screen printing, or the like. The thickness of the layer 16 is controlled such that the bonding layer 16 not only completely covers the second sacrificial layer pattern 15, but also further increases the thickness to create a sufficient cavity height, i.e. for adjusting the cavity height above the piezoelectric film 12 in the final package structure, precisely adjusting the performance of the filter. In a preferred embodiment of the present application, layer 16 has a thickness of 10 to 200 microns, preferably 10 to 100 microns, more preferably 20-40 microns, and most preferably 30 microns. In a preferred embodiment of the present application, the layer 16 can cover not only the top surfaces of the sealing ring 13 and the bonding pad 14, but also directly contact the substrate 10 at the outer edge of the sealing ring 13, thereby improving the mechanical stability of the package structure in a compact package structure, improving the barrier performance of the package to external moisture/oxygen, and effectively prolonging the package life. In particular, since the bonding layer 16 is prepared by a deposition or coating process, the thickness of the bonding layer 16 can be precisely adjusted by simply controlling the process parameters, and an additional back thinning process for a single crystal Si substrate in the prior art is not required, thereby saving the process time, reducing the cost and avoiding the damage problem caused by the thinning process.
As shown in fig. 5, the bonding layer 16 is etched to form a lower contact hole 17 exposing the pad 14, and preferably simultaneously to form an opening 16A exposing the second sacrificial layer pattern 15A over the piezoelectric film 12. The fluorocarbon ratio is adjusted to form the lower contact hole 17 with an aspect ratio exceeding 5:1 or even 10:1 by an anisotropic deep hole/trench etching process, for example, using a fluorocarbon-based etching gas for Si-based materials or dielectric materials of silicon oxide, silicon nitride, silicon oxynitride. In a preferred embodiment of the present application, an opening 16A exposing the second sacrificial layer pattern 15A is formed in synchronization with the lower contact hole 17 for subsequent removal of a first portion of the second sacrificial layer pattern 15A (located above the piezoelectric film 12).
As shown in fig. 6, the first portion of the second sacrificial layer pattern 15A and the first sacrificial layer pattern 11 are removed through the opening 16A by isotropic etching until the piezoelectric film 12 is exposed, leaving the cavity 15B above the piezoelectric film 12 and the cavity 11A in the substrate 10 below the piezoelectric film 12. In a preferred embodiment of the present application, patterns 11 and 15A of silicon oxide material such as USG, PSG, etc. are wet removed using an HF-based etchant. In other embodiments of the present application, the silicon nitride-based patterns 11, 15A are removed using hot phosphoric acid, or the patterns 11, 15A of silicon oxynitride-based material are removed using a strong acid/strong oxidizer mixture such as a sulfuric acid/nitric acid and hydrogen peroxide solution mixture. In still other embodiments, oxygen plasma etching gas is used to remove patterns 11, 15A of amorphous carbon-based materials such as graphite, carbon black, graphene, and the like.
As shown in fig. 7, a capping layer 18 of organic material is formed over the bonding layer 16. The layer 18 is formed, for example, by a low temperature process such as spin coating, spray coating, screen printing, pasting, etc., preferably of a material having a relatively good fluidity and a relatively low hardness, for example, an organic substance such as plastic, resin, polymer, etc. In a preferred embodiment of the present application, layer 18 is preferably a Dry film (Dry film) currently used in the PCB and semiconductor industries, which is solid at low temperature, has a certain fluidity after heating, can have good coating properties, is cured after high temperature lamination, has strong adhesion to a substrate, is chemically stable, has high hardness, is acid-resistant, and can be patterned by exposure and development. More preferably, the UV-irradiated layer 18 may be applied to accelerate cross-linking of the polymeric organics contained in its material to facilitate precise control of morphology. In another preferred embodiment of the present application, the cross-sectional profile of capping layer 18 is controlled using a thermal reflow or radiation process to have a planar surface over piezoelectric film 12 and an upwardly convex or downwardly concave surface on substrate 10 in the region of the optoelectronic device (sensor or light emitting device) to act as an optical lens. Preferably, a thermal and pressure bonding process is used to cure capping layer 18 and bond with bonding layer 16 as a capping layer to protect the FBAR filter below it in the package structure. The protective structure of the combination of the organic layer 18 and the inorganic layer 16 can further improve the protective strength and effectively prevent the penetration of moisture or oxygen compared with the single-layer structure of the inorganic sealing layer or the organic sealing layer in the prior art.
As shown in fig. 8, an upper contact hole 18A is formed through the capping layer 18 in communication with the lower contact hole 17 using an anisotropic etching (e.g., photoresist removal process) or (mechanical and/or laser) drilling process until the pad 14 is exposed. Thereafter, the filler metal forms contact plugs (not shown). A metal conductive layer is formed in the contact hole 17 by a deposition process with good conformality such as MOCVD, MBE, ALD, thereby constituting a contact plug electrically connected to the piezoelectric film 12 through the pad 14 as an input/output terminal of the filter.
The final filter package structure is shown in fig. 8, and includes a substrate 10, a resonant cavity 11A in the substrate 10, a piezoelectric film 12 on the resonant cavity 11A, a bonding pad 14 in contact with and electrically connected to the piezoelectric film 12, a sealing ring 13 at an edge of the substrate 10, a sacrificial layer pattern 15A on a top surface of the substrate 10 between the sealing ring 13 and the bonding pad 14, a bonding layer 16 formed by a deposition or coating process on the substrate 10 to cover the substrate 10, the bonding pad 14, the sealing ring 13 and preferably the sacrificial layer pattern 15A, an organic capping layer 18 on the bonding layer 16, and contact holes 18A/17 penetrating through the organic capping layer 18 and the bonding layer 16 in order to expose the bonding pad 14, and a second cavity 15B and an opening 16A under the organic capping layer 18 above the piezoelectric film 12. The specific dimensions and materials of the various components of the filter package structure are as previously described and will not be described in detail herein.
Compared with the traditional processing flow, the application has the following advantages:
the amorphous silicon deposition replaces Si Cap Jin Jinjian bonding, reduces the difficulty of the bonding process,
meanwhile, the use of gold is reduced, and the cost is greatly reduced;
the Si Cap is replaced by amorphous silicon deposition, eliminating the process of processing Si Cap separately;
the thickness of the amorphous silicon can be controlled without the need for lapping thinning of the Cap compared to Si Cap.
According to the filter packaging structure, the bonding layer prepared by adopting the deposition process replaces the Si cover plate, the Au-Au bonding is eliminated, and the organic sealing cover layer is combined, so that the cost is reduced, the process is simplified, and the packaging reliability is improved.
While the application has been described with reference to one or more exemplary embodiments, it will be understood by those skilled in the art that various suitable changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the application. In addition, many modifications may be made to adapt a particular situation or material to the teachings disclosed without departing from the scope of the application. Therefore, it is intended that the application not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out this application, but that the device structure and method of making the same will include all embodiments falling within the scope of the present application.

Claims (16)

1. A filter package structure, comprising:
a resonant cavity in the substrate;
a piezoelectric film on the substrate and covering the resonant cavity;
a bonding pad located on the substrate and connected with the piezoelectric film;
the sealing ring is positioned at the outer edge of the packaging structure;
a bonding layer prepared by a deposition or coating process, which is positioned on the substrate and at least covers and contacts a part of the top surface of the sealing ring and the top surface of the welding pad, wherein the bonding layer directly contacts the substrate at the outer edge of the sealing ring;
the sealing layer of the organic material is positioned on the bonding layer, and the organic material is solid at low temperature and has certain fluidity after being heated.
2. The filter package structure of claim 1, wherein the bonding layer material is selected from any one or a combination of the following: amorphous silicon, microcrystalline silicon, polycrystalline silicon, silicon oxide, silicon nitride, silicon oxynitride.
3. The filter package of claim 1, wherein the bond pad is free of precious metals.
4. A filter package structure according to claim 3, wherein a seal ring is formed on the periphery of the pad, the seal ring being free of noble metal.
5. The filter package structure of claim 1, wherein the sacrificial layer pattern fills a void between the seal ring and the bond pad.
6. The filter package structure of claim 5, wherein the bonding layer engages the top surface of the substrate, the bonding layer covering the sacrificial pattern.
7. The filter package structure of claim 1, wherein the bonding layer and the piezoelectric film further have a second cavity therebetween.
8. The filter package structure of claim 1, wherein the contact hole exposes the pad through the capping layer and the bonding layer in sequence.
9. The filter package structure of claim 8, having a metal contact plug in the contact hole.
10. A method of filter encapsulation, comprising:
forming a first sacrificial layer pattern in a substrate;
forming a piezoelectric film on the first sacrificial layer pattern;
forming a pad connected to the piezoelectric film on the substrate;
forming a second sacrificial layer pattern on the piezoelectric film;
forming a bonding layer on the second sacrificial layer pattern by adopting a deposition or coating process, wherein the bonding layer covers and contacts a part of the top surface of the bonding pad;
forming a sealing cover layer of an organic material on the bonding layer, wherein the organic material is solid at low temperature and has certain fluidity after being heated;
and etching the sealing layer and the bonding layer in sequence to form a contact hole exposing the welding pad.
11. The filter packaging method of claim 10, wherein the bonding layer material is selected from any one or a combination of the following: amorphous silicon, microcrystalline silicon, polycrystalline silicon, silicon oxide, silicon nitride, silicon oxynitride.
12. The filter packaging method of claim 10, wherein the bond pad is free of precious metals.
13. The filter packaging method according to claim 12, wherein the bonding pad is formed while the sealing ring is formed on the periphery of the bonding pad and thereafter the bonding layer directly contacts the substrate at the outer edge of the sealing ring, the sealing ring being free of noble metal.
14. The filter packaging method of claim 13, wherein the second sacrificial layer pattern covers not only the piezoelectric film but also the top surface of the substrate between the seal ring and the bonding pad.
15. The filter packaging method according to claim 10, wherein an opening exposing the second sacrificial layer pattern is formed after the bonding layer is formed, the second sacrificial layer pattern and the first sacrificial layer pattern are removed together by isotropic etching, leaving a resonant cavity in the substrate under the piezoelectric film, leaving a second cavity over the piezoelectric film.
16. The filter encapsulation method of claim 10, wherein the capping layer is cured and bonded to the bonding layer using a heat and pressure bonding process after the capping layer is formed.
CN201911245331.0A 2019-12-06 2019-12-06 Filter packaging structure and manufacturing method thereof Active CN110995188B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911245331.0A CN110995188B (en) 2019-12-06 2019-12-06 Filter packaging structure and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911245331.0A CN110995188B (en) 2019-12-06 2019-12-06 Filter packaging structure and manufacturing method thereof

Publications (2)

Publication Number Publication Date
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CN112290901B (en) * 2020-09-04 2024-04-26 浙江大学杭州国际科创中心 Cavity type film bulk acoustic resonator packaging structure and preparation method thereof
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CN112087209B (en) * 2020-09-27 2024-02-23 苏州汉天下电子有限公司 Resonator manufacturing method

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CN108512523A (en) * 2017-11-06 2018-09-07 贵州中科汉天下微电子有限公司 The encapsulating method and structure of piezoelectric sound wave device
CN110266285A (en) * 2019-05-31 2019-09-20 武汉大学 A kind of micromechanical resonator, its preparation and frequency trim bearing calibration

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CN108512523A (en) * 2017-11-06 2018-09-07 贵州中科汉天下微电子有限公司 The encapsulating method and structure of piezoelectric sound wave device
CN110266285A (en) * 2019-05-31 2019-09-20 武汉大学 A kind of micromechanical resonator, its preparation and frequency trim bearing calibration

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