CN110991072B - SRAM single-particle transient effect simulation analysis method and system - Google Patents
SRAM single-particle transient effect simulation analysis method and system Download PDFInfo
- Publication number
- CN110991072B CN110991072B CN201911283331.XA CN201911283331A CN110991072B CN 110991072 B CN110991072 B CN 110991072B CN 201911283331 A CN201911283331 A CN 201911283331A CN 110991072 B CN110991072 B CN 110991072B
- Authority
- CN
- China
- Prior art keywords
- sram
- model
- file
- fault injection
- simulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
Landscapes
- Tests Of Electronic Circuits (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
The invention provides a simulation analysis method and a simulation analysis system for SRAM single event transient effect, which can support SRAM hybrid simulation, and add simulation information of a device level into simulation of a circuit level to perform single event effect simulation analysis. The method comprises the following steps: analyzing a structural model of an SRAM unit device, adding a single event effect physical model, and extracting a single event effect current source pulse; establishing a multi-LET single event effect pulse current source equivalent model and generating a simulation model which can be used by SPICE; extracting all sensitive nodes in the SRAM according to an SRAM circuit netlist file provided by a user to generate an SRAM sensitive node list file; according to the generated SPICE available multi-LET single event effect pulse current source equivalent model, combining with an SRAM sensitive circuit node list file, compiling a script to randomly select an SRAM node and fault injection time, and generating a fault injection file; and respectively calculating a turnover threshold value and a turnover section.
Description
The technical field is as follows:
the invention belongs to the field of radiation effect simulation, and relates to a method for simulating an SRAM flip section under a single event effect.
Background art:
with the continuous reduction of the characteristic size of the semiconductor process and the continuous increase of the working frequency of the device, the number of soft errors caused by single event transient (SEU) in the SRAM is continuously increased. Therefore, a simulation method is needed to evaluate the single event effect of the SRAM. A new method is proposed for evaluating the flip threshold and the flip section of the SRAM.
Currently, one method for performing single event effect simulation on SRAM is to add a square wave pulse width to perform simulation test on the circuit. However, the influence of the single event effect cannot be accurately simulated by the simulation, and according to the classical theory, the influence of the radiation effect of the NMOS transistor can be equivalent to a double-exponential current source pulse. The waveform of the pulse is related to device parameters and physical parameters of single particle incidence, but the model is not suitable for radiation analysis of the SRAM.
Disclosure of Invention
The invention provides a method and a system for simulating an SRAM flip section under a single event effect, which can analyze the SRAM flip section under the single event effect.
The solution of the invention is as follows:
a simulation analysis method for SRAM single event transient effect comprises the following steps:
according to an SRAM unit device structure model (namely SRAM layout) provided by a user, extracting a single event effect current source pulse by combining a single event injection physical model;
analyzing the single event effect current source pulse, establishing a multi-LET pulse current source model and generating a simulation model excitation file which can be used by SPICE;
extracting all sensitive nodes in the SRAM according to an SRAM circuit netlist file (namely an SPICE description file of the SRAM) provided by a user to generate an SRAM sensitive node list file;
according to the multi-LET pulse current source model (simulation model excitation file), in combination with the SRAM sensitive node list file, a script is compiled to randomly select SRAM nodes and fault injection time, and a fault injection file for turnover threshold analysis and turnover section calculation is generated; the fault injection file for the turnover threshold analysis comprises node information of one injection node, fault injection time and a fault injection model, and the fault injection file for the turnover section calculation comprises node information of a plurality of injection nodes, fault injection time and a fault injection model;
reading a fault injection file and an SRAM unit device structure model, simulating by using SPICE, analyzing the response condition after injecting pulse current sources corresponding to different LET values, and determining a turnover threshold;
reading an SRAM circuit netlist file and a fault injection file provided by a user, performing multiple times of simulation under different LET values by randomly selecting circuit nodes and peak value proportionality coefficients, counting the average error number under each LET, and calculating the flip section of the SRAM under different LETs.
Particularly preferably, the multi-LET pulse current source model is established, a spline interpolation method is adopted to interpolate sampling points into a smooth curve, and a Weibull function is used for parameter fitting.
Specifically, preferably, the generating of the fault injection file for the rollover threshold analysis and the rollover section calculation is to select a required pulse current source model in the simulation model excitation file according to an LET value selected by a user, and add a random circuit node (node), a random injection time (time), and a random current peak value and pulse width function (factor), where the random current peak value and pulse width function (factor) are normally distributed random functions.
An SRAM single event transient effect simulation analysis system, comprising:
the device-level SRAM unit simulation module is used for extracting a single event effect current source pulse according to an SRAM unit device structure model (namely the SRAM layout) provided by a user and by combining a single event injection physical model;
the multi-LET pulse current source model establishing module is used for analyzing the single-event-effect current source pulse, establishing a multi-LET pulse current source model and generating a simulation model excitation file which can be used by SPICE;
the SRAM sensitive node analysis module is used for extracting all sensitive nodes in the SRAM according to an SRAM circuit netlist file (namely an SPICE description file of the SRAM) provided by a user and generating an SRAM sensitive node list file;
the fault injection configuration module is used for compiling a script to randomly select SRAM nodes and fault injection time according to the multi-LET pulse current source model (simulation model excitation file) and by combining the SRAM sensitive node list file, and generating a fault injection file for turnover threshold analysis and turnover section calculation; the fault injection file for the turnover threshold analysis comprises node information of one injection node, fault injection time and a fault injection model, and the fault injection file for the turnover section calculation comprises node information of a plurality of injection nodes, fault injection time and a fault injection model;
the SRAM overturn threshold analysis module is used for reading a fault injection file and an SRAM unit device structure model, simulating by using SPICE, analyzing the response condition after injecting pulse current sources corresponding to different LET values, and determining an overturn threshold;
and the SRAM flip section calculation module is used for reading an SRAM circuit netlist file and a fault injection file provided by a user, performing multiple times of simulation under different LET values by randomly selecting circuit nodes and peak value proportionality coefficients, counting the average error number under each LET, and calculating the flip sections of the SRAM under different LETs.
Based on the scheme of the SRAM single event transient effect simulation analysis system, further optionally:
the multi-LET pulse current source model building module specifically adopts a spline interpolation method to interpolate sampling points into smooth curves, and uses a Weibull function to perform parameter fitting.
The SRAM sensitive node analysis module specifically extracts all sensitive nodes in the SRAM circuit netlist file by using a Perl language and a C-shell language writing script.
The fault injection configuration module specifically selects a required pulse current source model in the simulation model excitation file according to an LET value selected by a user by using a script written by Perl language and C-shell language, and adds a random circuit node (node), random injection time (time) and a random current peak value and pulse width function (factor), wherein the random current peak value and the pulse width function (factor) are normally distributed random functions.
The SRAM rollover threshold analysis module specifically uses a Perl language script, adopts a fixed step length and a dichotomy to analyze, reads a pulse current source fault injection model and an SRAM unit model, uses SPICE to take different LET fault injection models as objects, simulates an SRAM unit, and analyzes a rollover threshold.
If the incidence number of the high-energy particles in a unit area is F, and after incidence, n nodes in the SRAM circuit netlist are subjected to single-particle upset, the single-particle upset cross section of the device is as follows:
the SRAM flip section calculation module specifically utilizes a Finesim simulator to perform simulation, utilizes a Perl script to generate a fault comparison result, utilizes Hercules software to analyze and obtain the total area of each module sensitive node area and the number statistics of flip nodes in the SRAM unit device structural model, and obtains the actual single particle injection number and the equivalent error number of each module through a module area equivalent method to calculate the flip section.
The sensitive node is the drain electrode of the NMOS tube.
The invention has the following technical effects:
aiming at the SRAM single event effect, the invention analyzes a current source pulse equivalent model of the SRAM single event transient pulse, provides a single event current source transient pulse fitting model based on WeiBull function, the model can match different LET (particle incident linear energy transfer) values, and simultaneously provides a transient pulse injection model with normal distribution randomness based on the model so as to simulate the actual SRAM single event effect, and finally realizes the analysis of the SRAM unit upset threshold and the upset section.
Drawings
FIG. 1 is a flow chart of a simulation method of an SRAM flip section under a single event effect.
FIG. 2 is a three-dimensional model of a six-tube SRAM cell (with Al, Ti, W, SiO removed) 2 )。
FIG. 3 is a diagram of a six-transistor cell transistor of an SRAM.
FIG. 4 is SRAM potential distribution (Al, W, SiO removed) after initial state simulation 2 )。
FIG. 5 is a diagram illustrating the extraction of sensitive nodes of the SRAM circuit.
FIG. 6 shows the results of the cell scan analysis at normal temperature and pressure.
Detailed Description
Each module of the simulation method of the SRAM flip section under the single event effect of the present invention is further described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the simulation method of the flip section of the SRAM under the single event effect includes: the device-level SRAM model simulation system comprises a device-level SRAM unit simulation module, a multi-LET model pulse current source model establishing module, an SRAM sensitive node analysis module, a fault injection configuration module, an SRAM turning threshold analysis module and an SRAM turning section calculation module. The method can support SRAM hybrid simulation, and adds device-level simulation information into circuit-level simulation to perform single event effect simulation analysis.
The device-level SRAM cell simulation module firstly draws an SRAM six-tube cell layout (130nm process, drawn transistor width-length ratio is consistent with that of a transistor used for SPICE simulation), as shown in FIG. 2. Using CogendaTCAD software to complete simulation, and building the SRAM six-tube listAfter the elementary three-dimensional model is analyzed for single-particle sensitivity, initial state simulation is firstly carried out, and data are stored in a unit. The word line WL voltage is set to 1.2V, the bit line BL is set to 1.2V, and the bit line non-BLB is set to 0V. In the initial state simulation, the Q node is written with high level 1, and the QN node is written with low level 0. The particle incidence point should select the sensitive point of the target circuit, and the single particle sensitivity of the target circuit can be accurately acquired only when the particle is incident at the most sensitive position and the most sensitive state. Due to the bistable structure of the SRAM, as shown in fig. 3, the potential of the drain region may jump to the low potential of the P-well under particle bombardment to flip the storage state of the SRAM, so the NMOS drain of the left inverter is a sensitive region, and the incident point is selected in this region. LET values were set to 0.4, 0.5, 0.56, 0.58, 0.6, 0.7, 0.8MeV cm, respectively 2 The/mg, the particle is vertically incident to the NMOS drain center of the inverter on the left side of the SRAM, and the node turning conditions of the Q and QN of the SRAM six-tube unit are shown in FIG. 4. By the initial state simulation, the SRAM single event effect pulse current source model can be obtained.
According to a simulation result of the TCAD, because of the problem of few sampling points of the TCAD, the sampling points are interpolated into a smooth curve by adopting a spline interpolation method, and a Weibull function is used for parameter fitting on the basis, wherein the fitting function is as follows:
calculating the parameter t 0 :
To add the LET variables to the parameter fit state, the parameters are quadratic fit with LET values, the fit function and results are as follows (130nm SMIC SRAM as an example):
and establishing a current source pulse model according to the fitting result and generating a simulation model excitation file which can be used by SPICE, wherein the simulation model excitation file is realized by using PWL.
The flow of the SRAM sensitive node analyzing module is shown in fig. 5, and all circuit nodes of the SRAM are extracted by using a Perl script and a circuit node list file is formed. According to the rule of the SMIC SRAM netlist, the extraction mode of the memory cell module is inconsistent with that of the peripheral circuit. For the storage unit module, a list file of all storage nodes is formed mainly according to the naming rule of each 6-pipe storage unit. For peripheral circuits, the extraction is mainly performed according to the arrangement order of the transistor ports in the SPICE syntax.
The fault injection configuration module configures a plurality of simulation parameters. And distributing the number of fault current sources injected into each functional module according to the proportion occupied by each functional module in the layout. In order to fully simulate the randomness of space particles to circuit bombardment, random parameters of 'node' (random circuit node), 'time' (random injection time) and 'factor' (random current peak value and pulse width) are added into an established pulse model file to further construct a fault injection current source template file in a PWL form, a Perl script is used for realizing the randomness of the parameters in the current source template file, a pulse current source fault injection file for transistor-level simulation is generated and added into a circuit netlist, and a tool is used for sequentially connecting transient current values of all time points according to time and adding the transient current values to randomly selected circuit nodes to realize fault injection during simulation, so that the interaction between single particles and a circuit is simulated.
An SRAM (static random access memory) turnover threshold analysis module reads a pulse current source fault injection file and an SRAM six-tube unit model, simulation is carried out by using an SPICE (simulation program with integrated circuit emphasis) and a turnover threshold is calculated;
for example, simulation analysis is performed on six-tube memory cells in 8K (512x16bit) SRAM manufactured by SMIC 130nm technology. And carrying out single event effect equivalent current source fault injection on the post-simulation netlist with the parasitic RC parameters, and analyzing the response condition of the six-tube unit after injecting the current sources corresponding to different LET values. The power supply voltage is 1.2V, the process corner selects TT, the simulation temperature is set to be 25 ℃, and the potential change condition of a node BC after fault current sources corresponding to different LET values are injected is shown in figure 6.
For SRAM with SMIC 130nm technology, the single event upset LET threshold of the memory cell is 0.6Mev cm 2 /mg。
And the SRAM flip section calculation module reads the SRAM circuit netlist (SRAM SPICE netlist) and the fault injection file so as to calculate the flip section of the SRAM.
The upset cross section is used to indicate the probability of a single event upset after the high energy particles are incident on the semiconductor device. Assuming that the amount of injected particles is F (number of injections/cm) -2 ) That is, the number of incident high-energy particles per unit area, after incidence, n bits have single-particle upset, and the single-particle upset cross section of the device is:
wherein the unit of σ is cm -2 . The larger the overturning section is, the poorer the single event effect resistance of the characterization device is.
In order to accurately estimate the flip section, a sampling investigation method is adopted. And randomly selecting 40 storage nodes in the storage unit module for fault injection according to the proportional relation of each module in the SRAM layout. Considering that the angle of the high-energy particles incident to the semiconductor device is random, and the transient currents generated by different incident angles are different but have certain similarity, the peak value proportionality coefficient factor of the current source in the setting is 0.7-1, namely, the script randomly selects different random numbers between 0.7-1. The fault injection configuration script randomly selects circuit nodes and peak value proportional coefficients, simulates 100 times under different LET values, counts the average error number under each LET through the script, obtains the actual single particle injection number and the equivalent error number of each module through a module area equivalent method, and calculates the flip section of the SRAM under different LET values.
Claims (10)
1. A simulation analysis method for SRAM single-event transient effect is characterized by comprising the following steps:
extracting single event effect current source pulses according to an SRAM unit device structure model provided by a user and by combining a single event injection physical model;
analyzing the single event effect current source pulse, establishing a multi-LET pulse current source model and generating a simulation model excitation file which can be used by SPICE;
extracting all sensitive nodes in the SRAM according to an SRAM circuit netlist file provided by a user to generate an SRAM sensitive node list file;
according to the multi-LET pulse current source model, in combination with the SRAM sensitive node list file, compiling a script to randomly select SRAM nodes and fault injection time, and generating a fault injection file for turnover threshold analysis and turnover section calculation; the fault injection file for the turnover threshold analysis comprises node information of one injection node, fault injection time and a fault injection model, and the fault injection file for the turnover section calculation comprises node information of a plurality of injection nodes, fault injection time and a fault injection model;
reading a fault injection file and an SRAM unit device structure model, simulating by using SPICE, analyzing the response condition after injecting pulse current sources corresponding to different LET values, and determining a turnover threshold;
reading an SRAM circuit netlist file and a fault injection file provided by a user, performing multiple times of simulation under different LET values by randomly selecting circuit nodes and peak value proportionality coefficients, counting the average error number under each LET, and calculating the flip section of the SRAM under different LETs.
2. The SRAM single event transient effect simulation analysis method of claim 1, wherein the multiple LET pulse current source model is established, a spline interpolation method is adopted to interpolate sampling points into a smooth curve, and a Weibull function is used for parameter fitting.
3. The simulation analysis method for the single event transient effect of the SRAM according to claim 1, wherein the generating of the fault injection file for the inversion threshold analysis and the inversion cross-section calculation is specifically to select a required pulse current source model in the simulation model excitation file according to an LET value selected by a user, and add a random circuit node (node), a random injection time (time), and a random current peak value and a pulse width function (factor), wherein the random current peak value and the pulse width function (factor) are random functions of normal distribution.
4. An SRAM single-event transient effect simulation analysis system is characterized by comprising:
the device-level SRAM unit simulation module is used for extracting single-event effect current source pulses according to an SRAM unit device structure model provided by a user and in combination with a single-event injection physical model;
the multi-LET pulse current source model establishing module is used for analyzing the single-event-effect current source pulse, establishing a multi-LET pulse current source model and generating a simulation model excitation file which can be used by SPICE;
the SRAM sensitive node analysis module is used for extracting all sensitive nodes in the SRAM according to the SRAM circuit netlist file provided by a user and generating an SRAM sensitive node list file;
the fault injection configuration module is used for compiling scripts to randomly select SRAM nodes and fault injection time according to the multi-LET pulse current source model and by combining the SRAM sensitive node list file, and generating a fault injection file for turnover threshold analysis and turnover section calculation; the fault injection file for the turnover threshold analysis comprises node information of one injection node, fault injection time and a fault injection model, and the fault injection file for the turnover section calculation comprises node information of a plurality of injection nodes, fault injection time and a fault injection model;
the SRAM overturn threshold analysis module is used for reading a fault injection file and an SRAM unit device structure model, simulating by using SPICE, analyzing the response condition after injecting pulse current sources corresponding to different LET values, and determining an overturn threshold;
and the SRAM flip section calculation module is used for reading an SRAM circuit netlist file and a fault injection file provided by a user, performing multiple times of simulation under different LET values by randomly selecting circuit nodes and peak value proportionality coefficients, counting the average error number under each LET, and calculating the flip sections of the SRAM under different LETs.
5. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: the multi-LET pulse current source model building module specifically adopts a spline interpolation method to interpolate sampling points into a smooth curve, and uses a Weibull function to perform parameter fitting.
6. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: the SRAM sensitive node analysis module specifically extracts all sensitive nodes in an SRAM circuit netlist file by writing scripts by using a Perl language and a C-shell language.
7. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: the fault injection configuration module specifically selects a required pulse current source model in the simulation model excitation file according to an LET value selected by a user by using a script written by Perl language and C-shell language, and adds a random circuit node (node), random injection time (time) and a random current peak value and pulse width function (factor), wherein the random current peak value and the pulse width function (factor) are normally distributed random functions.
8. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: the SRAM rollover threshold analysis module specifically uses a Perl language script, adopts a fixed step length and a dichotomy to analyze, reads a pulse current source fault injection model and an SRAM unit model, uses SPICE to take different LET fault injection models as objects, simulates an SRAM unit, and analyzes a rollover threshold.
9. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: if the incidence number of the high-energy particles in a unit area is F, and after incidence, n nodes in the SRAM circuit netlist are subjected to single-particle upset, the single-particle upset cross section of the device is as follows:
the SRAM flip section calculation module specifically utilizes a Finesim simulator to perform simulation, utilizes a Perl script to generate a fault comparison result, utilizes Hercules software to analyze and obtain the total area of each module sensitive node area and the number statistics of flip nodes in the SRAM unit device structural model, and obtains the actual single particle injection number and the equivalent error number of each module through a module area equivalent method to calculate the flip section.
10. The SRAM single-event transient effect simulation analysis system of claim 4, wherein: the sensitive node is the drain electrode of the NMOS tube.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911283331.XA CN110991072B (en) | 2019-12-13 | 2019-12-13 | SRAM single-particle transient effect simulation analysis method and system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911283331.XA CN110991072B (en) | 2019-12-13 | 2019-12-13 | SRAM single-particle transient effect simulation analysis method and system |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110991072A CN110991072A (en) | 2020-04-10 |
CN110991072B true CN110991072B (en) | 2022-09-20 |
Family
ID=70093407
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911283331.XA Active CN110991072B (en) | 2019-12-13 | 2019-12-13 | SRAM single-particle transient effect simulation analysis method and system |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110991072B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112036110B (en) * | 2020-08-31 | 2024-04-12 | 北京时代民芯科技有限公司 | Module level circuit instantaneous dose rate effect simulation test method |
CN112329374B (en) * | 2020-10-29 | 2022-09-20 | 西安电子科技大学 | Single event effect rapid simulation method for large-scale circuit |
CN112858891B (en) * | 2021-02-25 | 2022-06-07 | 中国人民解放军国防科技大学 | Automatic detection method for circuit sensitive node |
CN113221460B (en) * | 2021-05-20 | 2022-09-20 | 西安电子科技大学 | Single-event transient effect modeling method based on neural network regression |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108508351B (en) * | 2018-03-30 | 2020-05-05 | 西北核技术研究所 | Single event fault injection simulation method based on double-exponent current source |
CN108363894B (en) * | 2018-05-04 | 2021-05-11 | 西安电子科技大学 | Circuit-level single event effect simulation platform |
CN109918723B (en) * | 2019-01-30 | 2022-12-06 | 西安电子科技大学 | Single-particle fault injection method based on particle incidence randomness |
-
2019
- 2019-12-13 CN CN201911283331.XA patent/CN110991072B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN110991072A (en) | 2020-04-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110991072B (en) | SRAM single-particle transient effect simulation analysis method and system | |
CN108363894B (en) | Circuit-level single event effect simulation platform | |
US8001493B2 (en) | Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions | |
Naseer et al. | Critical charge characterization for soft error rate modeling in 90nm SRAM | |
US20070220455A1 (en) | Method and computer program for efficient cell failure rate estimation in cell arrays | |
CN108508351B (en) | Single event fault injection simulation method based on double-exponent current source | |
US9471732B2 (en) | Equivalent device statistical modeling for bitline leakage modeling | |
CN113158602B (en) | Single-particle transient current source modeling method aiming at incidence of different inclination angles | |
Sayil et al. | Modeling single event crosstalk in nanometer technologies | |
CN110909516A (en) | Modeling method considering influence of shape and size of active region in single event effect circuit simulation | |
US11062766B2 (en) | Enhanced read sensing margin and minimized VDD for SRAM cell arrays | |
CN111243657A (en) | Effective random fault injection method for memory circuit | |
Garcia-Redondo et al. | On the design and analysis of reliable RRAM-CMOS hybrid circuits | |
Tsiligiannis et al. | SRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations | |
Royer et al. | Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm | |
Francis et al. | Efficient modeling of single event transients directly in compact device models | |
Francis et al. | Significance of strike model in circuit-level prediction of charge sharing upsets | |
Spasova et al. | SRAM design based on carbon nanotube field effect transistor's model with modified parameters | |
JP7466665B2 (en) | Design of dynamic random access memory pass transistors with statistical variations in leakage current. | |
CN111079356B (en) | Single-particle reinforcement effectiveness system-level verification method | |
US8239801B2 (en) | Architecturally independent noise sensitivity analysis of integrated circuits having a memory storage device and a noise sensitivity analyzer | |
Guibbaud et al. | New combined approach for the evaluation of the soft-errors of complex ICs | |
TW201525742A (en) | Method and system of fast nested-loop circuit verification for process and environmental variation and hierarchical circuits | |
Wang et al. | Spice Circuit Reduction for Speeding Up Simulation and Verification | |
Barceló et al. | An SET propagation EDA tool based on analytical glitch propagation model |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |