CN1109674A - Method for packaging unpackaged integrate circuit into circuit board - Google Patents

Method for packaging unpackaged integrate circuit into circuit board Download PDF

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Publication number
CN1109674A
CN1109674A CN 94103917 CN94103917A CN1109674A CN 1109674 A CN1109674 A CN 1109674A CN 94103917 CN94103917 CN 94103917 CN 94103917 A CN94103917 A CN 94103917A CN 1109674 A CN1109674 A CN 1109674A
Authority
CN
China
Prior art keywords
circuit board
circuit
integrated circuits
packaged
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 94103917
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Chinese (zh)
Inventor
刘妍佞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YAQUAN CO Ltd
Original Assignee
YAQUAN CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YAQUAN CO Ltd filed Critical YAQUAN CO Ltd
Priority to CN 94103917 priority Critical patent/CN1109674A/en
Publication of CN1109674A publication Critical patent/CN1109674A/en
Pending legal-status Critical Current

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Abstract

The preent invention relates to a method for enclosing unenclosed integrated circuit in circuit board, including the following steps: firstly an unenclosed intgrated circuit and a circuit board whose size is suitable to be processed by lead bonding device are provided, and then the unenclosed integrated circuit is bonded to the circuit board whose size is suitable to be processed by lead bonding device by attaching leads; second, the described lead bonding operation of said circuit board is completed, and then the surface of said unenclosed integrated circuit is coated with a colloidl protective layer, and finally the above-mentioned circuit board whose leads are bonded is welded to a main circuit board whose area is larger.

Description

Method for packaging unpackaged integrate circuit into circuit board
The present invention is the method that a kind of not packaged integrated circuits is packaged in circuit board, is meant a kind of method that output, reduction fraction defective and cost-effective not packaged integrated circuits are packaged in circuit board that improves especially.
Wire-bonded (WIRE BONDING) is one formality of integrated circuit manufacture process, be that a end with aluminum steel is soldered to the not integrated circuit weld pad (PAD of encapsulation (UNPACKAGED), it is the contact point of IC interior and extraneous conducting) on, the other end of aluminum steel then is soldered on the pin of integrated circuit, does electric connection.
And have at present a kind of will be not packaged integrated circuits and the integrated circuit (chip for example of pin is not arranged as yet, DICE just) the direct technology of wire-bonded on circuit board, mainly be that the integrated circuit that this is not packaged is adhered on the circuit board earlier, and then carry out the operation of wire-bonded.This technology can be saved the formality of integrated circuit encapsulation, therefore can reduce the cost of production of integrated circuits widely.
Above-mentioned not packaged integrated circuits directly is bonded on the method on the circuit board, mainly be that the adhesion of not packaged integrated circuit (for example chip) row is fixed on the circuit board, and then it is fixed on the wire bonder, wire bonder can revolve three-sixth turn with circuit board, again the chip on the circuit board is carried out wire-bonded.
And this kind incited somebody to action the not technology of the direct wire-bonded of packaged integrated circuits on circuit board, the influence that the speed of its production is subjected to the circuit board size is very big, as described below: (one) is concerning the operator, the operator of operation wire bonder is to be fixed on the wire bonder board with forefinger and the thumb circuit board of taking, because about the about 1cm to 1.5cm of width of forefinger, thumb, the ifs circuit plate is during less than 1cm, and operator is not easy to take.And if during greater than 5cm, operation industry member can can't stablize and takes apace and be put on the board, so the size of circuit board directly has influence on output.(2) for the wire-bonded board, board is anchor clamps in order to the device of fixing circuit board, and these anchor clamps are to clamp circuit board in three fixing modes, cooperate machine that circuit board is rotated again, makes the machine can be wire-bonded to relevant position.But this kind is when the size of circuit board is not very big, not bad to rotate the mode that the wire-bonded position is provided; When but the size of ifs circuit plate is very big, then can cause torque excessive, the error that rotates to the location is also bigger, thus wire bonder beat the location error also bigger, that is to say that defective products can increase a lot.
Therefore, at present generally for the board anchor clamps fixed maximum admissible dimension specification be 7cm * 11cm, the minimum admissible dimension specification is 1cm * 2cm, and generally acknowledges that at present optimal dimensions is 2.5cm * 4cm.
Comprehensive above explanation as can be known, circuit board is too big or too little all inconvenient to wire bonding process, has only size when about 2.5cm * 4cm, just can reach maximum output.
But on electronics industry, the essential variation of the function of product could attract client, and the just essential circuit that will be bigger of the functional diversities of product is carried this bigger circuit so need bigger circuit board to hold.So on wire bonder now, remain at the enterprising line lead of very large circuit board and engage, thus can cause the position error of foregoing wire bonder can be bigger, thereby can cause the phenomenon of short circuit or open circuit.This is for the circuit board and chip of expensive price, if because the accurate location of wire-bonded is just caused and scrapped, can differently cherish very much.
Main purpose of the present invention is to be to provide a kind of to remove from when large circuit board carries out the wire-bonded operation, cause and engage wrong shortcoming, and can produce fast, method that not encapsulated integrated circuit that failure rate is low is packaged in circuit board.
The present invention is characterized in that packaged integrated circuits elder generation wire-bonded is not on the circuit board of a fritter, the circuit board with this fritter is welded on the bigger circuit board again.
For achieving the above object, the invention provides the method that a kind of not packaged integrated circuits is packaged in circuit board, its step is as follows: at first, (its size is about 2.5cm * 4cm) to the circuit board that provides not packaged integrated circuits (for example chip) and size to be fit to wire bonder to handle, this integrated circuit that does not encapsulate is adhered on the foregoing circuit plate with colloid earlier, again this circuit board is seated on the anchor clamps of routing machine fixing, give routing then, be covered with one deck colloid protective layer not being encapsulated in integrated circuit at last; Then, above-mentioned routing is good circuit board is soldered on the bigger main circuit board of area again.
The present invention not packaged integrated circuits is packaged in the method for circuit board, and the key step of its preferred embodiment is as follows:
At first; (its size is about 2.5cm * 4cm) to the circuit board that provides not packaged integrated circuits (for example chip) and size to be fit to wire bonder to handle; with this packaged integrated circuits adhere on the foregoing circuit plate earlier with colloid; again this circuit board is seated on the anchor clamps of wire bonder fixing; carry out wire-bonded then, can be covered with one deck colloid protective layer in packaged integrated circuits not at last.
Then, after described circuit board is finished wire-bonded, on the integrated integrated circuit surface of not encapsulation, coat the colloid protective layer again, with the protection integrated circuit.
At last, above-mentioned wire-bonded is good circuit board is welded on the bigger main circuit board of area again.
Via the above-mentioned method that provides, wire bonder just not packaged integrated circuits at the enterprising line lead joint of the bigger circuit board of area, be fit to the less enterprising line lead joint of circuit board of area that wire bonder is handled in size earlier and only depend on, this circuit board that engages is soldered on the bigger main circuit plate of area more then, just do not need direct routing on large circuit board, cause short circuit or the situation that opens circuit yet with regard to the wire-bonded mistake not taking place.

Claims (2)

1, a kind of not packaged integrated circuits is packaged in the method for circuit board, comprise the following steps: at first, provide not that packaged integrated circuits and size are fit to the circuit board that wire bonder is handled, with this not packaged integrated circuits be fit to the enterprising line lead of circuit board that wire bonder handles in described size and engage; Then, after described circuit lead joint is finished, do not coating the colloid protective layer on the packaged integrated circuits surface again; At last, above-mentioned wire-bonded is good circuit board is soldered on the bigger main circuit board of area again.
2, not packaged integrated circuits as claimed in claim 1 is packaged in the method for circuit board, it is characterized in that: the circuit board size that described size is fit to the wire bonder processing approximately is 2.5cm * 4cm.
CN 94103917 1994-04-01 1994-04-01 Method for packaging unpackaged integrate circuit into circuit board Pending CN1109674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 94103917 CN1109674A (en) 1994-04-01 1994-04-01 Method for packaging unpackaged integrate circuit into circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 94103917 CN1109674A (en) 1994-04-01 1994-04-01 Method for packaging unpackaged integrate circuit into circuit board

Publications (1)

Publication Number Publication Date
CN1109674A true CN1109674A (en) 1995-10-04

Family

ID=5031335

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 94103917 Pending CN1109674A (en) 1994-04-01 1994-04-01 Method for packaging unpackaged integrate circuit into circuit board

Country Status (1)

Country Link
CN (1) CN1109674A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1051881C (en) * 1997-07-10 2000-04-26 深圳市振华微电子有限公司 Manufacture of circuit module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1051881C (en) * 1997-07-10 2000-04-26 深圳市振华微电子有限公司 Manufacture of circuit module

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C01 Deemed withdrawal of patent application (patent law 1993)
WD01 Invention patent application deemed withdrawn after publication