CN110945605B - Method for manufacturing laminated electronic component - Google Patents
Method for manufacturing laminated electronic component Download PDFInfo
- Publication number
- CN110945605B CN110945605B CN201880048740.9A CN201880048740A CN110945605B CN 110945605 B CN110945605 B CN 110945605B CN 201880048740 A CN201880048740 A CN 201880048740A CN 110945605 B CN110945605 B CN 110945605B
- Authority
- CN
- China
- Prior art keywords
- external electrode
- electronic component
- forming
- laminated electronic
- sintered body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/30—Apparatus or processes specially adapted for manufacturing resistors adapted for baking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
- H01C17/283—Precursor compositions therefor, e.g. pastes, inks, glass frits
- H01C17/285—Precursor compositions therefor, e.g. pastes, inks, glass frits applied to zinc or cadmium oxide resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/1006—Thick film varistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/43—Electric condenser making
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Thermistors And Varistors (AREA)
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
A sintered body in which ceramic layers and internal electrodes were alternately laminated was obtained. A1 st external electrode connected to the internal electrode is formed on a side surface of the sintered body. The sintered body having the 1 st external electrode formed thereon was entirely coated with glass. The 2 nd external electrode was formed on the side surface of the glass-coated sintered body. With this method, in the laminated electronic component, the electrical connection between the internal electrode and the external electrode can be stabilized.
Description
Technical Field
The present invention relates to a method for manufacturing a laminated electronic component used in various electronic devices.
Background
In recent years, surface-mount electronic components include various electronic components in addition to laminated ceramic capacitors and laminated ceramic varistors. Although no particular problem arises when the size of these electronic components is small, if the size of the electronic components becomes large due to the handling of a large capacity or a large current, mechanical stress may be generated due to the difference in linear expansion coefficient between the circuit board material and the ceramic, and the electronic components may be damaged. Therefore, in the conventional electronic component, lead terminals formed by processing a metal plate are mounted on external electrodes on both end surfaces of the electronic component, and the electronic component is mounted on a circuit board via the lead terminals.
For example, patent document 1 discloses a conventional electronic component similar to the above electronic component.
Prior art documents
Patent document
Patent document 1: JP-A2000-306764
Disclosure of Invention
A sintered body in which ceramic layers and internal electrodes were alternately laminated was obtained. A1 st external electrode connected to the internal electrode is formed on a side surface of the sintered body. The sintered body having the 1 st external electrode formed thereon was entirely coated with glass. A No. 2 external electrode was formed on the side surface of the sintered body coated with glass. By this method, the electrical connection between the internal electrode and the external electrode can be stabilized in the laminated electronic component.
Drawings
Fig. 1A is a perspective view of a laminated electronic component in the embodiment.
Fig. 1B is a cross-sectional view of the laminated electronic component shown in fig. 1A at line 1B-1B.
Fig. 2 is a sectional view showing a method of manufacturing a laminated electronic component according to the embodiment.
Fig. 3 is a sectional view showing a method of manufacturing a laminated electronic component according to the embodiment.
Fig. 4 is a sectional view showing a method of manufacturing a laminated electronic component in the embodiment.
Fig. 5 is a sectional view showing a method of manufacturing a laminated electronic component according to the embodiment.
Fig. 6 is a sectional view showing a method of manufacturing a laminated electronic component in the embodiment.
Fig. 7 is a sectional view showing a method of manufacturing a laminated electronic component according to the embodiment.
Fig. 8 is a sectional view showing a method of manufacturing a laminated electronic component according to the embodiment.
Detailed Description
Fig. 1A is a perspective view of a laminated electronic component 1000 in the embodiment. Fig. 1B is a cross-sectional view of the laminated electronic component 1000 shown in fig. 1A at line 1B-1B. In an embodiment, the laminated electronic component 1000 is a laminated ceramic varistor.
The laminated electronic component 1000 includes: the sintered body 11, an insulating layer 15 provided on the sintered body 11, external electrodes 13A, 13B provided on the sintered body 11, an external electrode 14A provided on the external electrode 13A, an external electrode 14B provided on the external electrode 13B, a plating layer 16A provided on the external electrode 14A, a plating layer 16B provided on the external electrode 14B, a bonding material 18A provided on the plating layer 16A, a bonding material 18B provided on the plating layer 16B, a lead terminal 17A bonded to the plating layer 16A, i.e., the external electrode 14A, via the bonding material 18A, and a lead terminal 17B bonded to the plating layer 16B, i.e., the external electrode 14B, via the bonding material 18B. The sintered body 11 includes a plurality of insulating layers 22 and internal electrodes 12A and 12B alternately stacked on each other. The sintered body 11 has: side surface 11A where internal electrode 12A is exposed; side surface 11B where internal electrode 12B is exposed; a mounting surface 11C connected to the side surfaces 11A and 11B; an opposite surface 11D connected to the side surfaces 11A and 11B and opposite to the mounting surface 11C; surface 11E coupled to side surfaces 11A, 11B, mounting surface 11C, and facing surface 11D; surface 11F coupled to side surfaces 11A, 11B, mounting surface 11C, and facing surface 11D and opposite to surface 11E. The insulating layer 15 is provided on the mount surface 11C, the opposite surface 11D, and the surfaces 11E, 11F of the sintered body 11. The laminated electronic component 1000 is configured to be mounted on a mounting object 2001 such as a circuit board by connecting lead terminals 17A and 17B to the mounting object 2001.
A method for manufacturing the laminated electronic component 1000 will be described below. Fig. 2 to 8 are cross-sectional views for explaining a method of manufacturing the laminated electronic component 1000.
A mixed material obtained by adding bismuth oxide or the like to zinc oxide and mixing a plasticizer, a binder or the like is formed into a sheet shape, thereby forming a plurality of green sheets 122. A binder or the like is mixed with the silver powder to form the paste 112 for internal electrodes. The internal electrode paste 112 is printed on the plurality of green sheets 122 and stacked so that the green sheets 122 and the internal electrode paste 112 are alternately arranged, and then the plurality of stacked bodies 111 shown in fig. 2 are formed by singulation. The plurality of stacked bodies 111 are fired at about 900 ℃ to obtain a plurality of sintered bodies 11. At this time, the green sheet 122 and the internal electrode paste 112 are fired simultaneously to form the insulating layer 22 and the internal electrodes 12A and 12B, respectively. The corners of the sintered body 11 are chamfered by mixing and stirring the plurality of sintered bodies 11 with the abrasive, and the internal electrodes 12A, 12B are exposed on the side surfaces 11A, 11B on the opposite sides of the sintered body 11, respectively. Thereby, the sintered body 11 shown in fig. 2 is obtained. The internal electrode 12A is not exposed at the side surface 11B, and the internal electrode 12B is not exposed at the side surface 11A. The sintered body 11 had a width of about 7mm, a length of about 9mm and a height of about 3mm.
A conductor paste obtained by mixing silver powder with a binder or the like is prepared. Next, a plurality of sintered bodies 11 are aligned such that the exposed side surfaces 11A of the internal electrodes 12A are aligned and the exposed side surfaces 11B of the internal electrodes 12B are aligned, a conductor paste is printed on the side surfaces 11A, 11B of the sintered bodies 11 so as to cover the exposed internal electrodes 12A, 12B, respectively, and the external electrodes 13A, 13B are formed by firing at about 800 ℃. At this time, since the external electrodes 13A and 13B are directly contacted with the internal electrodes 12A and 12B exposed from the side surfaces 11A and 11B, the electrical connection between the internal electrodes 12A and 12B and the external electrodes 13A and 13B can be stabilized. The thickness of the external electrodes 13A, 13B is about 20 μm. The region of the insulating layer 22 sandwiched between the internal electrodes 12A and 12B determines the electrical characteristics of the laminated electronic component 1000. Since the external electrodes 13A and 13B are formed using a conductor paste in which silver powder and a binder or the like are mixed, it is possible to prevent a substance other than the dielectric powder as a conductor, which affects the electrical characteristics of the laminated electronic component 1000, from diffusing into the region, and to stabilize the electrical characteristics.
As shown in fig. 4, for example, a coating liquid 501 for glass coating, which is a suspension of a silica powder 502 composed of a submicron-sized silica powder 502 and a medium liquid 503 in which the silica powder 502 is dispersed, is prepared. Next, as shown in fig. 4, the intermediate member 1001, which is the sintered body 11 on which the external electrodes 13A and 13B are formed, is immersed in the coating liquid 501, and the entire intermediate member 1001 is coated with glass. At this time, silica powder 502 adheres to the surfaces of external electrodes 13A and 13B and surfaces 11C to 11F (see fig. 1A and 1B) of sintered body 11. Thereafter, the intermediate member 1001 integrally glass-coated is heat-treated at about 900 ℃ to form an intermediate member 1002 shown in fig. 5. The silicon dioxide powder 502 adhering to the surfaces 11C to 11F, which are the green bodies of the zinc oxide of the sintered body 11, reacts with the zinc of the zinc oxide of the insulating layer 22, and the stable insulating layer 15 is formed over the entire surfaces 11C to 11F of the sintered body 11. By forming such a stable insulating layer 15 on the entire surface 11C to 11F exposed from the external electrodes 13A and 13B except the external electrodes 13A and 13B, the laminated electronic component 1000 having excellent reliability can be obtained. In the intermediate member 1002 shown in fig. 5, silicon dioxide is attached to the surfaces of the external electrodes 13A, 13B and silicon dioxide layers 51A, 51B are formed, respectively.
A mixed paste obtained by mixing a silver powder and a glass frit with a binder or the like was prepared. Next, the plurality of sintered bodies 11, that is, the intermediate member 1002, are arranged so that the side surfaces on which the external electrodes 13A are formed are aligned and the side surfaces on which the external electrodes 13B are formed are aligned, the mixed paste is applied to the external electrodes 13A, 13B so as to completely cover the external electrodes 13A, 13B without exposing the external electrodes 13A, 13B, and the external electrodes 14A, 14B shown in fig. 6 are formed by firing at about 700 ℃. The external electrodes 14A and 14B have larger areas than the external electrodes 13A and 13B, and surround the peripheries of the external electrodes 13A and 13B, respectively. At this time, a part of the silica layers 51A and 51B attached to the surfaces of the external electrodes 13A and 13B diffuses into the glass frit in the external electrodes 14A and 14B as the mixed paste. This ensures that the external electrodes 13A and 13B are electrically connected to the external electrodes 14A and 14B. As a method of applying the mixed paste, a printing process is preferably used, but an immersion process may also be used. However, even in this case, it is preferable to apply the coating to only almost the side surface of the intermediate member 1002. Since the glass frit-containing silver paste is used for forming the external electrodes 14A and 14B, the external electrodes 14A and 14B can be fixed to the external electrodes 13A and 13B and the sintered body 11 with sufficient strength.
Next, plating layers 16A, 16B are formed on the external electrodes 14A, 14B, respectively, by electroplating to form a separate member 1003 shown in fig. 7. The plating layer 16A (16B) has: a two-layer structure including a nickel plating layer formed on the external electrodes 14A (14B) and a tin plating layer formed on the nickel plating layer. In an embodiment, the nickel plating layer has a thickness of about 3 μm and the tin plating layer has a thickness of about 5 μm.
After punching a plate of iron or phosphor bronze into a predetermined shape, the plate is bent into an L-shape to prepare lead terminals 17A and 17B. Plating layers of nickel and tin are formed on the lead terminals 17A, 17B, and bonding layers 18A, 18B are provided on regions in contact with the external electrodes 14A, 14B, respectively, with a bonding material such as solder. Next, as shown in fig. 8, lead terminals 17A and 17B are connected to the plating layers 16A and 16B, i.e., the external electrodes 14A and 14B, respectively. The lead terminals 17A and 17B are brought into contact with the external electrodes 14A and 14B and the bonding layers 18A and 18B, and the solder of the bonding layers 18A and 18B is melted by heating with a laser or the like, and the lead terminals 17A and 17B are connected to the external electrodes 14A and 14B, whereby the multilayer electronic component 1000 with lead terminals can be obtained. By forming the external electrodes 13A, 13B and the external electrodes 14A, 14B by printing, the surfaces of the external electrodes 14A, 14B (plating layers 16A, 16B) in contact with the lead terminals 17A, 17B can be made flat, and the bonding layers 18A, 18B can be spread along the lead terminals 17A, 17B from the side surfaces 11A, 11B of the sintered body 11 beyond the mounting surface 11C toward the mounted object 2001. With this configuration, stress from the lead terminals 17A and 17B can be dispersed, and the reliability of the laminated electronic component 1000 can be further improved.
The individual member 1003 shown in fig. 7 and 8 has: when the laminated electronic component 1000 is mounted on a mounting object 2001 (see fig. 1B) such as a circuit board, the mounting surface 53C facing the mounting object 2001 and the facing surface 53D on the opposite side of the mounting surface 53C are provided. When the lead terminals 17A, 17B are connected to the external electrodes 14A, 14B, the lead terminals 17A, 17B are connected to the external electrodes 14A, 14B in a state where the facing surface 53D of the separate member 1003 is positioned downward and brought into contact with the reference surface 54, and the ends 117A, 117B of the lead terminals 17A, 17B are brought into contact with the reference surface 54 and aligned with the facing surface 53D. The external electrodes 14A, 14B formed by the above method can be hardly attached to the opposite surface 53D of the separate member 1003. Therefore, by the above-described positioning, the mounting positions of the lead terminals 17A and 17B can be stabilized, the laminated electronic component 1000 can be easily mounted on the mounting object 2001 with high accuracy, and the mounting property can be improved.
In the above-described conventional electronic component, if a positional deviation occurs when the lead terminals are mounted, the following problem occurs when the electronic component is mounted on the circuit board. In a conventional surface-mounted electronic component with a lead terminal, the lead terminal is mounted on a component for general surface mounting, and in the electronic component, an electrode is formed on a mounting surface of the electronic component by a method such as dip (dip) for mounting on a circuit board. Therefore, electrodes are formed on the electronic component other than the mounting surface, such as the upper surface and the side surface. When the lead terminals are mounted based on the outer shape of the electronic component, positional deviation may occur due to the difference in thickness of the electrodes.
As described above, the laminated electronic component 1000 according to the embodiment can be easily mounted on the mounting object 2001 with high accuracy, and the mountability can be improved.
When the lead terminals 17A and 17B are positioned, the portion of the separate member 1003 farthest from the mounting surface 53C is brought into contact with the reference surface 54 on the opposite side of the mounting surface 53C. In the individual part 1003 shown in fig. 8, the plating layers 16A and 16B are in contact with the reference surface 54. In the embodiment, in order to reliably suppress the difference in the positions of the lead terminals 17A and 17B due to the difference in the sintered bodies 11, it is preferable that the insulating layer 15 be spaced apart from the mounting surface 53C on the opposite side of the mounting surface 53C from the external electrodes 14A and 14B.
-description of symbols-
11. Sintered body
12A, 12B internal electrodes
13A, 13B external electrodes (No. 1 external electrode)
14A, 14B external electrodes (No. 2 external electrode)
15. Insulating layer
16A, 16B plating layer
17A, 17B conductor terminal
18A, 18B bonding layer
Claims (9)
1. A method of manufacturing a laminated electronic component, comprising:
preparing a laminate including alternately laminated ceramic layers and internal electrodes and having side surfaces where the internal electrodes are exposed;
firing the laminate to obtain a sintered body having a side surface where the internal electrode is exposed;
forming a 1 st external electrode connected to the internal electrode on the side surface of the sintered body;
forming an insulating layer on the entire surface of the sintered body other than the 1 st external electrode by coating the entire sintered body having the 1 st external electrode formed thereon with a glass coating;
a step of forming a 2 nd external electrode on the 1 st external electrode, thereby obtaining a separate member provided with the sintered body, the insulating layer, the 1 st external electrode, and the 2 nd external electrode; and
a step of connecting the plate-like lead terminals to the No. 2 external electrodes via a bonding layer,
the individual component has a mounting surface facing a mounting object in a state where the laminated electronic component is mounted on the mounting object,
the bonding layer extends from the 2 nd external electrode along the lead terminal beyond the mounting surface in a state where the laminated electronic component is mounted on a mounting object.
2. The method for manufacturing a laminated electronic component according to claim 1,
the step of forming the 1 st external electrode includes: a step of forming the 1 st external electrode on the side face of the sintered body by a printing process.
3. The method for manufacturing a laminated electronic component according to claim 2,
the step of forming the 2 nd external electrode includes: a step of forming the 2 nd external electrode on the 1 st external electrode by a printing process.
4. The method of manufacturing a laminated electronic component according to claim 1,
the step of forming the 1 st external electrode includes: a step of applying a conductive paste containing silver to the side surface of the sintered body,
the step of forming the 2 nd external electrode includes: a step of applying a mixed paste containing silver and glass frit to the 1 st external electrode.
5. The method of manufacturing a laminated electronic component according to claim 4,
the step of forming the 2 nd external electrode further comprises: and firing the mixed paste applied to the 1 st external electrode.
6. The method of manufacturing a laminated electronic component according to claim 4,
the step of forming the insulating layer includes: a step of immersing the sintered body having the 1 st external electrode formed thereon in a suspension of silica powder to coat the glass with the silica powder to form the insulating layer so that silica remains on the surface of the 1 st external electrode,
the step of forming the 2 nd external electrode includes: and a step of applying the mixed paste on the surface of the residual silicon dioxide of the 1 st external electrode.
7. The method of manufacturing a laminated electronic component according to claim 4,
the step of forming the 1 st external electrode further comprises: a step of firing the applied conductor paste.
8. The method for manufacturing a laminated electronic component according to claim 1,
further comprising the step of connecting a lead terminal to the 2 nd external electrode.
9. The method for manufacturing a laminated electronic component according to claim 8,
the step of forming the 2 nd external electrode includes: a step of obtaining a single member provided with the sintered body, the insulating layer, the 1 st external electrode, and the 2 nd external electrode,
the individual components have: a mounting surface facing the mounting object when the laminated electronic component is mounted on the mounting object, and an opposite surface opposite to the mounting surface,
the step of connecting the lead terminal to the 2 nd external electrode includes:
a step of positioning the wire terminal by aligning the opposite face of the separate member with an end portion of the wire terminal; and
connecting the positioned lead terminal with the 2 nd external electrode.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017-197380 | 2017-10-11 | ||
JP2017197380 | 2017-10-11 | ||
PCT/JP2018/034534 WO2019073762A1 (en) | 2017-10-11 | 2018-09-19 | Layered electronic component production method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110945605A CN110945605A (en) | 2020-03-31 |
CN110945605B true CN110945605B (en) | 2023-01-03 |
Family
ID=66100032
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201880048740.9A Active CN110945605B (en) | 2017-10-11 | 2018-09-19 | Method for manufacturing laminated electronic component |
Country Status (4)
Country | Link |
---|---|
US (2) | US11387023B2 (en) |
JP (2) | JP7361250B2 (en) |
CN (1) | CN110945605B (en) |
WO (1) | WO2019073762A1 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08330107A (en) * | 1995-03-24 | 1996-12-13 | Tdk Corp | Stacked-type varistor |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58111915U (en) * | 1982-01-25 | 1983-07-30 | 日本電気株式会社 | Multilayer ceramic capacitor |
JPS6284921U (en) * | 1985-11-15 | 1987-05-30 | ||
DE69632659T2 (en) * | 1995-03-24 | 2005-06-09 | Tdk Corp. | multilayer varistor |
JP2000164406A (en) * | 1998-11-25 | 2000-06-16 | Murata Mfg Co Ltd | Chip type electronic part and manufacture thereof |
JP2000223359A (en) | 1999-01-29 | 2000-08-11 | Murata Mfg Co Ltd | Ceramic electronic component |
JP2000235932A (en) | 1999-02-16 | 2000-08-29 | Murata Mfg Co Ltd | Ceramic electronic component |
JP2000306764A (en) | 1999-04-23 | 2000-11-02 | Murata Mfg Co Ltd | Ceramic electronic component and production thereof |
JP3476800B2 (en) * | 2001-08-22 | 2003-12-10 | Tdk株式会社 | Radial lead type multilayer ceramic electronic components |
US20080239621A1 (en) * | 2007-03-29 | 2008-10-02 | Azizuddin Tajuddin | Clip-on leadframe |
JP4978307B2 (en) * | 2007-05-24 | 2012-07-18 | 株式会社村田製作所 | Electronic component with lead wire, and method for manufacturing electronic component with lead wire |
JP5353251B2 (en) * | 2009-01-07 | 2013-11-27 | Tdk株式会社 | Multilayer capacitor and multilayer capacitor mounting structure |
JP5664574B2 (en) | 2011-03-18 | 2015-02-04 | 株式会社村田製作所 | Multilayer ceramic capacitor |
JP5375877B2 (en) * | 2011-05-25 | 2013-12-25 | Tdk株式会社 | Multilayer capacitor and multilayer capacitor manufacturing method |
CN203085375U (en) * | 2012-12-24 | 2013-07-24 | 日科能高电子(苏州)有限公司 | Pin cutter of aluminum electrolytic capacitor |
JP2015012052A (en) | 2013-06-27 | 2015-01-19 | 株式会社村田製作所 | Ceramic thermistor |
JP6295803B2 (en) | 2014-04-24 | 2018-03-20 | 株式会社Lib総合開発 | Method for producing lithium oxyfluorophosphate |
JP6620413B2 (en) | 2015-03-30 | 2019-12-18 | 日本ケミコン株式会社 | Capacitor and manufacturing method thereof |
CN205752078U (en) * | 2016-05-10 | 2016-11-30 | 南京萨特科技发展有限公司 | Pin configuration heavy-current micro fuse |
CN106024231B (en) * | 2016-05-27 | 2018-07-10 | 辰硕电子(九江)有限公司 | A kind of preparation method of zinc oxide varistor tile |
JP7034613B2 (en) * | 2017-06-29 | 2022-03-14 | 太陽誘電株式会社 | Ceramic electronic components and their manufacturing methods, as well as electronic component mounting boards |
-
2018
- 2018-09-19 WO PCT/JP2018/034534 patent/WO2019073762A1/en active Application Filing
- 2018-09-19 JP JP2019547963A patent/JP7361250B2/en active Active
- 2018-09-19 CN CN201880048740.9A patent/CN110945605B/en active Active
- 2018-09-19 US US16/622,572 patent/US11387023B2/en active Active
-
2022
- 2022-06-13 US US17/838,961 patent/US20220310291A1/en not_active Abandoned
- 2022-08-25 JP JP2022133821A patent/JP7394292B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08330107A (en) * | 1995-03-24 | 1996-12-13 | Tdk Corp | Stacked-type varistor |
Also Published As
Publication number | Publication date |
---|---|
JP7394292B2 (en) | 2023-12-08 |
US20220310291A1 (en) | 2022-09-29 |
JPWO2019073762A1 (en) | 2020-09-17 |
US20200194151A1 (en) | 2020-06-18 |
JP2022166301A (en) | 2022-11-01 |
WO2019073762A1 (en) | 2019-04-18 |
US11387023B2 (en) | 2022-07-12 |
CN110945605A (en) | 2020-03-31 |
JP7361250B2 (en) | 2023-10-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11482371B2 (en) | Electronic component | |
US10068709B2 (en) | Electronic component and method for manufacturing the same | |
JP2017204565A (en) | Laminated coil component | |
CN104867673A (en) | Multilayer ceramic electronic component and board having the same mounted thereon | |
JP6520433B2 (en) | Laminated coil parts | |
KR101031111B1 (en) | Complex Ceramic Chip Component capable for surface-mounting | |
US11915852B2 (en) | Electronic component | |
CN116884769A (en) | Electronic component and method for manufacturing electronic component | |
JP2018046228A (en) | Electronic component | |
US4953273A (en) | Process for applying conductive terminations to ceramic components | |
CN110620012A (en) | Multilayer ceramic electronic component and board for mounting of multilayer ceramic electronic component | |
JP4849123B2 (en) | Manufacturing method of multilayer capacitor | |
CN116130243A (en) | Electronic component | |
CN111029139B (en) | Multilayer ceramic electronic component array | |
US10614946B2 (en) | Electronic component | |
CN110945605B (en) | Method for manufacturing laminated electronic component | |
JP2001015371A (en) | Chip-type ceramic electronic component and manufacture thereof | |
JP7055588B2 (en) | Electronic components | |
JPH10116707A (en) | Chip type thermistor and its manufacturing method | |
JP7012219B2 (en) | Manufacturing method of laminated varistor | |
JPH0563928B2 (en) | ||
JP7300589B2 (en) | Laminated varistor manufacturing method and laminated varistor | |
JP2017195309A (en) | Lamination coil component | |
US12125627B2 (en) | Multilayer inductor component | |
US20210383960A1 (en) | Multilayer inductor component |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |