CN110941046B - Method for manufacturing SOI silicon grating - Google Patents

Method for manufacturing SOI silicon grating Download PDF

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Publication number
CN110941046B
CN110941046B CN201911161749.3A CN201911161749A CN110941046B CN 110941046 B CN110941046 B CN 110941046B CN 201911161749 A CN201911161749 A CN 201911161749A CN 110941046 B CN110941046 B CN 110941046B
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silicon
grating
forming
silicon grating
layer
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CN110941046A (en
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张鹏
唐波
李志华
李彬
刘若男
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/124—Geodesic lenses or integrated gratings
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035—Materials
    • G02B2006/12061—Silicon
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/12107—Grating
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12166—Manufacturing methods
    • G02B2006/12176—Etching

Abstract

The invention relates to the technical field of semiconductor technology, in particular to a manufacturing method of an SOI (silicon on insulator) silicon grating, which comprises the following steps: forming a silicon grating on an SOI substrate; and hydrogen annealing treatment is carried out on the silicon grating, the annealing temperature is 800-975 ℃, and the roughness of the side wall of the silicon grating can be obviously improved by adopting the hydrogen annealing mode with the annealing temperature of 800-975 ℃, so that the coupling loss of the silicon grating is reduced.

Description

Method for manufacturing SOI silicon grating
Technical Field
The invention relates to the technical field of semiconductor processes, in particular to a manufacturing method of an SOI silicon grating.
Background
The grating is a diffraction element with wide application, and the grating is made of silicon, and the crystal structure of the silicon material and the micro-processing method are mature, so the grating is developed rapidly.
However, in the existing process of forming the SOI silicon grating, the silicon grating a is obtained by etching with the photoresist, and the sidewall of the etched silicon grating a is relatively rough due to the roughness of the photoresist and the roughness caused by the etching equipment, so that the coupling loss of the silicon grating a is affected. As shown in fig. 1 and 2.
Therefore, how to improve the coupling loss of the formed silicon grating is a technical problem to be solved.
Disclosure of Invention
In view of the above problems, the present invention has been made to provide a metal oxide field effect transistor and a method of fabricating the same that overcome or at least partially solve the above problems.
The embodiment of the invention provides a method for manufacturing an SOI (silicon on insulator) silicon grating, which comprises the following steps:
forming a silicon grating on an SOI substrate;
and carrying out hydrogen annealing treatment on the silicon grating, wherein the annealing temperature is 800-975 ℃.
Further, before forming the silicon grating on the SOI substrate, the method further includes:
and forming the SOI substrate.
Further, the forming the SOI substrate specifically includes:
a buried oxide layer is formed on a silicon substrate such that a top silicon layer is formed on the buried oxide layer.
Further, the forming a buried oxide layer on a silicon substrate specifically includes:
and implanting oxygen ions into the silicon substrate to form the oxygen buried layer.
Further, the forming a buried oxide layer on a silicon substrate specifically includes:
respectively forming oxide layers on the two silicon substrates;
connecting the two oxidation layers to form the buried oxide layer.
Further, forming a silicon grating on the SOI substrate specifically includes:
forming a photoresist layer on the SOI substrate;
etching the photoresist layer based on a silicon grating pattern to be formed, and etching the photoresist layer to the inside of the top silicon layer;
and removing the residual photoresist layer to form the silicon grating.
Furthermore, the thickness of the oxygen burying layer is 2-3 mu m.
Further, the silicon grating is subjected to hydrogen annealing treatment, and the chamber pressure of an annealing chamber is 20 Torr-1 atm.
Further, hydrogen annealing treatment is carried out on the silicon grating, and the annealing time is 30-120 s.
Further, hydrogen annealing treatment is carried out on the silicon grating, and the hydrogen flow is 20-180L/min.
One or more technical solutions in the embodiments of the present invention have at least the following technical effects or advantages:
the invention provides a method for manufacturing an SOI silicon grating, which comprises the steps of forming the silicon grating on an SOI substrate, then carrying out hydrogen annealing treatment on the silicon grating, wherein the annealing temperature is 800-975 ℃, and the roughness of the side wall of the silicon grating can be obviously improved by adopting the annealing temperature of 800-975 ℃ to carry out hydrogen annealing, so that the coupling loss of the silicon grating is reduced.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 shows a schematic diagram of a prior art silicon grating structure;
FIG. 2 illustrates a graph of the roughness of the sidewalls of a prior art formed silicon grating;
FIG. 3 is a flow chart illustrating steps of a method for fabricating an SOI silicon grating according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating the formation of an SOI substrate using an oxygen implantation isolation technique in an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a structure of an SOI substrate formed by bonding thinning technology according to an embodiment of the present invention;
FIG. 6 illustrates a structural intent of a silicon grating formed in an embodiment of the present invention;
figure 7 is a graph illustrating the roughness of the sidewalls of a silicon grating formed in an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
An embodiment of the present invention provides a method for manufacturing an SOI silicon grating, as shown in fig. 3, including: s301, forming a silicon grating on the SOI substrate; s302, performing hydrogen annealing treatment on the silicon grating, wherein the annealing temperature is 800-975 ℃.
In a specific embodiment, before S301, the method further includes:
an SOI substrate is formed.
Specifically, the forming of the SOI substrate specifically includes:
a buried oxide layer is formed on a silicon substrate such that a top silicon layer is formed on the buried oxide layer.
The step of forming the buried oxide layer on the silicon substrate in the SOI substrate may specifically include two steps:
first, by oxygen injection isolation technique (SIMOX)
In the process of forming the buried oxide layer on the silicon substrate, specifically, oxygen ions are implanted into the silicon substrate to form the buried oxide layer. As shown in particular in fig. 4.
In a specific embodiment, the oxygen buried layer is formed in silicon by high energy, high dose oxygen implantation, the O+In a dose of 3X 1017～2×1018cm-2(ii) a The energy is around 200 kev.
Then, the formed buried oxide layer divides the silicon substrate into two parts, wherein the upper silicon substrate is used as a top silicon layer, and the lower silicon substrate is used as a supporting silicon substrate. The top silicon layer is used as a device.
Second, bonding thinning technique (BE)
In the process of forming the buried oxide layer on the silicon substrate, specifically, oxide layers are respectively formed on two silicon substrates; connecting the two oxidation layers to form the buried oxide layer. As shown in particular in fig. 5.
Wherein, oxide layers are respectively formed on the two silicon substrates, and the method specifically comprises the following steps:
and forming the oxide layer on the silicon substrate by adopting a chemical vapor deposition or thermal oxidation method. In particular, the oxide layer is in particular SiO2。
In a specific embodiment, two silicon substrates with grown oxide layers are bonded together, i.e. the two oxide layers are opposite and bonded together to form a buried oxide layer. One of the silicon substrates is thinned into a top silicon layer by etching and polishing, and the other silicon substrate is used as a supporting silicon substrate.
Specifically, the thickness of the buried oxide layer is 2-3 μm.
After forming the SOI substrate, executing S301, forming a silicon grating a on the SOI substrate, specifically including:
forming a photoresist layer on an SOI substrate;
etching the photoresist layer based on a silicon grating pattern to be formed, and etching the photoresist layer to the inside of the top silicon layer;
and removing the residual photoresist layer to form the silicon grating A.
In a specific embodiment, a photoresist is coated on a top silicon layer of an SOI substrate to form a photoresist layer, then a photoresist mask with a grating pattern is used for scanning, stepping or contact exposure, the exposed photoresist is developed in a developing solution, then an ion etching or wet chemical etching mode is used to etch or corrode the photoresist layer and etch the photoresist layer into the top silicon layer, and finally, the remaining photoresist layer is removed to form a silicon grating a. The silicon grating may be a silicon grating a with a rectangular structure, or may be a V-shaped silicon grating a. The present invention is not particularly limited in the embodiments.
Because the side wall of the silicon grating A formed by adopting the photoresist mode and the etching equipment adopted causes roughness, after S301, S302 is executed, and hydrogen annealing treatment is carried out on the silicon grating, wherein the annealing temperature is 800-975 ℃.
In a preferred embodiment, the silicon grating is subjected to a hydrogen annealing treatment, in particular at a temperature of 950 ℃.
And performing hydrogen annealing treatment on the silicon grating A at the annealing temperature of 950 ℃ to ensure that the roughness of the side wall of the silicon grating A is less than 1 nm.
When the roughness of the side wall of the silicon grating A is less than 1nm, the coupling loss is 4-4.5 dB/end. As shown in fig. 6 and 7.
Specifically, hydrogen is filled into the annealing furnace to perform hydrogen annealing treatment, and the main process parameters include requirements on annealing temperature, chamber pressure of the annealing chamber, annealing time, flow rate of the hydrogen and the like.
In the hydrogen annealing, the chamber pressure of the annealing chamber is 20Torr to 1atm (standard atmospheric pressure), and the 1atm is 760 Torr.
The annealing time is 30-120 s.
The hydrogen flow rate of the hydrogen loaded in the annealing chamber is 20-180L/min.
By adopting the process parameters of the hydrogen annealing treatment, the roughness of the side wall of the silicon grating A is reduced, and the coupling loss of the silicon grating A is further improved.
One or more technical solutions in the embodiments of the present invention have at least the following technical effects or advantages:
the invention provides a method for manufacturing an SOI silicon grating, which comprises the steps of forming the silicon grating on an SOI substrate, then carrying out hydrogen annealing treatment on the silicon grating, wherein the annealing temperature is 800-975 ℃, and the roughness of the side wall of the silicon grating can be obviously improved by adopting the annealing temperature of 800-975 ℃ to carry out hydrogen annealing, so that the coupling loss of the silicon grating is reduced.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (7)

1. A method for manufacturing an SOI silicon grating is characterized by comprising the following steps:
forming a silicon grating on an SOI substrate;
carrying out hydrogen annealing treatment on the silicon grating, wherein the annealing temperature is 800-975 ℃;
the roughness of the side wall of the annealed silicon grating is less than 1nm, and the coupling loss is 4-4.5 dB/end;
and carrying out hydrogen annealing treatment on the silicon grating, wherein the chamber pressure of an adopted annealing chamber is 20 Torr-1 atm, the annealing time is 30-120 s, and the hydrogen flow is 20-180L/min.
2. The method of claim 1, wherein prior to forming the silicon grating on the SOI substrate, further comprising:
and forming the SOI substrate.
3. The method of claim 2, wherein said forming said SOI substrate specifically comprises:
a buried oxide layer is formed on a silicon substrate such that a top silicon layer is formed on the buried oxide layer.
4. The method of claim 3, wherein forming the buried oxide layer on the silicon substrate comprises:
and implanting oxygen ions into the silicon substrate to form the oxygen buried layer.
5. The method of claim 3, wherein forming the buried oxide layer on the silicon substrate comprises:
respectively forming oxide layers on the two silicon substrates;
connecting the two oxidation layers to form the buried oxide layer.
6. The method of claim 3, wherein forming a silicon grating on the SOI substrate specifically comprises:
forming a photoresist layer on the SOI substrate;
etching the photoresist layer based on a silicon grating pattern to be formed, and etching the photoresist layer to the inside of the top silicon layer;
and removing the residual photoresist layer to form the silicon grating.
7. The method according to claim 3, wherein the buried oxide layer has a thickness of 2 to 3 μm.
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CN112198588A (en) * 2020-09-30 2021-01-08 中国科学院微电子研究所 Silicon waveguide and preparation method thereof

Citations (4)

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Publication number Priority date Publication date Assignee Title
JP2000304958A (en) * 1999-02-19 2000-11-02 Fuji Xerox Co Ltd Optical waveguide element and its production
JP2004233665A (en) * 2003-01-30 2004-08-19 Sumitomo Electric Ind Ltd Phase grating mask, method for forming diffraction grating, diffraction grating element, multiplexer and demultiplexer module, external resonator type laser module, and wavelength division multiplexing transmission system
CN105607186A (en) * 2016-03-22 2016-05-25 河南仕佳光子科技股份有限公司 Waveguide Bragg grating based on SiO2 strip-loaded waveguide and manufacturing method thereof
CN107132617A (en) * 2017-04-01 2017-09-05 中国科学院微电子研究所 A kind of method for reducing silicon substrate fiber waveguide sidewall roughness

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GB2385940B (en) * 1999-03-05 2003-10-22 Nanovis Llc Aperiodically poled non-linear material

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000304958A (en) * 1999-02-19 2000-11-02 Fuji Xerox Co Ltd Optical waveguide element and its production
JP2004233665A (en) * 2003-01-30 2004-08-19 Sumitomo Electric Ind Ltd Phase grating mask, method for forming diffraction grating, diffraction grating element, multiplexer and demultiplexer module, external resonator type laser module, and wavelength division multiplexing transmission system
CN105607186A (en) * 2016-03-22 2016-05-25 河南仕佳光子科技股份有限公司 Waveguide Bragg grating based on SiO2 strip-loaded waveguide and manufacturing method thereof
CN107132617A (en) * 2017-04-01 2017-09-05 中国科学院微电子研究所 A kind of method for reducing silicon substrate fiber waveguide sidewall roughness

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