CN110931531A - OLED display panel and preparation method thereof - Google Patents
OLED display panel and preparation method thereof Download PDFInfo
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- CN110931531A CN110931531A CN201911178001.4A CN201911178001A CN110931531A CN 110931531 A CN110931531 A CN 110931531A CN 201911178001 A CN201911178001 A CN 201911178001A CN 110931531 A CN110931531 A CN 110931531A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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Abstract
The invention provides an OLED display panel and a preparation method thereof, wherein a through hole is arranged in a side frame area, and a power supply wiring layer and a cathode layer edge part are arranged in the through hole in a laminated manner; the concave part is arranged on the upper surface of the power wiring layer, the lower surface of the edge part of the cathode layer is provided with a convex part embedded with the concave part, so that the edge part of the power wiring layer and the edge part of the cathode layer are in groove contact, the electric contact area is effectively increased, the normal driving condition is guaranteed, the width of the edge part of the power wiring layer and the edge part of the cathode layer is within the range of 200-300 um, the size of the left side frame and the size of the right side frame are further reduced, and the narrow frame of the OLED display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to an OLED display panel and a preparation method thereof.
Background
At present, the display panel adopts an extremely narrow frame design to meet the requirement of people on the attractiveness of the display panel.
In the design of traditional OLED display panel, for guaranteeing that anode layer and power routing layer have sufficient effective electrical contact area under the normal drive circuit, the width on the power routing layer of side frame about generally is 400um to 600um, and the width on power routing layer is great makes about the side frame can't be done more narrowly.
Therefore, a new structure needs to be designed to solve the technical problems that in the prior art, the width of the power supply wiring layer in the OLED display panel is large, the frame size of the OLED display panel is further limited, and meanwhile, the reliable transmission of electric signals between the power supply wiring layer and the edge part of the cathode layer is ensured.
Disclosure of Invention
The invention provides an OLED display panel and a preparation method thereof, which can solve the technical problems that in the prior art, the width of a power supply wiring layer in the OLED display panel is large, the size of a frame of the OLED display panel is further limited, and meanwhile, the reliable transmission of electric signals between the power supply wiring layer and the edge part of a cathode layer is ensured.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the invention provides an OLED display panel, which comprises a display area and a frame area on the periphery of the display area, wherein the frame area is provided with a substrate base plate and an insulating layer on the substrate base plate; the insulating layer is provided with a through hole, and a power supply wiring layer and a cathode layer edge part are sequentially stacked in the through hole; the contact surface of the power supply wiring layer and the edge part of the cathode layer is a bent contact surface.
According to a preferred embodiment of the present invention, the bending contact surface is formed by a plurality of bending lines or a plurality of circular arc surfaces.
According to a preferred embodiment of the present invention, the bending contact surface is wave-shaped or zigzag-shaped.
According to a preferred embodiment of the present invention, the length of the contour line of the bending contact surface is greater than the width of the transverse line.
According to a preferred embodiment of the present invention, the line width is in a range of 200 to 300 um.
According to a preferred embodiment of the present invention, the surface of the power supply wiring layer facing the cathode layer edge portion is provided with a concave portion, and the surface of the cathode layer edge portion facing the power supply wiring layer is provided with a convex portion which is in one-to-one correspondence with and is fitted into the concave portion.
According to a preferred embodiment of the present invention, the insulating layer includes a buffer layer, a first gate insulating layer, a second gate insulating layer, and an interlayer insulating layer sequentially stacked on the substrate, and the via hole is at least disposed in the interlayer insulating layer from top to bottom.
According to a preferred embodiment of the present invention, the cross section of the via hole is in the shape of one or more of a trapezoid, a triangle or a sector.
According to the OLED display panel, the present invention further provides a method for manufacturing an OLED display panel, the method including:
step 10, providing a substrate, sequentially laminating a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer on the substrate, and arranging a via hole in the interlayer insulating layer corresponding to the side frame region;
and 20, depositing a power supply wiring layer on the via hole, and evaporating the edge part of the cathode layer on the power supply wiring layer.
According to a preferred embodiment of the present invention, the cathode layer edge portion is prepared by using a precise metal mask plate through one-time evaporation.
The invention has the beneficial effects that: in the invention, a through hole is arranged in the side frame area, and a power supply wiring layer and a cathode layer edge part are arranged in the through hole in a laminated manner; the concave part is arranged on the upper surface of the power wiring layer, the bottom of the edge part of the cathode layer is provided with the concave part which corresponds to the concave part one by one and is embedded with the concave part, so that the contact between the power wiring layer and the edge part of the cathode layer is changed into the contact of a via hole, the electric contact area of the power wiring layer and the edge part of the cathode layer is greatly increased, the normal driving condition is guaranteed, the width of the power wiring layer and the edge part of the cathode layer is narrower, about 200-300 um is left and right, the size of the side frame is further reduced, and the real narrow frame of the OLED.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic top view of an OLED display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic front view illustrating an OLED display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic front view illustrating another portion of an OLED display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic front view illustrating another portion of an OLED display panel according to an embodiment of the present disclosure;
fig. 5 is a schematic front view illustrating another OLED display panel according to an embodiment of the present disclosure;
fig. 6 is a schematic front view illustrating another OLED display panel according to an embodiment of the present disclosure;
fig. 7 is a schematic view of a process for manufacturing an OLED display panel according to an embodiment of the present disclosure.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals, and broken lines in the drawings indicate that the elements do not exist in the structures, and only the shapes and positions of the structures are explained.
The invention can solve the technical problems that the width of a power supply wiring layer in an OLED display panel is large, the frame size of the display panel is further limited, and meanwhile, the reliable transmission of electric signals between the power supply wiring layer and the edge part of a cathode layer is guaranteed in the prior art.
As shown in fig. 1, the embodiment of the present application provides a structural schematic diagram of an OLED display panel 100, which includes a display area 1011 and a frame area at the periphery of the display area 1011, where the frame area includes a right frame area 1012, a left frame area 1014, a top frame area 1013, and a bottom frame area 1015. The cathode layer 103 extends from the display area 1011 to the frame area, the cathode layer 103 includes a first cathode layer edge portion 1031 and a second cathode layer edge portion 1032, the first cathode layer edge portion 1031 is disposed in the right frame area 1012, a first power routing layer 1021 is disposed below the first edge portion 1031, the second cathode layer edge portion 1032 is disposed in the left frame area 1014, a second power routing layer 1022 is disposed below the second cathode layer edge portion 1032, the bottom frame area 1015 is connected with the flexible printed circuit board 1016, the flexible printed circuit board 1016 is attached with a driving chip 1017, a power supply outside the OLED display panel 100 transfers an electrical signal to the flexible printed circuit board 1016 through the driving chip 1017, the flexible printed circuit board 1016 then transfers the electrical signal to the first power routing layer 1021 and the second power routing layer 1022 through signal terminals in the frame area, and finally the first power routing layer 1021 and the second power routing layer 1022 transfer the electrical signal to the first cathode layer edge portion 1031 and the second cathode layer edge portion 1031, respectively On the edge portion 1032 to enable normal operation of the OLED display panel 100.
The width of cathode layer edge part is about 400 ~ 600um generally in conventional OLED display panel side frame, and the level is laid on the power routing layer, and the electrical contact width design broad on cathode layer edge part and power routing layer ensures under the normal drive condition that the power routing layer can be stably, reliably transmit on the cathode layer edge part. Have sufficient electrical contact area in order to guarantee cathode layer border portion and power routing layer to make OLED display panel can normal drive, compress display panel frame size simultaneously, this application designs into the curved form with the contact surface on cathode layer border portion and power routing layer, increases effective electrical contact area, reduces cathode layer border portion and the horizontal width on power routing layer, compresses display panel frame size promptly.
OLED display panel in this application, including display area and the peripheral frame district of display area, the frame district has substrate base plate and the insulating layer on the substrate base plate.
The power supply wiring layer and the cathode layer are sequentially stacked in the through hole; the contact surface of the power supply wiring layer and the cathode layer edge part is a bent contact surface so as to increase the effective area of the electrical contact of the power supply wiring layer and the cathode layer edge part.
Specifically, as shown in fig. 2, an embodiment of the present application provides a front view structure diagram of a right side frame area 1012 of an OLED display panel, and since a structure of a left side frame area 1014 is similar to that of the right side frame area 1012, a contact relationship between a first power trace layer 1021 and a first cathode layer edge portion 1031 in the right side frame area 1012 is used to describe the invention of the present application. The OLED display panel 100 in this embodiment includes a display area 1011 and a right frame area 1012; a substrate 104 is disposed in the display region 1011 and the right side frame region 1012, an insulating layer 105 is disposed on the substrate 104, and the insulating layer 105 includes a buffer layer/a first gate insulating layer 1051, a second gate insulating layer 1052, and an interlayer insulating layer 1053 which are sequentially stacked; the first gate electrode 10511 is formed on the buffer layer/first gate insulating layer 1051, the second gate insulating layer 1052 is disposed on the first gate electrode 10511, the second gate electrode 10521 is disposed on the second gate insulating layer 1052, the interlayer insulating layer 1053 is disposed on the second gate electrode 10521, the source/drain electrode 106 is disposed on the interlayer insulating layer 1053, the planarization layer 1061 is disposed above the source/drain electrode 106, the cathode layer 107 is disposed on the surface of the planarization layer 1061, and the cathode layer 107 extends from the display region 1011 to the right bezel region 1012.
In this embodiment, the interlayer insulating layer 1053 in the right bezel region 1012 is provided with a first via 1054, and the cross section of the first via 1054 is trapezoidal, and may be a triangle or a sector. The first via 1054 is used for placing the first cathode layer edge portion 1031 and the first power routing layer 1021, the cross section of the first via 1054 is open upward, the outline is bent in a multi-segment fold line, and the top width of the first via 1054 is greater than the bottom width. The first power trace layer 1021 is deposited on the surface of the first via 1054, and the material of the first power trace layer 1021 includes one or more layers of mesh of silver, copper, aluminum, molybdenum, and titanium. When the first power routing layer 1021 is deposited on the surface of the first via 1054, the larger the opening depth of the first via 1054 is, the larger the thickness of the first power routing layer 1021 is, the smaller the impedance of the first power routing layer 1021 is, and the larger current can be carried, the top surface of the first power routing layer 1021 is also porous, the first cathode layer edge portion 1031 is evaporated on the top surface of the first power routing layer 1021, and the material of the first cathode layer edge portion 1031 is preferably at least one metal of magnesium and silver. The contact surface 1033 of the first power routing layer 1021 and the first cathode layer edge portion 1031 is a bent contact surface formed by a plurality of sections of folded surfaces or a plurality of circular arc surfaces, preferably in a trapezoidal, wavy or zigzag shape. The contour line length of the bending contact surface is greater than the transverse line width, that is, the length of the contour line 1033 is greater than the width of the right side frame region 1012, the transverse line width is 200-300 um, that is, the width of the right side frame region 1012 is 200-300 um, so that the effective area of the electrical contact between the first power supply wiring layer 1021 and the first cathode layer edge part 1031 is increased.
The contact surface of buckling of first power routing layer 1021 and first cathode layer border part 1031 still can be unevenness's interface, first power routing layer 1021 is provided with the recess towards the surface of first cathode layer border part 1031, the recess can be enclosed by broken line type or circular arc, its opening is upwards or down, first cathode layer border part 1031 is provided with the convex part with this recess one-to-one and gomphosis towards the surface of first power routing layer 1021, in order to increase first cathode layer border part 1031 and the effective electrical contact area of first power routing layer 1021, thereby under the same normal drive condition of plane electrical contact area before guaranteeing with, accomplish narrowly with the width of first power routing layer 1021 and first cathode layer border part 1031, for about 200 ~ 300um, thereby be favorable to dwindling about side frame district size, and then realize real narrow frame.
As shown in fig. 3, in this embodiment, the first cathode layer edge portion 1031 and the first power routing layer 1021 are wavy on the contact surface 1033, as shown in fig. 4, in this embodiment, the first cathode layer edge portion 1031 and the first power routing layer 1021 are zigzag on the contact surface 1033, in short, the contact surface 1033 is curved to increase the effective electrical contact area, the sizes of the cathode layer edge portion 107 and the power routing layer 105 can be made smaller, thereby being beneficial to reducing the sizes of the left and right side frame areas, and further realizing a real narrow frame.
As shown in fig. 5, in the right frame area 1012 in this embodiment, a second via 1055 is disposed in the second gate layer 1052, the cross section of the second via 1055 is trapezoidal, and may also be a pattern of a triangle or a sector, the second via 1055 penetrates through the interlayer insulating layer 1053, the second via 1055 is larger than the first via 1054 disposed in the interlayer insulating layer 1053 in fig. 1, the space for placing the first cathode layer edge portion 1031 and the first power routing layer 1021 is larger, which is beneficial to increasing the contact surface between the first cathode layer edge portion 1031 and the first power routing layer 1021, and meanwhile, the thickness of the first cathode layer edge portion 1031 and the thickness of the first power routing layer can be made larger, so that the lateral width and the longitudinal length of the first cathode layer edge portion 1031 and the first power routing layer 1021 can be made smaller, which is beneficial to reducing the size of the left and right frame areas, and further realizing a true narrow frame 1021.
As shown in fig. 6, in the present embodiment, a third via 1056 is disposed in the buffer layer/first gate insulating layer 1051 in the right bezel region 1012, a cross section of the third via 1056 is trapezoidal, and may also be a pattern of a triangle or a sector, the third via 1056 penetrates through the interlayer insulating layer 1053 and the second gate layer 1052, and the third via 1056 is larger than the second via 1055 disposed in the second gate layer 1052 in fig. 4, which means that a space for placing the first cathode layer edge portion 1031 and the first power supply wiring layer 1021 is larger, which is beneficial to increasing a contact area between the first cathode layer edge portion 1031 and the first power supply wiring layer 1021, thereby facilitating to reduce the size of the left and right bezel regions, and further implementing a true narrow bezel.
According to the above OLED display panel, as shown in fig. 7, the present application also provides a method for manufacturing an OLED display panel, the method including:
step 10, providing a substrate, sequentially laminating a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer on the substrate, and arranging a via hole in the interlayer insulating layer corresponding to the side frame region.
And 20, depositing a power supply wiring layer on the via hole, and evaporating the edge part of the cathode layer on the power supply wiring layer.
Preferably, a power routing layer is deposited on the via hole, and the step 20 of evaporating the cathode layer edge portion on the power routing layer specifically includes: the cathode layer edge part is prepared by adopting a precise metal mask plate through evaporation, wherein the power supply wiring layer and the cathode layer edge part are made of one or more film layer grids of magnesium, silver, copper, aluminum, molybdenum and titanium, the cathode layer edge part can also be made of one or more materials of metal oxides ITO, IZO and ZnO, and the power supply wiring layer is in via hole contact with the cathode layer edge part.
Specifically, in the method for manufacturing the OLED display panel, step 10 further includes:
preparing the buffer layer, the first gate insulating layer, the second gate insulating layer and the interlayer insulating layer on the substrate, and etching the interlayer insulating layer in the side frame by adopting a dry etching process to form a via hole;
digging the buffer layer, the first gate insulating layer and the second gate insulating layer below the via hole, and reserving a part of the buffer layer close to the surface of the substrate, wherein the thickness of the part of the buffer layer is about 5nm, so that a power supply wiring layer connected with a negative electrode of the electrode is prevented from being directly contacted with the substrate; and preparing a planarization layer in the display area corresponding to the interlayer insulating layer.
In the method for manufacturing the OLED display panel, step 20 further includes: depositing a power supply wiring layer on the via hole, and evaporating the edge part of the cathode layer on the power supply wiring layer; the power supply wiring layer and the source/drain electrode in the display area are arranged on the same layer, the power supply wiring layer is connected with a power negative electrode, the cathode layer edge part is preferably prepared by adopting a precise metal mask plate through one-time evaporation, multiple times of evaporation forming can be selected, the power supply wiring layer and the cathode layer edge part are increased in thickness as much as possible under the condition that the effective electrical contact area is relatively large, the thickness is larger, the impedance is smaller, the normal driving condition can be guaranteed, the width of the power supply wiring layer and the cathode layer edge part can be smaller, the size of a left side frame and a right side frame can be reduced, and the real narrow frame is realized.
The invention has the beneficial effects that: in the invention, a through hole is arranged in the side frame area, and a power supply wiring layer and a cathode layer edge part are arranged in the through hole in a laminated manner; the concave part is arranged on the upper surface of the power wiring layer, the bottom of the edge part of the cathode layer is provided with the concave part which corresponds to the concave part one by one and is embedded with the concave part, so that the contact between the power wiring layer and the edge part of the cathode layer is changed into the contact of a via hole, the electric contact area of the power wiring layer and the edge part of the cathode layer is greatly increased, the normal driving condition is guaranteed, the width of the power wiring layer and the edge part of the cathode layer is narrower, about 200-300 um is left and right, the size of the side frame is further reduced, and the real narrow frame of the OLED.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. The OLED display panel is characterized by comprising a display area and a frame area on the periphery of the display area, wherein the frame area is provided with a substrate base plate and an insulating layer on the substrate base plate;
the insulating layer is provided with a through hole, and a power supply wiring layer and a cathode layer edge part are sequentially stacked in the through hole; the contact surface of the power supply wiring layer and the edge part of the cathode layer is a bent contact surface.
2. The OLED display panel of claim 1, wherein the bent contact surface is formed by a multi-segment fold line surface or a plurality of arc surfaces.
3. The OLED display panel of claim 1, wherein the bent contact surface is wavy or zigzag.
4. The OLED display panel of claim 1, wherein the curved contact surface has a profile length greater than a lateral line width.
5. The OLED display panel of claim 4, wherein the line width is in a range of 200 to 300 um.
6. The OLED display panel of claim 1, wherein the surface of the power supply wiring layer facing the cathode layer edge portion is provided with a concave portion, and the surface of the cathode layer edge portion facing the power supply wiring layer is provided with a convex portion which is in one-to-one correspondence with and is embedded in the concave portion.
7. The OLED display panel of claim 1, wherein the insulating layer comprises a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer sequentially stacked on the substrate, and the via hole is at least disposed in the interlayer insulating layer from top to bottom.
8. The OLED display panel of claim 1, wherein the cross section of the via hole is in a shape of one or more of trapezoid, triangle or fan.
9. A preparation method of an OLED display panel is characterized by comprising the following steps:
step 10, providing a substrate, sequentially laminating a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer insulating layer on the substrate, and arranging a via hole in a side frame area corresponding to the interlayer insulating layer;
and 20, depositing a power supply wiring layer on the via hole, and evaporating the edge part of the cathode layer on the power supply wiring layer.
10. The method for manufacturing the OLED display panel according to claim 9, wherein a power supply wiring layer is deposited on the via hole, and the step 20 of evaporating the cathode layer edge portion on the power supply wiring layer specifically includes:
the edge part of the cathode layer is prepared by adopting a precise metal mask plate through one-time evaporation.
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| CN201911178001.4A CN110931531A (en) | 2019-11-27 | 2019-11-27 | OLED display panel and preparation method thereof |
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| CN112987369A (en) * | 2021-02-08 | 2021-06-18 | 武汉华星光电技术有限公司 | Display panel, preparation method of display panel and display device |
| CN113066806A (en) * | 2021-03-24 | 2021-07-02 | 上海天马有机发光显示技术有限公司 | Display panel, manufacturing method thereof and display device |
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| CN113066806B (en) * | 2021-03-24 | 2024-03-22 | 武汉天马微电子有限公司 | Display panel, manufacturing method thereof and display device |
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Application publication date: 20200327 |