CN110912107A - Startup and shutdown circuit for battery management system - Google Patents
Startup and shutdown circuit for battery management system Download PDFInfo
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- CN110912107A CN110912107A CN201911365101.8A CN201911365101A CN110912107A CN 110912107 A CN110912107 A CN 110912107A CN 201911365101 A CN201911365101 A CN 201911365101A CN 110912107 A CN110912107 A CN 110912107A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H11/00—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result
- H02H11/002—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result in case of inverted polarity or connection; with switching for obtaining correct connection
- H02H11/003—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result in case of inverted polarity or connection; with switching for obtaining correct connection using a field effect transistor as protecting element in one of the supply lines
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
Abstract
The invention discloses a startup and shutdown circuit for a battery management system, which comprises a driving signal input end, a startup driving signal output end, a power supply signal extraction circuit, a trigger circuit and a switch, wherein the power supply end is connected with the power supply signal extraction circuit; the driving signal input end is connected with the starting-up driving signal output end through a switch; the power supply signal extraction circuit is connected with the power supply end and used for outputting a control signal based on a power supply signal accessed by the power supply end; the trigger circuit is electrically connected with the power signal extraction circuit and is used for controlling the switch to be switched on or switched off according to the jump of the control signal. The power on/off circuit for the battery management system provided by the invention receives the power on/off signal output by the power signal extraction circuit through the trigger circuit, so that the unified management of the power on/off signal is realized, and the power on/off circuit is easy to expand and has strong reusability.
Description
Technical Field
The embodiment of the invention relates to the electronic power technology, in particular to a startup and shutdown circuit for a battery management system.
Background
A Battery Management System (BMS) is a link between a Battery and a user, and a main object is a secondary Battery, mainly to improve the utilization rate of the Battery and prevent the Battery from being overcharged and overdischarged.
In order to realize the on-off control of a battery management system, such as short-press startup and reverse power protection, a microprocessor MCU (microprogrammed control unit) is usually used for on-off signal control, but the microprocessor needs to write a corresponding control program and needs to debug for multiple times, which wastes time and labor, and the cost is increased because the microprocessor is expensive; the startup and shutdown circuit designed based on the microprocessor is not easy to expand and has poor reusability.
Therefore, a switch-on/switch-off circuit with low cost, high reusability, reverse connection protection function and capability of avoiding system short circuit caused by reverse connection of power supply when a battery management system is activated is needed.
Disclosure of Invention
The invention provides a startup and shutdown circuit for a battery management system, which has the characteristics of low loss, low cost and easiness in expansion.
The embodiment of the invention provides a startup and shutdown circuit for a battery management system, which comprises a driving signal input end, a startup driving signal output end, a power signal extraction circuit, a trigger circuit and a switch, wherein the power signal extraction circuit is connected with the power end; the driving signal input end is connected with the starting-up driving signal output end through the switch; the power supply signal extraction circuit is connected with a power supply end and is used for outputting a control signal based on a power supply signal accessed by the power supply end; the trigger circuit is electrically connected with the power supply signal extraction circuit and is used for controlling the switch to be switched on or switched off according to the jump of the control signal.
Further, the power signal extraction circuit comprises a first optical coupler device and a second optical coupler device, the power supply end comprises a power supply positive end and a power supply negative end, and the power supply positive end and the power supply negative end are respectively and electrically connected with a first end and a second end of the first optical coupler device; the utility model discloses a switch, including first opto-coupler device, trigger circuit, drive signal input end, control signal, second opto-coupler device, power positive end and power negative end respectively with the second of second opto-coupler device is held and first end electricity is connected, trigger circuit includes first signal trigger end and second signal trigger end, the third end of first opto-coupler device with drive signal input end and first signal trigger end electricity is connected, the fourth end ground connection of first opto-coupler device, first opto-coupler device is used for output control the switch switches on control signal, the third end and the high level signal end electricity of second opto-coupler device are connected, the fourth end of second opto-coupler device is through first resistance ground connection, the fourth end of second opto-coupler device with second signal trigger end electricity is connected, second opto-coupler device is used for output control the switch turn-off control signal.
Further, still including the reversal signal output end and first MOS pipe, the fourth end of second opto-coupler device with the control end electric connection of first MOS pipe, the first end and the reversal signal output end electricity of first MOS pipe are connected, the second end ground connection of first MOS pipe.
Furthermore, the trigger circuit includes a second MOS transistor, a third MOS transistor, a schmitt trigger, a D-type trigger, and a fourth MOS transistor, the third end of the first optocoupler is electrically connected to the control end of the second MOS transistor, the first end of the second MOS transistor is electrically connected to the input end of the schmitt trigger, the second end of the second MOS transistor is grounded, the fourth end of the second optocoupler is electrically connected to the control end of the third MOS transistor, the first end of the third MOS transistor is electrically connected to the clear end of the D-type trigger, the second end of the third MOS transistor is grounded, the output end of the D-type trigger is electrically connected to the control end of the fourth MOS transistor, the first end of the fourth MOS transistor is electrically connected to the switch, and the second end of the fourth MOS transistor is grounded.
The auxiliary shutdown circuit comprises an input end, an output end and an auxiliary shutdown signal end, the input end of the auxiliary shutdown circuit is electrically connected with the startup driving signal output end, the output end of the auxiliary shutdown circuit is electrically connected with the zero clearing end of the D-type trigger, and the auxiliary shutdown circuit is used for outputting a control signal for controlling the switch to be turned off according to a signal accessed by the auxiliary shutdown signal end.
Furthermore, the auxiliary shutdown circuit comprises a triode, a third resistor, a first capacitor and a fifth MOS transistor, the control end of the triode is electrically connected with the auxiliary shutdown signal end, the first end of the triode is electrically connected with the startup driving signal output end, the third resistor is connected with the first capacitor in parallel, the second end of the triode is grounded through the third resistor, the second end of the triode is electrically connected with the control end of the fifth MOS transistor, the first end of the fifth MOS transistor is electrically connected with the zero clearing of the class D flip-flop, and the second end of the fifth MOS transistor is grounded.
Furthermore, the auxiliary shutdown circuit further comprises a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor, the power-on driving signal output end is electrically connected with the first end of the triode through the fourth resistor, the power-on driving signal output end is electrically connected with the control end of the triode through the fifth resistor, the auxiliary shutdown signal end is electrically connected with the control end of the triode through the sixth resistor, and the second end of the triode is electrically connected with the control end of the fifth MOS transistor through the seventh resistor.
Furthermore, the emergency starting circuit comprises a key switch, wherein the first end of the key switch is grounded, and the second end of the key switch is electrically connected with the control end of the second MOS tube.
Further, the second end of the key switch is electrically connected with the control end of the second MOS transistor through an eighth resistor.
Further, the positive end of the power supply is electrically connected with the first end of the first optocoupler through a first diode, the negative end of the power supply is electrically connected with the first end of the second optocoupler through a second diode,
a third diode is connected in parallel between the positive power supply end and the negative power supply end, the positive power supply end is electrically connected with the first end of the first optocoupler through a first inductor,
the power supply positive end is electrically connected with the power supply negative end through a ninth resistor and a tenth resistor, and the power supply positive end is electrically connected with the first end of the first optocoupler device through the ninth resistor.
The power on/off circuit for the battery management system provided by the invention receives the power on/off signal output by the power signal extraction circuit through the trigger circuit, so that the unified management of the power on/off signal is realized, and the power on/off circuit is easy to expand and has strong reusability.
Drawings
Fig. 1 is a power on/off circuit for a battery management system in an embodiment;
FIG. 2 is another embodiment of a power on/off circuit for a battery management system;
FIG. 3 is a circuit for turning on and off a battery management system according to still another embodiment;
FIG. 4 is a circuit diagram of a battery management system according to another embodiment;
fig. 5 is a circuit for turning on and off a battery management system according to still another embodiment.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a switching circuit for a battery management system according to an embodiment, and referring to fig. 1, the switching circuit includes a driving signal input terminal VLSP, a start-up driving signal output terminal On _ Aux _ Pwr, a power supply terminal DC _ IN +, DC _ IN-, a power supply signal extraction circuit 100, a trigger circuit 200, and a switch 300.
The drive signal input end VLSP is connected with the startup drive signal output end On _ Aux _ Pwr through a switch 300, the power supply signal extraction circuit 100 is connected with the power supply ends DC _ IN + and DC _ IN-and used for outputting a control signal based On the power supply signals accessed by the power supply ends DC _ IN + and DC _ IN-, the trigger circuit 200 is electrically connected with the power supply signal extraction circuit 100, and the trigger circuit 200 is used for controlling the switch 300 to be switched On or switched off according to the jump of the control signal. IN this embodiment, the driving signal output end On _ Aux _ Pwr is electrically connected to a power supply of the battery management system, the power signal extraction circuit 100 is connected to the power supply end DC _ IN + or DC _ IN-, when the power supply end is normally connected, the power signal extraction circuit 100 outputs a first control signal for controlling the switch 300 to be turned On to the trigger circuit 200, after the switch 300 is turned On, the driving signal output end On _ Aux _ Pwr outputs a high-level signal to the power supply, the power supply is started, and the battery management system is started. When the power source end is reversely connected, the power source signal extraction circuit 100 outputs a second control signal for controlling the switch 300 to be turned off to the trigger circuit 200, and after the switch 300 is turned off, the driving signal output end On _ Aux _ Pwr outputs a low-level signal to the power supply, so that the power supply is turned off, and the battery management system is turned off.
In this embodiment, the driving signal input terminal VSLP provides a voltage signal of 3.0V-5.5V, and a micro-power consumption LDO, such as TPS7233, may be used to generate the voltage input to the driving signal input terminal VSLP, so that the static power consumption of the circuit is lower than 30 uA. The power signal extraction circuit 100 is powered by the voltage accessed by the power end, and does not consume the current of the micro-power LDO.
Illustratively, the switch 300 includes a MOS transistor, a transistor, and a relay. Specifically, the control terminal of the switch 300 is electrically connected to the output terminal of the trigger circuit 200, the first terminal of the switch 300 is electrically connected to the driving signal input terminal VLSP, and the first terminal of the switch 300 is electrically connected to the driving signal output terminal On _ Aux _ Pwr.
For example, the power signal extraction circuit 100 may include an optocoupler, an input terminal of the optocoupler is electrically connected to the power supply terminal, a collector of a phototransistor in the optocoupler is used as a control signal output terminal, when the power supply terminal is normally connected, the optocoupler is turned on, and a level signal of the collector of the phototransistor is a control signal for controlling the switch 300 to be turned on, which is output to the trigger circuit 200. When the power source terminal is reversely connected, the optocoupler is turned off, and the level signal of the collector of the phototransistor is a control signal for controlling the switch 300 to be turned off and output to the trigger circuit 200. The power signal extraction unit may further include an MOS transistor, for example, an NMOS transistor, where the NMOS transistor is connected IN series IN the power circuit, a gate of the NMOS transistor is electrically connected to the power supply terminal DC _ IN + through a resistor, when the power supply terminal is normally connected, the NMOS transistor is turned on, a drain level signal of the NMOS transistor serves as a control signal for controlling the switch 300 to be turned on and outputted to the trigger circuit 200, and when the power supply terminal is reversely connected, the NMOS transistor is turned off, and a drain level signal of the NMOS transistor serves as a control signal for controlling the switch 300 to be turned off and outputted to the trigger circuit 200. The flip-flop 200 may comprise a nand device, such as the and gate 74LS08, having one input connected to the reference level, another input electrically connected to the output of the power signal extraction circuit 100, and an output electrically connected to the control terminal of the switch 300.
For example, the power signal extraction circuit 100 may further include a plurality of optical coupling devices, for example, two optical coupling devices are used, and the input ends of the two optical coupling devices are connected to the power terminals DC _ IN + and DC _ IN an opposite manner, so that a control signal for controlling the switch 300 to be turned on is output to the trigger circuit 200 through one of the optical coupling devices when the power terminals are normally connected, and a control signal for controlling the switch 300 to be turned off is output to the trigger circuit 200 through the other optical coupling device when the power terminals are reversely connected. The trigger circuit 200 may further include a schmitt trigger and a D-type trigger, an output end of the schmitt trigger is electrically connected to a clock end of the D-type trigger, an output end of the D-type trigger is electrically connected to a control end of the switch 300, a collector of the optocoupler for outputting a signal to turn on the switch 300 is electrically connected to an input end of the schmitt trigger, and an emitter of the optocoupler for outputting a signal to turn off the switch 300 is electrically connected to a clear end of the D-type trigger. When the on state of the optocoupler changes, the nit trigger outputs a rising edge signal to the D-type trigger, and then the D-type trigger outputs a signal for controlling the switch 300 to be turned on or off.
The switching circuit provided in this embodiment receives the power-on or power-off signal output by the power signal extraction circuit 100 through the trigger circuit 200, where the device used by the trigger circuit 200 includes a nand gate device, a schmitt trigger, or a D-type trigger, and when the circuit is designed, the signal output by the power signal extraction circuit 100 is connected to the input pin of the device, so as to implement unified management of the switching signal. The switch circuit has low overall design cost and strong reusability.
Fig. 2 is another switch-on/off circuit for a battery management system IN an embodiment, and referring to fig. 2, it is preferable that the power supply signal extraction circuit 100 includes a first optocoupler device U1 and a second optocoupler device U2, the power supply terminals include a power supply positive terminal DC _ IN + and a power supply negative terminal DC _ IN-, and the power supply positive terminal DC _ IN + and the power supply negative terminal DC _ IN-are electrically connected to the first terminal and the second terminal of the first optocoupler device U1, respectively; the power supply positive terminal DC _ IN + and the power supply negative terminal DC _ IN + are electrically connected to the second terminal and the first terminal of the second optocoupler U2, respectively. The trigger circuit 200 comprises a first signal trigger end S1 and a second signal trigger end S2, a third end of a first optical coupler device U1 is electrically connected with a drive signal input end VLSP and the first signal trigger end S1, a fourth end of the first optical coupler device U1 is grounded, a first optical coupler device U1 is used for outputting a control signal for switching on the control switch 300, a third end of a second optical coupler device U2 is electrically connected with a high-level signal end V1, a fourth end of the second optical coupler device U2 is grounded through a first resistor R15, a fourth end of the second optical coupler device U2 is electrically connected with a second signal trigger end S2, and the second optical coupler device U2 is used for outputting a control signal for switching off the control switch 300.
The power signal extraction circuit 100 shown in fig. 2 includes two optical coupler devices, when the power terminals are normally connected, the first optical coupler device U1 is turned on, the second optical coupler device U2 is turned off, when U1 is turned on, the first signal trigger terminal S1 is changed from a high level to a low level, and the trigger circuit 200 receives the control signal output by the first optical coupler device U1 through the first signal trigger terminal S1. When the power supply terminals are reversely connected, the first optocoupler device U1 is turned off, the second optocoupler device U2 is turned on, when the U2 is turned on, the second signal trigger terminal S2 is changed from a low level to a high level, and the trigger circuit 200 receives the control signal output by the second optocoupler device U2 through the second signal trigger terminal S2. Illustratively, the trigger circuit 200 adopts an and gate device, the switch 300 adopts a PMOS transistor, a reference terminal of the and gate device is connected with a high level, an input terminal of the and gate device is electrically connected with the first signal trigger terminal S1 and the second signal trigger terminal S2, an output terminal of the and gate device is electrically connected with a control terminal of the PMOS transistor, when the first optical coupler device U1 is turned On, the input terminal of the and gate device is at a low level, an output terminal of the and gate device outputs a low level, the PMOS transistor is turned On at the moment, the signal output terminal On _ Aux _ Pwr is driven to output a high level signal to the power supply, the power supply is started, and the battery management system is started. When the second optocoupler device U2 is turned On, the input end of the and gate device is at a high level, the output end of the and gate device outputs a high level, the PMOS transistor is turned off at this time, the driving signal output end On _ Aux _ Pwr outputs a low level signal to the power supply, the power supply is turned off, and the battery management system is turned off.
Referring to fig. 2, optionally, the optical coupler further includes a REVERSE connection signal output end REVERSE _ OUT and a first MOS transistor T1, the fourth end of the second optical coupler U2 is electrically connected to the control end of the first MOS transistor T1, the first end of the first MOS transistor T1 is electrically connected to the REVERSE connection signal output end REVERSE _ OUT, and the second end of the first MOS transistor T1 is grounded.
When the second optical coupler device U2 switches on, the level of first MOS transistor T1 grid becomes high level by the low level, and first MOS transistor T1 switches on, and the level of the REVERSE connection signal output end REVERSE _ OUT changes low level into by the high level. Whether the power source terminals are reversely connected or not can be detected by the change of the REVERSE _ OUT level of the REVERSE signal output terminal.
Referring to fig. 2, preferably, the power supply positive terminal DC _ IN + is electrically connected to the first terminal of the first optocoupler device U1 through the first diode D2, the power supply negative terminal DC _ IN-is electrically connected to the first terminal of the second optocoupler device U2 through the second diode D3, a third diode D1 is connected IN parallel between the power supply positive terminal DC _ IN + and the power supply negative terminal DC _ IN-, the power supply positive terminal DC _ IN + is electrically connected to the first terminal of the first optocoupler device U1 through the ninth resistor R12 and the first inductor L1, and the power supply positive terminal DC _ IN + is electrically connected to the power supply negative terminal DC _ IN + through the ninth resistor R12 and the tenth resistor R16.
The voltage isolation between the signal extraction circuit and the trigger circuit 200 and between the signal extraction circuit and the switch 300 is realized by using an optocoupler device, and meanwhile, a lightning protection structure is formed by matching with the third diode D1 and the first inductor L1, so that the surge generated in the lightning stroke is absorbed. The voltage stabilization of the voltage connected into the first optical coupler device U1 and the second optical coupler device U2 is realized through the ninth resistor R12, the tenth resistor R16, the first diode D2 and the second diode D3.
Fig. 3 is a further switch-on/switch-off circuit for a battery management system in an embodiment, and referring to fig. 3, preferably, the trigger circuit 200 includes a second MOS transistor T2, a third MOS transistor T3, a schmitt trigger U3, a class-D trigger U4, and a fourth MOS transistor T4, a third terminal of the first optocoupler U1 is electrically connected to a control terminal of the second MOS transistor T2, a first terminal of the second MOS transistor T2 is electrically connected to an input terminal a of the schmitt trigger U3, and a second terminal of the second MOS transistor T2 is grounded. The fourth end of the second optocoupler U2 is electrically connected with the control end of the third MOS transistor T3, the first end of the third MOS transistor T3 is electrically connected with the zero clearing end CLR # of the D-type trigger U4, and the second end of the third MOS transistor T3 is grounded. An output end Q of the D-type trigger U4 is electrically connected with a control end of a fourth MOS transistor, a first end of the fourth MOS transistor T4 is electrically connected with the switch 300, and a second end of the fourth MOS transistor T4 is grounded. The second MOS transistor T2, the third MOS transistor T3, and the fourth MOS transistor T4 are NMOS transistors, and the switch 300 is a PMOS transistor.
Referring to fig. 3, in an initial state, the power supply terminal has no voltage, the optocoupler device is not turned on, a point V1_ G in the network is at a high level, a point U3_ a is at a low level, and an output terminal O of the schmitt trigger U3 is at a low level. When the power supply ends are normally connected, the first optocoupler U1 is switched On, the V1_ G level is pulled low, the second MOS transistor T2 is switched off, the potential of the U3_ A point generates 0-1 jump, the signal is shaped by the Schmitt trigger U3 to generate a steep rising edge level, the level signal is output to the D type trigger U4, namely a clock signal is given to the D type trigger U4, the output end Q of the D type trigger U4 outputs a high level, the fourth MOS transistor T4 is switched On, the switch 300 is switched On, and the VSLP voltage is sent to the On _ Aux _ Pwr signal end to activate the system power supply. When the power supply ends are reversely connected, the second optocoupler U2 is switched on, the grid level of the third MOS transistor T3 is changed from low level to high level, the third MOS transistor T3 is switched on, the level of the clear end CLR # of the D type trigger U4 is pulled low, the output end Q of the D type trigger U4 outputs low level, the fourth MOS transistor T4 is switched off, the switch 300 is switched off, and the system power supply is switched off.
A Schmitt trigger is adopted to extract a rising edge signal generated when power supply ends are normally connected, so that power-on activation is realized, and the stability of a power-on and power-off circuit is improved.
Fig. 4 is a circuit for turning On and off a battery management system in another embodiment, fig. 5 is a circuit for turning On and off a battery management system in another embodiment, referring to fig. 4 and fig. 5, optionally, the circuit for turning On and off a battery further includes an auxiliary shutdown circuit 400, the auxiliary shutdown circuit 400 includes an input terminal S3, an output terminal S4, and an auxiliary shutdown signal terminal CPU _ SHUT, the input terminal S3 of the auxiliary shutdown circuit 400 is electrically connected to the power-On driving signal output terminal On _ Aux _ Pwr, the output terminal S4 of the auxiliary shutdown circuit 400 is electrically connected to the trigger circuit 200, specifically, the reset terminal CLR # of the class-D trigger U4 is electrically connected, and the auxiliary shutdown circuit 400 is configured to output a control signal for controlling the switch 300 to turn off according to a signal accessed by the auxiliary shutdown signal terminal CPU _ SHUT.
Referring to fig. 5, in detail, the auxiliary shutdown circuit 400 includes a triode T5, a third resistor R18, a first capacitor C50, and a fifth MOS transistor T6, a control end of the triode T5 is electrically connected to an auxiliary shutdown signal end CPU _ SHUT, a first end of the triode T5 is electrically connected to a power-On driving signal output end On _ Aux _ Pwr, the third resistor R18 is connected in parallel to the first capacitor C50, a second end of the triode T5 is grounded through a third resistor R18, the second end of the triode T5 is electrically connected to a control end of the fifth MOS transistor, the first end of the fifth MOS transistor T6 is electrically connected to a clear end CLR # of the class D flip-flop U4, and the second end of the fifth MOS transistor T6 is grounded. The transistor T5 is a PNP transistor, and the fifth MOS transistor T6 is an NMOS transistor.
An external shutdown signal is introduced from an auxiliary shutdown signal end CPU _ SHUT, when the introduced level is low level, the triode T5 is conducted, the V5_ G point is high level, the fifth MOS tube T6 is conducted, the reset end CLR # level of the D type trigger U4 is pulled low, the output end Q of the D type trigger U4 outputs low level, the fourth MOS tube T4 is turned off, the switch 300 is turned off, and the system power supply is turned off.
Referring to fig. 5, optionally, the auxiliary shutdown circuit 400 further includes a fourth resistor R8, a fifth resistor R9, a sixth resistor R10, and a seventh resistor R85, the On-driving signal output end On _ Aux _ Pwr is electrically connected to the first end of the transistor T5 through the fourth resistor R8, the On-driving signal output end On _ Aux _ Pwr is electrically connected to the control end of the transistor T5 through the fifth resistor R9, the auxiliary shutdown signal end CPU _ SHUT is electrically connected to the control end of the transistor T5 through the sixth resistor R10, and the second end of the transistor T5 is electrically connected to the control end of the fifth MOS transistor T5 through the seventh resistor R85. The fourth resistor R8 and the fifth resistor R9 are used as current limiting resistors, the sixth resistor R10 is used as a pull-down resistor, and the seventh resistor R85 is used as a pull-up resistor.
Referring to fig. 4 and 5, the switch circuit further includes an emergency starting circuit 500, the emergency starting circuit 500 includes a key switch K1, a first terminal of the key switch K1 is grounded, and a second terminal of the key switch K1 is electrically connected to the control terminal of the second MOS transistor T2.
The emergency starting circuit 500 is used in a situation that no voltage is input at a power end, and can emergently start the system power supply through the key switch K1 in a special case. When the key switch K1 is turned On, the V1_ G level is pulled low, the second MOS transistor T2 is turned off, the potential at the point U3_ a generates a jump from 0 to 1, the signal is shaped by the schmitt trigger U3 to generate a steep rising edge level, and the level signal is output to the class D trigger U4, which is equivalent to a clock signal to the class D trigger U4, the output terminal Q of the class D trigger U4 outputs a high level, the fourth MOS transistor T4 is turned On, the switch 300 is turned On, and the VSLP voltage is sent to the On _ Aux _ Pwr signal terminal to activate the system power supply.
Preferably, the second terminal of the key switch K1 is electrically connected to the control terminal of the second MOS transistor T2 through an eighth resistor R1. The eighth resistor R1 improves the anti-interference capability of the second MOS transistor T2.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A startup and shutdown circuit for a battery management system is characterized by comprising a driving signal input end, a startup driving signal output end, a power supply signal extraction circuit, a trigger circuit and a switch;
the driving signal input end is connected with the starting-up driving signal output end through the switch;
the power supply signal extraction circuit is connected with a power supply end and is used for outputting a control signal based on a power supply signal accessed by the power supply end;
the trigger circuit is electrically connected with the power supply signal extraction circuit and is used for controlling the switch to be switched on or switched off according to the jump of the control signal.
2. The power switching circuit of claim 1, wherein the power signal extraction circuit comprises a first optical coupler device, a second optical coupler device,
the power supply end comprises a power supply positive end and a power supply negative end, and the power supply positive end and the power supply negative end are respectively and electrically connected with the first end and the second end of the first optocoupler; the positive power supply terminal and the negative power supply terminal are respectively electrically connected with the second end and the first end of the second optocoupler device,
the trigger circuit comprises a first signal trigger end and a second signal trigger end, a third end of the first optical coupler is electrically connected with the driving signal input end and the first signal trigger end, a fourth end of the first optical coupler is grounded, the first optical coupler is used for outputting the control signal for controlling the switch to be switched on,
the third end and the high level signal end electricity of second opto-coupler device are connected, the fourth end of second opto-coupler device is through first resistance ground connection, the fourth end of second opto-coupler device with second signal trigger end electricity is connected, the second opto-coupler device is used for output control the switch is turn-off control signal.
3. The switching device circuit according to claim 2, further comprising a reverse connection signal output terminal and a first MOS transistor, wherein the fourth terminal of the second optocoupler is electrically connected to the control terminal of the first MOS transistor, the first terminal of the first MOS transistor is electrically connected to the reverse connection signal output terminal, and the second terminal of the first MOS transistor is grounded.
4. The switching circuit according to claim 2, wherein the trigger circuit comprises a second MOS transistor, a third MOS transistor, a Schmitt trigger, a D-type trigger and a fourth MOS transistor,
the third end of the first optocoupler is electrically connected with the control end of the second MOS tube, the first end of the second MOS tube is electrically connected with the input end of the Schmitt trigger, the second end of the second MOS tube is grounded,
the fourth end of the second optocoupler is electrically connected with the control end of the third MOS tube, the first end of the third MOS tube is electrically connected with the zero clearing end of the D-type trigger, the second end of the third MOS tube is grounded,
the output end of the D-type trigger is electrically connected with the control end of the fourth MOS tube, the first end of the fourth MOS tube is electrically connected with the switch, and the second end of the fourth MOS tube is grounded.
5. The switch circuit of claim 4, further comprising an auxiliary shutdown circuit including an input, an output, and an auxiliary shutdown signal terminal,
the input end of the auxiliary shutdown circuit is electrically connected with the startup driving signal output end, the output end of the auxiliary shutdown circuit is electrically connected with the zero clearing end of the D-type trigger, and the auxiliary shutdown circuit is used for outputting the control signal for controlling the switch to be turned off according to the signal accessed by the auxiliary shutdown signal end.
6. The switching circuit according to claim 5, wherein the auxiliary shutdown circuit comprises a triode, a third resistor, a first capacitor and a fifth MOS transistor,
the control end of the triode is electrically connected with the auxiliary shutdown signal end, the first end of the triode is electrically connected with the startup driving signal output end, the third resistor is connected with the first capacitor in parallel, the second end of the triode is grounded through the third resistor, the second end of the triode is electrically connected with the control end of the fifth MOS tube,
the first end of the fifth MOS tube is electrically connected with the zero clearing end of the D-type trigger, and the second end of the fifth MOS tube is grounded.
7. The power down circuit of claim 6, wherein the auxiliary power down circuit further comprises a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor,
the power-on driving signal output end is electrically connected with the first end of the triode through the fourth resistor, the power-on driving signal output end is electrically connected with the control end of the triode through the fifth resistor, the auxiliary power-off signal end is electrically connected with the control end of the triode through the sixth resistor, and the second end of the triode is electrically connected with the control end of the fifth MOS transistor through the seventh resistor.
8. The power on/off circuit as claimed in claim 2, further comprising an emergency start circuit, wherein the emergency start circuit comprises a key switch, a first terminal of the key switch is grounded, and a second terminal of the key switch is electrically connected to the control terminal of the second MOS transistor.
9. The switching circuit according to claim 8, wherein the second terminal of the key switch is electrically connected to the control terminal of the second MOS transistor through an eighth resistor.
10. The switching circuit of claim 2, wherein the positive power supply terminal is electrically connected to the first terminal of the first optocoupler via a first diode, and the negative power supply terminal is electrically connected to the first terminal of the second optocoupler via a second diode,
a third diode is connected in parallel between the positive power supply end and the negative power supply end, the positive power supply end is electrically connected with the first end of the first optocoupler through a first inductor,
the power supply positive end is electrically connected with the power supply negative end through a ninth resistor and a tenth resistor, and the power supply positive end is electrically connected with the first end of the first optocoupler device through the ninth resistor.
Priority Applications (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911365101.8A CN110912107A (en) | 2019-12-26 | 2019-12-26 | Startup and shutdown circuit for battery management system |
| AU2020411713A AU2020411713B2 (en) | 2019-12-26 | 2020-05-19 | Power-on/off circuit for battery management system |
| JP2022539107A JP2023508422A (en) | 2019-12-26 | 2020-05-19 | Switching circuits for battery management systems |
| PCT/CN2020/091103 WO2021128714A1 (en) | 2019-12-26 | 2020-05-19 | Power-on/off circuit for battery management system |
| MX2022008029A MX2022008029A (en) | 2019-12-26 | 2020-05-19 | Power-on/off circuit for battery management system. |
| EP20905309.9A EP3985820A4 (en) | 2019-12-26 | 2020-05-19 | Power-on/off circuit for battery management system |
| BR112022009859A BR112022009859A2 (en) | 2019-12-26 | 2020-05-19 | ON/OFF CIRCUIT FOR A BATTERY MANAGEMENT SYSTEM |
| US17/788,386 US20230032852A1 (en) | 2019-12-26 | 2020-05-19 | Switch on/off circuit for battery management system |
| ZA2022/06128A ZA202206128B (en) | 2019-12-26 | 2022-06-01 | Power-on/off circuit for battery management system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911365101.8A CN110912107A (en) | 2019-12-26 | 2019-12-26 | Startup and shutdown circuit for battery management system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110912107A true CN110912107A (en) | 2020-03-24 |
Family
ID=69827766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911365101.8A Pending CN110912107A (en) | 2019-12-26 | 2019-12-26 | Startup and shutdown circuit for battery management system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110912107A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111934661A (en) * | 2020-08-04 | 2020-11-13 | 深圳市宏电技术股份有限公司 | Startup and shutdown control circuit |
| WO2021128714A1 (en) * | 2019-12-26 | 2021-07-01 | 上海派能能源科技股份有限公司 | Power-on/off circuit for battery management system |
| CN114967560A (en) * | 2022-06-06 | 2022-08-30 | 嘉兴技领信息技术有限公司 | Communication interface circuit with low power consumption control |
-
2019
- 2019-12-26 CN CN201911365101.8A patent/CN110912107A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021128714A1 (en) * | 2019-12-26 | 2021-07-01 | 上海派能能源科技股份有限公司 | Power-on/off circuit for battery management system |
| CN111934661A (en) * | 2020-08-04 | 2020-11-13 | 深圳市宏电技术股份有限公司 | Startup and shutdown control circuit |
| CN111934661B (en) * | 2020-08-04 | 2024-04-09 | 深圳市宏电技术股份有限公司 | Startup and shutdown control circuit |
| CN114967560A (en) * | 2022-06-06 | 2022-08-30 | 嘉兴技领信息技术有限公司 | Communication interface circuit with low power consumption control |
| CN114967560B (en) * | 2022-06-06 | 2023-11-07 | 嘉兴技领信息技术有限公司 | Communication interface circuit with low power consumption control |
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