CN214045590U - Power supply control device and system - Google Patents
Power supply control device and system Download PDFInfo
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- CN214045590U CN214045590U CN202023201407.0U CN202023201407U CN214045590U CN 214045590 U CN214045590 U CN 214045590U CN 202023201407 U CN202023201407 U CN 202023201407U CN 214045590 U CN214045590 U CN 214045590U
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Abstract
The embodiment of the utility model discloses power supply control device and system, this power supply control device includes: the device comprises a power supply switch, a power supply module, a main control module, a time delay module, a locking enabling module and a reset module; the power supply switch is connected in series between the external power supply equipment and the power supply module, so that absolute low energy consumption of the equipment controlled by the power supply module is ensured in a shutdown state; the main control module is electrically connected with the locking enabling module through the delay module; the reset module is electrically connected with the main control module; the locking enabling module is electrically connected with the power supply switch; when the master control module controls error, the reset module delays the output of the invalid locking signal by the delay module in the reset process of the master control module, and the delay module continuously outputs the valid locking signal to the locking enabling module because the reset time of the reset module is less than the delay time of the delay module, so that the load powered by the power supply module can still normally and orderly work in the reset stage of the master control module.
Description
Technical Field
The embodiment of the utility model provides a relate to battery powered technology field, especially relate to a power supply control device and system.
Background
In the prior art, when a device powered by a battery is generally shut down, absolute low energy consumption of the device needs to be ensured, and the main implementation manner includes: 1) the equipment adopts a main control module with low enough standby power consumption, but the low energy consumption of the main control module is not absolute low energy consumption, and the power supply module continuously supplies current, so that the main control module still has large leakage current. Meanwhile, all the peripheral modules in the equipment need hardware cooperation when being turned off, the enabling modules are added to enable all the peripheral modules to enter a low power consumption mode, and due to the fact that the hardware is complex, power supply modules of all the peripheral modules continuously supply current in the low power consumption mode, and leakage current still exists in all the peripheral modules. 2) An enabling switch is added on a bus of the equipment, when a startup and shutdown button is pressed down, the enabling module or the main control module is enabled when outputting a locking signal, the enabling switch is turned off, and absolute low energy consumption when the equipment is shut down is ensured; however, when the program of the main control module is complex enough, if the program runs wrongly and needs to be automatically reset, the locking signal output by the main control module will fail, and the device is directly powered off.
SUMMERY OF THE UTILITY MODEL
An object of the embodiment of the utility model is to provide a power supply control device and system to reduce the energy consumption when realizing that the load shuts down, and when host system goes wrong, avoid the direct outage of load.
In order to achieve the above object, in a first aspect, an embodiment of the present invention provides a power supply control device, including: the device comprises a power supply switch, a power supply module, a main control module, a time delay module, a locking enabling module and a reset module;
the power supply switch is connected in series between the external power supply equipment and the power supply module; the power supply switch is electrically connected with external power supply equipment and the power supply module respectively; the main control module is electrically connected with the locking enabling module through the time delay module; the reset module is electrically connected with the main control module; the locking enabling module is electrically connected with the power supply switch; the power supply switch is used for controlling the power on and off of the power supply module; the locking enabling module is used for controlling the on-off of the power supply switch according to the locking signal output by the time delay module; the reset module is used for resetting the main control module when the main control module controls error; the time delay module is used for inputting an effective locking signal to the locking enabling module when the main control module is reset; the reset time of the reset module is less than the delay time of the delay module.
Optionally, the power supply control device further includes a power on/off button, and the power on/off button is electrically connected to the main control module and the locking enabling module respectively; or the power on/off button is respectively electrically connected with the main control module and the power supply switch.
Optionally, the power supply switch includes a first MOS transistor and a first resistor; the first end of the first resistor and the source end of the first MOS transistor are electrically connected with external power supply equipment; the second end of the first resistor is electrically connected with the gate end of the first MOS transistor; and the drain end of the first MOS transistor is electrically connected with the power supply module.
Optionally, the first MOS transistor is a PNP type MOS transistor.
Optionally, the locking enabling module includes a photoelectric coupler, a second resistor, a third resistor, a first triode, a fourth resistor, and a fifth resistor;
the first end of the second resistor and the first end of the third resistor are both electrically connected with the power on/off button; the second end of the second resistor is electrically connected with the base terminal of the first triode; the transmitting end of the first triode, the second end of the third resistor and the transmitting end of the receiving electrode of the photoelectric coupler are all grounded; the collector terminal of the first triode is electrically connected with the collector terminal of the receiving electrode of the photoelectric coupler; the positive end of the emitter of the photoelectric coupler is electrically connected with the first end of the fourth resistor; the negative end of the emitter of the photoelectric coupler is electrically connected with the first end of the fifth resistor; and the second end of the fourth resistor and the second end of the fifth resistor are both electrically connected with the power supply module.
Optionally, the delay module includes a delay chip, a sixth resistor, a seventh resistor, and a first capacitor; the first end of the sixth resistor is electrically connected with the main control module; a second end of the sixth resistor, a second end of the seventh resistor and a second end of the first capacitor are electrically connected with the signal input end of the delay chip; the first end of the first capacitor is electrically connected with the first end of the seventh resistor; a first end of the seventh resistor is grounded; the signal output end of the delay chip is electrically connected with the locking enabling module; and the power end of the time delay chip is electrically connected with the power module.
Optionally, the reset module includes a watchdog circuit.
Optionally, an eighth resistor is further included between the power supply switch and the locking enabling module, and a first end of the eighth resistor is electrically connected to the power supply switch; and the eighth end of the third resistor is electrically connected with the locking enabling module.
Optionally, the main control module further includes a register for storing the boot information of the power on/off button.
In a second aspect, the embodiment of the present invention further provides a power supply control system, including:
a power supply device, a load, and any one of the power supply control apparatuses;
the power supply equipment is electrically connected with a power supply switch of the power supply control device; and the load is respectively and electrically connected with the main control module and the power supply module of the power supply control device.
The utility model discloses technical scheme, through providing a power supply control device, include: the device comprises a power supply switch, a power supply module, a main control module, a time delay module, a locking enabling module and a reset module; the power supply switch is connected in series between the external power supply equipment and the power supply module, and is respectively and electrically connected with the external power supply equipment and the power supply module; when the load is shut down, the power supply switch is closed, so that the external power supply equipment can be prevented from continuously supplying power to the power supply module, and the low energy consumption of the load connected with the power supply module is ensured when the load is shut down; the main control module is electrically connected with the locking enabling module through the delay module; the reset module is electrically connected with the main control module; the locking enabling module is electrically connected with the power supply switch; the locking enabling module is used for controlling the on-off of the power supply switch according to the locking signal output by the time delay module; if the main control module makes a mistake, the main control module outputs an invalid locking signal. The delay module delays a period of time to output an invalid locking signal. At the moment, the reset module resets the main control module. Because the reset time of the reset module is less than the delay time of the delay module, the delay module continues to output an effective locking signal to the locking enabling module during the reset of the main control module by the reset module, so that the locking enabling module can continue to receive the effective locking signal during the reset of the main control module by the reset module. The locking enabling module continuously controls the power supply switch to be in a conducting state, and the power supply module keeps supplying power for the load. Therefore, when the master control module has an error, the situation that the load is directly powered off can not occur.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments made with reference to the following drawings:
fig. 1 is a schematic structural diagram of a power supply control device according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of another power supply control device according to a first embodiment of the present invention;
fig. 3 is a circuit diagram of another power supply control device according to a first embodiment of the present invention;
fig. 4 is a schematic structural diagram of a power supply control system according to a second embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the embodiments of the present invention adopted to achieve the intended purpose, the technical solutions in the embodiments of the present invention are shown in the drawings and the preferred embodiments and will be described completely below.
Next, the present invention will be described in detail with reference to the schematic drawings, and in the detailed description of the embodiments of the present invention, for convenience of explanation, the schematic drawings showing the structure of the device are not partially enlarged according to the general scale, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and height should be included in the actual fabrication.
Example one
Fig. 1 is a schematic structural diagram of a power supply control device according to an embodiment of the present invention. As shown in fig. 1, the power supply control device includes: the system comprises a power supply switch 101, a power supply module 102, a main control module 104, a delay module 105, a locking enabling module 106 and a resetting module 107;
the power supply switch 101 is connected in series between the external power supply device 108 and the power supply module 102; the power supply switch 101 is electrically connected to the external power supply device 108 and the power supply module 102, respectively; the main control module 104 is electrically connected with the locking enabling module 106 through the delay module 105; the reset module 107 is electrically connected with the main control module 104; the lock enable module 106 is electrically connected to the power supply switch 101; the power supply switch 101 is used for controlling the power on and off of the power supply module 102; the locking enabling module 106 is used for controlling the on-off of the power supply switch 101 according to the locking signal output by the delay module 105; the reset module 107 is configured to reset the main control module 104 when the main control module 104 has a control error; the delay module 105 is configured to input a valid lock signal to the lock enable module 106 when the main control module 104 is reset; the reset time of the reset module 107 is less than the delay time of the delay module 105.
This technical scheme is through providing a power supply control device, including power switch, power module, host system, delay module, locking enable module and reset module, when the load that power module links to each other shuts down, closes power switch, and external power supply equipment stops to the power module power supply, and the load does not have the current to flow through, guarantees the low energy consumption of load when shutting down. Meanwhile, if the main control module makes a mistake in operation, the main control module outputs an invalid locking signal. The delay module delays a period of time to output an invalid locking signal. At the moment, the reset module resets the main control module. Because the reset time of the reset module is less than the delay time of the delay module, the delay module continues to output an effective locking signal to the locking enabling module during the reset of the main control module by the reset module, so that the locking enabling module can continue to receive the effective locking signal during the reset of the main control module by the reset module. The locking enabling module continuously controls the power supply switch to be in a conducting state, and the power supply module keeps supplying power for the load. Therefore, when the master control module has an error, the situation that the load is directly powered off can not occur.
Optionally, the power on/off button 103 may enable the power switch 101 to be turned on or off, so as to affect the power on/off of the power module 102. As an example, as shown in fig. 1, the power on/off button 103 is electrically connected to the main control module 104 and the lock enabling module 106. When the power-on key of the power-on/off button 103 is pressed, a power-on signal of the power-on/off button 103 is input to the lock enabling module 106, and the main control module 104 is electrically connected with the power-on/off button 103. If the main control module 104 detects that the time for pressing the power-on key of the power-on/off button 103 is longer than the preset time, the main control module 104 outputs an effective locking signal to the lock enabling module 106 through the delay module 105, and at this time, the lock enabling module 106 receives the power-on signal of the power-on/off button 103 and the effective locking signal transmitted by the main control module 104 at the same time. It should be noted that, the above-mentioned preset time can be set for according to the actual demand of the product, the utility model discloses do not do the restriction.
If the lock enable module 106 adopts or logic, at this time, if the power-on key of the power on/off button 103 is released and pressed, the main control module 104 controls the input of the lock enable module 106, the lock enable module 106 outputs a signal for controlling the conduction of the power supply switch 101, the power supply switch 101 is conducted, the external power supply device 108 is conducted with the power supply module 102, and the power supply module 102 can power on the load 109 connected with the power supply module 102. When the power-off key of the power-on/off button 103 is pressed, the main control module 104 detects that the time for pressing the power-off key of the power-on/off button 103 is longer than the preset time, the main control module 104 outputs an invalid locking signal to the lock enabling module 106 through the delay module 105, controls the lock enabling module 106 to output a signal for controlling the power supply switch 101 to be turned off, turns off the power supply switch 101, and disconnects the external power supply device 108 from the power supply module 102, so that the power supply module 102 stops supplying power to the load 109.
When the load 109 is working normally, the main control module 104 will have a program error due to the complicated program of the main control module 104. The reset module 107 detects that the program of the main control module 104 is faulty, and the reset module 107 forcibly resets the program of the main control module 104. Because the program of the main control module 104 is faulty, the main control module 104 will output an invalid lock signal, and the delay module 105 delays the invalid lock signal output by the main control module 104. Because the reset time of the reset module 107 is less than the delay time of the delay module 105, the delay module 105 delays to output an invalid lock signal and continuously outputs a valid lock signal until the main control module 104 completes the reset, the main control module 104 continuously outputs a valid lock signal to the delay module 105, the delay module 105 continuously outputs the valid lock signal to the lock enable module 106, ignores the invalid lock signal, and ensures that when the main control module 104 has an error, the situation that the load is suddenly powered off due to disconnection between the external power supply 108 and the power supply module 102 is avoided.
As another implementable manner, fig. 2 is a schematic circuit structure diagram of another power supply control device provided in an embodiment of the present invention, and as shown in fig. 2, the power on/off button 103 is electrically connected to the main control module 104 and the power supply switch 101, respectively. When the power-on key of the switch button 103 is pressed, a power-on signal is output to the power supply switch 101, and the power supply switch 101 is turned on. The main control module 104 is electrically connected to the power on/off button 103, and if the main control module 104 detects that the time for pressing the power on key of the power on/off button 103 is longer than the preset time, the main control module 104 outputs an effective locking signal to the lock enabling module 106 through the delay module 105, and at this time, the lock enabling module 106 receives the effective locking signal transmitted by the main control module 104. The lock enable module 106 outputs a signal for controlling the power supply switch 101 to be turned on, and the power supply switch 101 is turned on. At this time, if the power-on key of the power-on/off button 103 is pressed down, the main control module 104 controls the input of the lock enabling module 106, the lock enabling module 106 outputs a signal for controlling the conduction of the power supply switch 101, the power supply switch 101 is conducted, the external power supply device 108 is conducted with the power supply module 102, and the power supply module 102 can power on the load 109 connected with the power supply module. When the power-off key of the power-on/off button 103 is pressed and the program of the main control module 104 has an error, the operation steps are the same as those in the above-mentioned embodiments, and are not described herein again.
The technical scheme of the embodiment provides a power supply control device which comprises a power supply switch, a power supply module, a main control module, a delay module, a locking enabling module and a resetting module; the power supply switch is respectively electrically connected with the external power supply equipment and the power supply module, and when the load is shut down, the power supply switch is turned off, so that the external power supply equipment can be prevented from continuously supplying power to the power supply module, and the load can be ensured to have low energy consumption when the load is shut down; the power on-off button is respectively electrically connected with the main control module and the power supply switch; or the power on/off button is respectively electrically connected with the main control module and the locking enabling module, the main control module detects the power on/off state of the power on/off button, the time for pressing the power on/off button is longer than the preset time, the locking enabling module receives a power on signal of the power on/off button, and meanwhile, the main control module outputs an effective locking signal to the locking enabling module, so that the locking enabling module outputs a locking enabling signal to control the conduction of the power supply switch; the main control module is electrically connected with the locking enabling module through the delay module; the reset module is electrically connected with the main control module; the locking enabling module is electrically connected with the power supply switch; the power supply switch is used for controlling the power on/off of the power supply module; the locking enabling module is used for controlling the on-off of the power supply switch according to the locking signal output by the time delay module; the reset module is used for resetting the main control module when the main control module controls the error; meanwhile, if the main control module makes a mistake in operation, the main control module outputs an invalid locking signal. The delay module delays a period of time to output an invalid locking signal. At the moment, the reset module resets the main control module. Because the reset time of the reset module is less than the delay time of the delay module, the delay module continues to output an effective locking signal to the locking enabling module during the reset of the main control module by the reset module, so that the locking enabling module can continue to receive the effective locking signal during the reset of the main control module by the reset module. The locking enabling module continuously controls the power supply switch to be in a conducting state, and the power supply module keeps supplying power for the load. Therefore, when the master control module has an error, the situation that the load is directly powered off can not occur.
The power supply switch 101 of the present embodiment may be various, and may be an electronic switch such as a relay or a MOS transistor. Next, a circuit of the power supply control device in which the power supply switch 101 is a MOS transistor will be described. Fig. 3 is a circuit diagram of a power supply control device according to an embodiment of the present invention, with continued reference to fig. 1 and fig. 3, optionally, the power supply switch 101 includes a first MOS transistor 11 and a first resistor R1; a first end of the first resistor R1 and a source end of the first MOS transistor 11 are electrically connected to the external power supply device 108; a second end of the first resistor R1 is electrically connected to the gate terminal of the first MOS transistor 11; the drain terminal of the first MOS transistor 11 is electrically connected to the power supply module 102.
Optionally, the first MOS transistor 11 is a PNP type MOS transistor.
The first MOS transistor 11 may be selected according to actual conditions, and may be a PNP MOS transistor or an NPN MOS transistor. In the present embodiment, as shown in fig. 3, the adaptive selection is a PNP MOS transistor, which implements the on/off of the power supply switch 101.
Optionally, the lock enable module 106 includes a photocoupler 13, a second resistor R2, a third resistor R3, a first triode 12, a fourth resistor R4, and a fifth resistor R5;
a first end of the second resistor R2 and a first end of the third resistor R3 are both electrically connected with the power on/off button 103; a second end of the second resistor R2 is electrically connected to the base terminal of the first transistor 12; the transmitting end of the first triode 12, the second end of the third resistor R3 and the transmitting end of the receiving electrode of the photoelectric coupler 13 are all grounded; a collector terminal of the first triode 12 is electrically connected with a collector terminal of a receiver of the photocoupler 13; the positive terminal of the emitter of the photoelectric coupler 13 is electrically connected with the first terminal of the fourth resistor R4; the negative end of the emitter of the photoelectric coupler 13 is electrically connected with the first end of the fifth resistor R5; the second end of the fourth resistor R4 and the second end of the fifth resistor R5 are both electrically connected to the power module 102.
The photoelectric coupler 13 is a semiconductor optoelectronic device in which a light emitting device and a photosensor are packaged in the same housing, and an electric signal is transmitted through electric-optical-electric conversion therebetween. As shown in fig. 3, the photocoupler 13 is composed of a light emitting diode and a phototriode, when the photocoupler 13 receives the output signal of the delay module, the light emitting diode emits light by receiving the output signal of the delay module 105, and after the phototriode receives illumination, the phototriode correspondingly generates an output signal of the locking enabling module 106, and outputs the output signal to the power supply switch 101, so as to control the on or off of the power supply switch 101.
Specifically, the first transistor 12 may be selected according to actual conditions, and may be a PNP transistor or an NPN transistor. In this embodiment, as shown in fig. 3, the NPN transistor is selected as the circuit in an adaptive manner, so that when the power-on key of the power-on/off button 103 is pressed, if the output signal of the power-on/off button 103 is at a high level, the first transistor 12 is turned on.
Optionally, an eighth resistor R8 is further included between the power switch 101 and the lock enabling module 106, and a first end of the eighth resistor R8 is electrically connected to the power switch 101; a second terminal of the eighth resistor R3 is electrically connected to the lock enable module 106.
The first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the eighth resistor R8 all play a role in shunting.
When the power-on key of the power-on/off button 103 is pressed, the signal output by the power-on/off button 103 is set to be high level exemplarily, and passes through the first transistor 12 of the lock-up enabling module 106, where the first transistor 12 is an NPN transistor. At this time, the first transistor 12 is turned on at a high level, and a low level signal is output from the collector terminal of the first transistor 12. Then, the voltage reaches the gate terminal of the first MOS transistor 11 through the eighth resistor R8, and a low level signal is input to the gate terminal of the first MOS transistor 11. The first MOS transistor 11 is a PNP MOS transistor, the first MOS transistor 11 is turned on, and the power supplied by the external power supply device 108 is output to the drain terminal of the first MOS transistor 11 through the source terminal of the first MOS transistor 11, and then input to the power module 102, so that the power module 102 powers on the load 109 to start up the work.
Optionally, the delay module 105 includes a delay chip 14, a sixth resistor R6, a seventh resistor R7, and a first capacitor C1; a first end of the sixth resistor R6 is electrically connected with the main control module 104; a second end of the sixth resistor R6, a second end of the seventh resistor R7 and a second end of the first capacitor C1 are electrically connected to the signal input terminal of the delay chip 14; a first end of the first capacitor C1 is electrically connected with a first end of the seventh resistor R7; a first end of the seventh resistor R7 is grounded; the signal output end of the delay chip 14 is electrically connected with the locking enabling module 106; the power terminal of the delay chip 14 is electrically connected to the power module 102.
When the main control module 104 detects that the time for pressing the power-on key of the power-on/off button 103 is longer than the preset time, the main control module 104 outputs an effective locking signal. An exemplary set active lock signal is high. At this time, the RC circuit in the delay module 105 is charged for a delay time T1＝RONC. Wherein R isONIs the resistance of the sixth resistor R6, and C is the capacitance of the first capacitor C1. The delayed effective locking signal is input to the signal input terminal of the delay chip 14 at a high level and then output through the signal output terminal of the delay chip 14. At this time, the signal output from the signal output terminal of the delay chip 14 is at a low level. The signal output from the signal output terminal of the delay chip 14 is output to the negative terminal of the emitter of the photocoupler 13 of the lock enable module 106, and then output through the collector terminal of the receiver of the photocoupler 13 of the lock enable module 106, and the signal output from the collector terminal of the receiver of the photocoupler 13 is at a low level. Through the eighth resistor R8, the signal output from the collector terminal of the receiver of the photocoupler 13 is input to the power supply switch 101 at a low level, and the first MOS transistor 11 of the power supply switch 101 is turned on. At this time, the power-on key of the power-on/off button 103 that is pressed down may be released, and the power supply switch 101 is turned on only by the valid locking signal output by the main control module 104.
With continued reference to fig. 1 and fig. 3, when a program of the main control module 104 is faulty, the reset module 107 performs a forced reset on the main control module 104, the main control module 104 outputs an invalid lock signal, and at this time, the RC circuit in the delay module 105 is charged for a delay time T2＝RfloatC. Wherein R isfloatIs the resistance of the seventh resistor R7, and C is the capacitance of the first capacitor C1. The main control module 104 outputs an invalid locking signal and delays the invalid locking signal through the delay module 105, the signal output end of the delay chip 14 of the delay module 105 continuously outputs an valid locking signal, and the signal output end of the delay chip 14The output active lock signal is low. The effective latch signal output by the signal output terminal of the delay chip 14 is output to the negative terminal of the emitter of the photocoupler 13 of the latch enable module 106, and then output through the collector terminal of the receiver of the photocoupler 13 of the latch enable module 106, and the signal output by the collector terminal of the receiver of the photocoupler 13 is at a low level. Through the eighth resistor R8, the signal output from the collector terminal of the receiver of the photocoupler 13 is input to the power supply switch 101 at a low level, so that the first MOS transistor 11 of the power supply switch 101 is continuously turned on during the reset phase of the main control module 104, and the load 109 powered by the power supply module 102 continuously operates.
When the power-off key of the power-on/off button 103 is pressed, the main control module 104 detects that the time for pressing the power-off key of the power-on/off button 103 is greater than the preset time, and the main control module 104 outputs an invalid locking signal, for example, if the invalid locking signal is at a low level. At this time, the RC circuit in the delay module 105 is charged for a delay time T3＝RoffC. Wherein R isOffIs the resistance of the sixth resistor R6, and C is the capacitance of the first capacitor C1. The delayed invalid locking signal is input to the signal input terminal of the delay chip 14 at a low level and then output through the signal output terminal of the delay chip 14, and the signal output from the signal output terminal of the delay chip 14 becomes a high level. The output is to the negative terminal of the emitter of the photocoupler 13 of the latch enable module 106, and further, the output is output through the collector terminal of the receiver of the photocoupler 13 of the latch enable module 106, and the signal output from the collector terminal of the receiver of the photocoupler 13 is at a high level. Through the eighth resistor R8, a signal output from the collector terminal of the receiver of the photocoupler 13 is input to the power supply switch 101 at a high level, so that the first MOS transistor 11 of the power supply switch 101 is turned off, the external power supply device 108 stops supplying power to the power supply module 102, and the load 109 is powered off and stops working.
With continued reference to fig. 1 and fig. 3, since the resistance value of the sixth resistor R6 is 10K, and the resistance value of the seventh resistor R6 is 200K, that is, when the main control module 104 fails, the time T2 for the delay module 105 to delay outputting the invalid lock signal output by the main control module 104 is much longer than the time T1 for the delay module 105 to delay outputting the valid lock signal output by the main control module 104 when the main control module 104 normally operates. When an error occurs in the main control module 104, in the process that the reset module 107 forcibly resets the main control module 104, the delay module 105 continuously outputs an effective locking signal to turn on the power supply switch 101, the power supply module 102 continuously receives power supplied by the external power supply device 108, and the load 109 supplied by the power supply module 102 normally operates.
When the main control module 104 detects that the time for pressing the power-off key of the power-on/off button 103 is longer than the preset time, the main control module 104 outputs an invalid locking signal, and the time T3 for the delay module 105 to delay the output of the invalid locking signal output by the main control module 104 is far shorter than the time T2 for the delay module 105 to delay the output of the invalid locking signal output by the main control module 104 when an error occurs in the main control module 104; the time T3 for the delay module 105 to delay the output of the invalid locking signal from the main control module 104 is almost equal to the time T1 for the delay module 105 to delay the output of the valid locking signal from the main control module 104 when the normal operation is performed, which can ensure that the power switch 101 is turned off at an accelerated speed when the power on/off button 103 is pressed, the external power supply device 108 stops supplying power to the power module 102, and the load 109 supplying power to the power module 102 stops operating.
With continued reference to fig. 1, the reset module 107 optionally includes a watchdog circuit 1071.
When the program of the main control module 104 is wrong, the watchdog circuit 1071 in the reset module 107 fails to feed the dog, and the watchdog circuit 1071 forcibly resets the main control module 104. The main control module 104 is ensured to continue outputting the valid locking signal, and the load 109 powered by the power module 102 works normally.
Optionally, the main control module 104 further includes a register for storing the power-on information of the power-on/off button 103.
The register of the main control module 104 may be configured to, when the power-on key of the power-on/off button 103 is pressed, detect that the time for pressing the power-on key of the power-on/off button 103 by the main control module 104 is greater than the preset time. For example, the preset time is 2s, and when the time for pressing the power-on key of the power-on/off button 103 is less than 2s, the main control module 104 determines that the power-on/off button 103 is touched by mistake; when the time for pressing the power-on key of the power-on/off button 103 is longer than 2s, the main control module 104 determines that the power-on key of the power-on/off button 103 is pressed, and a normal power-on flag is written into the register of the main control module 104. The register of the main control module 104 will clear the normal power-on flag only when the power-off key of the power-on/off button 103 is pressed, the load 109 powered by the power module 102 is powered off or the backup register is dead. So that the normal boot flag is continuously written when the boot key of the power on/off button 103 is pressed for normal boot.
When the program of the main control module 104 has an error, after the watchdog circuit 1071 of the reset module 107 forcibly resets the main control module 104, the program reset of the main control module 104 is completed, the register of the main control module 104 can be written into the normal start-up flag reset by the watchdog circuit 1071, the main control module 104 can directly enter the start-up process at this time, the process of whether the time for pressing the start-up key of the power on/off button 103 is longer than the preset time is skipped, and the main control module 104 directly outputs an effective locking signal.
This technical scheme rationally sets up power supply switch, power module, the on-off button through power supply control device, host system, delay module, locking enable module and reset module, realizes turning off power supply switch, makes the load of power module power supply guarantee low energy consumption under the power off state to and under host system's program error state, utilize delay module to make host system at the in-process that resets, the load of power module power supply still normally works, can not cut off the power supply suddenly, influence work.
Example two
Fig. 4 is a schematic structural diagram of a power supply control system according to an embodiment of the present invention, as shown in fig. 4, the power supply control system 300 includes:
a power supply apparatus 301, a load 302, and any one of power supply control devices 303;
wherein, the power supply device 301 is electrically connected with a power supply switch of the power supply control device 303; the load 302 is electrically connected to the main control module and the power supply module of the power supply control device 303, respectively.
Since the power supply control system provided by this embodiment includes the same or corresponding advantages of any power supply control device provided by the above embodiments, details are not described here.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A power supply control device characterized by comprising: the device comprises a power supply switch, a power supply module, a main control module, a time delay module, a locking enabling module and a reset module;
the power supply switch is electrically connected with external power supply equipment and the power supply module respectively; the main control module is electrically connected with the locking enabling module through the time delay module; the reset module is electrically connected with the main control module; the locking enabling module is electrically connected with the power supply switch; the power supply switch is used for controlling the power on and off of the power supply module; the locking enabling module is used for controlling the on-off of the power supply switch according to the locking signal output by the time delay module; the reset module is used for resetting the main control module when the main control module controls error; the time delay module is used for inputting an effective locking signal to the locking enabling module when the main control module is reset; the reset time of the reset module is less than the delay time of the delay module.
2. The power supply control device according to claim 1, further comprising a power on/off button electrically connected to the main control module and the power supply switch, respectively; or the power on/off button is respectively electrically connected with the main control module and the locking enabling module.
3. The power supply control device according to claim 1, wherein the power supply switch includes a first MOS transistor and a first resistor; the first end of the first resistor and the source end of the first MOS transistor are electrically connected with external power supply equipment; the second end of the first resistor is electrically connected with the gate end of the first MOS transistor; and the drain end of the first MOS transistor is electrically connected with the power supply module.
4. The power supply control device according to claim 3, wherein the first MOS transistor is a PNP type MOS transistor.
5. The power supply control device according to claim 2, wherein the lock enable module comprises a photocoupler, a second resistor, a third resistor, a first triode, a fourth resistor, and a fifth resistor;
the first end of the second resistor and the first end of the third resistor are both electrically connected with the power on/off button; the second end of the second resistor is electrically connected with the base terminal of the first triode; the transmitting end of the first triode, the second end of the third resistor and the transmitting end of the receiving electrode of the photoelectric coupler are all grounded; the collector terminal of the first triode is electrically connected with the collector terminal of the receiving electrode of the photoelectric coupler; the positive end of the emitter of the photoelectric coupler is electrically connected with the first end of the fourth resistor; the negative end of the emitter of the photoelectric coupler is electrically connected with the first end of the fifth resistor; and the second end of the fourth resistor and the second end of the fifth resistor are both electrically connected with the power supply module.
6. The power supply control device according to claim 1, wherein the delay module comprises a delay chip, a sixth resistor, a seventh resistor and a first capacitor; the first end of the sixth resistor is electrically connected with the main control module; a second end of the sixth resistor, a second end of the seventh resistor and a second end of the first capacitor are electrically connected with the signal input end of the delay chip; the first end of the first capacitor is electrically connected with the first end of the seventh resistor; a first end of the seventh resistor is grounded; the signal output end of the delay chip is electrically connected with the locking enabling module; and the power end of the time delay chip is electrically connected with the power module.
7. The power supply control device of claim 1 wherein the reset module comprises a watchdog circuit.
8. The power supply control device according to claim 1, further comprising an eighth resistor between the power supply switch and the lock enabling module, wherein a first end of the eighth resistor is electrically connected to the power supply switch; the second end of the eighth resistor is electrically connected with the locking enabling module.
9. The power supply control device according to claim 2, wherein the main control module further comprises a register for storing the power-on information of the power-on/off button.
10. A power supply control system, comprising:
a power supply device, a load, and the power supply control apparatus of any one of claims 1-9;
the power supply equipment is electrically connected with a power supply switch of the power supply control device; and the load is respectively and electrically connected with the main control module and the power supply module of the power supply control device.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023201407.0U CN214045590U (en) | 2020-12-25 | 2020-12-25 | Power supply control device and system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202023201407.0U CN214045590U (en) | 2020-12-25 | 2020-12-25 | Power supply control device and system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115291661A (en) * | 2022-07-08 | 2022-11-04 | 广东天波信息技术股份有限公司 | Low-power-consumption standby circuit and control method thereof |
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2020
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115291661A (en) * | 2022-07-08 | 2022-11-04 | 广东天波信息技术股份有限公司 | Low-power-consumption standby circuit and control method thereof |
| CN115291661B (en) * | 2022-07-08 | 2024-09-10 | 广东天波信息技术股份有限公司 | Low-power consumption standby circuit and control method thereof |
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