CN110854086A - Packaging assembly, electronic device and packaging method - Google Patents
Packaging assembly, electronic device and packaging method Download PDFInfo
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- CN110854086A CN110854086A CN201911167330.9A CN201911167330A CN110854086A CN 110854086 A CN110854086 A CN 110854086A CN 201911167330 A CN201911167330 A CN 201911167330A CN 110854086 A CN110854086 A CN 110854086A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 51
- 238000000034 method Methods 0.000 title claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 65
- 238000005538 encapsulation Methods 0.000 claims abstract description 29
- 238000003466 welding Methods 0.000 claims abstract description 17
- 238000009413 insulation Methods 0.000 claims abstract description 13
- 229910000679 solder Inorganic materials 0.000 claims description 55
- 230000007423 decrease Effects 0.000 claims 1
- 238000002955 isolation Methods 0.000 abstract description 6
- 230000000670 limiting effect Effects 0.000 abstract description 3
- 239000000155 melt Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 132
- 230000008569 process Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 5
- 238000005336 cracking Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 230000032798 delamination Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
The invention discloses a packaging assembly, electronic equipment and a packaging method, wherein the packaging assembly comprises a substrate, a component, a packaging layer, an insulating layer and a grounding piece, the component is provided with a welding pin and is connected with the substrate through the welding pin, the packaging layer wraps the component, the insulating layer is arranged around the welding pin and is positioned between the substrate and the packaging layer, the insulating layer wraps the grounding piece, one part of the insulating layer is positioned between the grounding piece and the component, and the grounding piece surrounds the welding pin. The insulating layer can realize the insulation of leg reliably, even there is the cavity on the encapsulated layer, the leg melts the back, because the limiting action of insulating layer, this leg can't with the leg or the surface contact of other components and parts to prevent the appearance of short circuit phenomenon, consequently this encapsulation subassembly can promote the reliability of components and parts. In addition, the grounding piece can realize electromagnetic isolation between the welding pins, so that the reliability of the packaging assembly during working is improved.
Description
Technical Field
The present invention relates to the field of electronic structures, and particularly to a package assembly, an electronic device, and a packaging method.
Background
As the functions of electronic devices are expanded, more and more components are included in the electronic devices, for example, a plurality of chips need to be disposed on a circuit board to implement the predetermined functions of the electronic devices.
In order to improve the reliability of the electronic device, when the electronic device is manufactured, the components included in the electronic device need to be packaged, so that the problems that the components are damaged due to the influence of the external environment or other parts are prevented. Generally, these components can be soldered on the substrate through the solder tails, and then the components can be wrapped by the packaging layer, so as to realize the packaging of the components.
However, as the number of components is increased, the distance between the components is decreased, and when the packaging operation is performed, a void is easily formed in the packaging layer, the solder fillet is melted in the subsequent process, and the melted solder fillet is short-circuited with the solder fillet or the surface of another component through the void, so that the reliability of the component is reduced.
Disclosure of Invention
The invention discloses a packaging assembly, electronic equipment and a packaging method, and aims to solve the problem of low reliability of components.
In order to solve the problems, the invention adopts the following technical scheme:
the utility model provides a packaging assembly, includes base plate, components and parts, encapsulation layer, insulating layer and ground connection piece, components and parts are equipped with the leg, components and parts pass through the leg with the base plate links to each other, encapsulation layer parcel components and parts, be equipped with around the leg the insulating layer, just the insulating layer is located the base plate with between the encapsulation layer, the insulating layer parcel ground connection piece, a part of insulating layer is located ground connection piece with between the components and parts, ground connection piece encircles the leg.
An electronic device comprises the packaging assembly.
A packaging method is applied to the packaging assembly, and comprises the following steps:
preparing an insulating layer and a grounding piece around a welding pin of a component, wherein the insulating layer is positioned between a substrate and a packaging layer, the insulating layer wraps the grounding piece, one part of the insulating layer is positioned between the grounding piece and the component, and the grounding piece surrounds the welding pin.
The technical scheme adopted by the invention can achieve the following beneficial effects:
in the packaging assembly disclosed by the invention, the insulating layer is arranged around the welding feet of the component and is positioned between the substrate and the packaging layer, the insulating layer can reliably realize the insulation of the welding feet, and even if the packaging layer has a cavity, the welding feet cannot be contacted with the welding feet or the surfaces of other components due to the limiting action of the insulating layer after the welding feet are molten, so that the short circuit phenomenon is prevented, and the reliability of the component can be improved. In addition, the grounding piece can realize electromagnetic isolation between the welding pins, so that the reliability of the packaging assembly during working is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a cross-sectional view of a package assembly disclosed in an embodiment of the present invention;
FIG. 2 is a top view of a portion of a package assembly according to an embodiment of the present invention;
fig. 3 is a cross-sectional view of a package assembly according to another embodiment of the present invention.
Description of reference numerals:
100-substrate, 200-component, 300-packaging layer, 400-insulating layer, 500-solder foot, 600-grounding piece.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the specific embodiments of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The technical solutions disclosed in the embodiments of the present invention are described in detail below with reference to the accompanying drawings.
As shown in fig. 1 and fig. 2, an embodiment of the invention discloses a package assembly, which may specifically include a substrate 100, a component 200, a package layer 300, an insulating layer 400, and a ground element 600.
The substrate 100 may serve as a mounting base for components included in the package assembly, and the substrate 100 may be provided with a connection line inside, so that the component 200 may be electrically connected to other components. The substrate 100 may be a package substrate, or may be a structure such as a circuit board or a glass substrate, which is not limited in this embodiment of the present invention.
The component 200 is provided with a solder tail 500, and the component 200 can be connected to the substrate 100 through the solder tail 500, thereby being electrically connected to the substrate 100. Here, the component 200 may include a chip or other component, the number of the components 200 may be at least one, that is, one or a plurality of the components 200 may be provided, and in order to improve the performance of the package, it is preferable that the number of the components 200 is a plurality, and the plurality of the components 200 may be provided on the substrate 100 at intervals. At least one solder tail 500 may be provided for each component 200, so that the component 200 is connected to the substrate 100 via these solder tails 500. Alternatively, the fillet 500 may be a solder or a pad, and of course, other structures with conductivity and fixing function may also be adopted, which is not limited in the embodiment of the present invention.
The packaging layer 300 wraps the component 200, the packaging layer 300 mainly serves to protect the component 200 and prevent the component 200 from being damaged due to the influence of external environment or other parts, and optionally, the packaging layer 300 may be a resin layer in order to optimize the packaging effect of the packaging layer 300.
The insulating layer 400 may further wrap the ground element 600, and a portion of the insulating layer 400 is located between the ground element 600 and the component 200, that is, the insulating layer 400 may separate the ground element 600 from the component 200 to prevent the ground element 600 and the component 200 from being in direct contact. The ground member 600 may be a metal structure that surrounds the solder fillets 500, such that electromagnetic isolation between the solder fillets 500 may be achieved. Here, the grounding member 600 may have a ring structure, and specifically, may have a ring structure, a square ring structure, or another ring structure. Further, the ground member 600 may be provided only for a part of the solder fillets 500, or the ground member 600 may be provided for all the solder fillets 500.
The insulating layer 400 can reliably realize the insulation of the solder tail 500, and even if the packaging layer 300 has a cavity, the solder tail 500 is melted, and the solder tail 500 cannot be in contact with the solder tail 500 or the surface of other components 200 due to the limiting effect of the insulating layer 400, so that the occurrence of a short circuit phenomenon is prevented, and the reliability of the components 200 can be improved by the packaging assembly. In addition, the grounding member 600 can achieve electromagnetic isolation between the solder tails 500, thereby improving the reliability of the package assembly during operation.
In alternative embodiments, the grounding member 600 may be grounded to the substrate 100, or may be grounded to other structures disposed outside the package assembly. In order to simplify the structure of the grounding member 600 during grounding connection, the grounding member 600 is preferably connected to the substrate 100 in the embodiment of the present invention, since the grounding member 600 is closer to the substrate 100, the grounding connection between the two is more convenient, and after the grounding connection between the two, the package layer 300 can protect the two, so that the grounding connection between the two is more reliable.
In another embodiment, as shown in fig. 3, the insulating layer 400 may be provided in plurality, and a plurality of insulating layers 400 are stacked in sequence, and in each insulating layer 400, at least two insulating layers 400 have different thermal expansion coefficients. Since the thermal expansion coefficients of the substrate 100 and the encapsulation layer 300 are usually different, when the layered structure formed by the substrate 100, the insulating layer 400 and the encapsulation layer 300 is affected by temperature, the thermal expansion amounts of the three are different, and defects such as interface delamination and solder fillet 500 cracking are likely to occur in the substrate 100, the insulating layer 400 and the encapsulation layer 300. The plurality of insulating layers 400 are provided, and when the thermal expansion coefficients of at least two insulating layers 400 are different, the thermal expansion coefficients of the insulating layers 400 can be properly adjusted, so that the difference among the thermal expansion amounts of the substrate 100, the insulating layers 400 and the packaging layer 300 is reduced as much as possible, and defects such as interface delamination and solder fillet 500 cracking of the substrate 100, the insulating layers 400 and the packaging layer 300 are prevented.
In order to enhance the above technical effects, in an alternative embodiment, the thermal expansion coefficient of each insulating layer 400 is between the thermal expansion coefficient of the package layer 300 and the thermal expansion coefficient of the substrate 100, so that there is a certain transition effect between the thermal expansion coefficients of the substrate 100, each insulating layer 400 and the package layer 300, and thus the difference between the thermal expansion amounts of the substrate 100, the insulating layer 400 and the package layer 300 is smaller, thereby improving the reliability of the package assembly. In a specific embodiment, the magnitude relationship of the thermal expansion coefficients of the insulating layers 400 in the stacking direction of the insulating layers 400 can be designed alternately, as long as the defects of interfacial delamination, solder fillet 500 cracking, and the like, which occur in the package assembly, can be improved when the temperature changes. Taking the insulating layer 400 as three layers as an example, the thermal expansion coefficient of the insulating layer 400 near the substrate 100 may be greater than that of the insulating layer 400 in the middle, and the thermal expansion coefficient of the insulating layer 400 in the middle may be smaller than that of the insulating layer 400 near the encapsulation layer 300; alternatively, the thermal expansion coefficient of the insulating layer 400 near the substrate 100 may be smaller than that of the intermediate insulating layer 400, and the thermal expansion coefficient of the intermediate insulating layer 400 may be larger than that of the insulating layer 400 near the encapsulation layer 300.
In further embodiments, the thermal expansion coefficient of each insulating layer 400 may be modified for better transition effects. Specifically, the method comprises the following steps: the thermal expansion coefficient of the encapsulation layer 300 may be greater than that of the substrate 100, and at this time, in a direction in which the encapsulation layer 300 points to the substrate 100, the thermal expansion coefficient of each insulation layer 400 is gradually decreased, so that the thermal expansion coefficients of the encapsulation layer 300, each insulation layer 400, and the substrate 100 are gradually decreased; alternatively, the thermal expansion coefficient of the encapsulation layer 300 may be smaller than that of the substrate 100, and the thermal expansion coefficient of each insulation layer 400 is gradually increased in a direction in which the encapsulation layer 300 points to the substrate 100, so that the thermal expansion coefficients of the encapsulation layer 300, each insulation layer 400, and the substrate 100 are gradually increased.
The thermal expansion coefficient of each insulating layer 400 can be adjusted by adjusting the molecular chain length, the material ratio, and the like of the insulating layer 400.
As mentioned above, the number of the components 200 may be set to be at least one, and at this time, each component 200 is provided with at least one solder tail 500, and in order to achieve a better insulation effect, the insulating layer 400 is provided around each solder tail 500 of each component 200, so that all the solder tails 500 are insulated by the insulating layer 400, thereby better preventing short circuit between the solder tails 500 or between the solder tails 500 and the surfaces of other components 200. Meanwhile, in order to achieve better electromagnetic isolation, a grounding member 600 is provided around each solder leg 500 of each component 200.
The specific structural form of the insulating layer 400 may be flexibly selected as long as insulation can be achieved. In a further embodiment, the insulating layer 400 may be an insulating adhesive layer, which not only can realize insulation, but also has certain viscosity, so that the encapsulation layer 300 and the substrate 100 can be bonded by the insulating layer 400, and thus the encapsulation layer 300 and the substrate 100 are less likely to be separated from each other, thereby improving the structural strength of the package assembly.
Based on the package assembly of any embodiment, an embodiment of the invention further discloses an electronic device, which includes the package assembly of any embodiment. The electronic device disclosed by the embodiment of the invention can be a smart phone, a tablet computer, an electronic book reader or a wearable device. Of course, the electronic device may also be other devices, and the embodiment of the present invention is not limited thereto.
The embodiment of the invention also discloses a packaging method, which can be applied to the packaging assembly in any embodiment, and specifically comprises the following steps:
s100, preparing an insulating layer 400 and a grounding piece 600 around a solder leg 500 of the component 200, wherein the insulating layer 400 is positioned between the substrate 100 and the packaging layer 300, the insulating layer 400 wraps the grounding piece 600, a part of the insulating layer 400 is positioned between the grounding piece 600 and the component 200, and the grounding piece 600 surrounds the solder leg 500.
It should be noted that the above steps do not limit the preparation sequence of the component 200, the solder tail 500, the insulating layer 400, and the grounding member 600, specifically, the component 200 and the solder tail 500 may be prepared first, and then the insulating layer 400 and the grounding member 600 are prepared, or the insulating layer 400 and the grounding member 600 may be prepared first, and then the component 200 and the solder tail 500 are prepared, as long as the finally formed structure conforms to the positional relationship of the components in the above contents. In addition, the insulating layer 400 and the grounding member 600 may be directly prepared on the substrate 100, or may be prepared on other plates first, the plates are removed after the components 200 and the solder tails 500 are prepared, and then the components 200, the solder tails 500, the insulating layer 400 and the grounding member 600 are attached to the substrate 100; the encapsulation layer 300 may be prepared together with the component 200 and the solder leg 500, or may be prepared after the component 200, the solder leg 500, the insulating layer 400, and the ground member 600 are mounted on the substrate 100.
As mentioned above, the insulating layer 400 can insulate the solder fillet 500, and even if the package layer 300 has a cavity, the solder fillet 500 cannot contact with the solder fillet 500 or the surface of the other component 200 due to the restriction of the insulating layer 400 after the solder fillet 500 is melted, so as to prevent the occurrence of short circuit, and thus the package assembly can improve the reliability of the component 200. In addition, the grounding member 600 can achieve electromagnetic isolation between the solder tails 500, thereby improving the reliability of the package assembly during operation.
Optionally, the step S100 specifically includes:
s110, preparing a grounding piece 600 on the substrate 100;
s120, preparing an insulating layer 400 on the substrate 100.
In the above embodiment, the grounding member 600 is first prepared on the substrate 100, and then the insulating layer 400 is prepared on the substrate 100, so that the insulating layer 400 can directly cover the grounding member 600, compared with a manner of preparing the insulating layer 400 and then preparing the grounding member 600, the embodiment can avoid the situation of repeatedly preparing the insulating layer 400, thereby simplifying the packaging method of the package assembly.
In a further embodiment, after the step S100, the method further includes:
s200, preparing a welding leg 500 on the substrate 100;
s300, preparing a component 200 on the welding leg 500;
s400, preparing a packaging layer 300 on the insulating layer 400, wherein the packaging layer 300 wraps the component 200.
In step S100, after the grounding member 600 and the insulating layer 400 are prepared, the insulating layer 400 may reserve a position for preparing the solder tail 500, and after step S100, the solder tail 500 may be directly prepared in the reserved position, so that the solder tail 500 may be more conveniently prepared, and the packaging method of the package assembly may be simpler.
In order to further simplify the above packaging method, step S110 specifically includes: the ground member 600 is prepared on the substrate 100 using an electroplating process. Specifically, the required grounding member 600 is formed by directly plating the corresponding material on the designated area of the substrate 100, and this processing method has the advantages of simple process, high precision, etc., so that the process can simplify the packaging method and improve the quality of the grounding member 600.
Optionally, the step S120 may specifically be: the insulating layer 400 is prepared on the substrate 100 using a printing process. That is, an area where the insulating layer 400 is not required to be prepared may be masked by the printing screen, an area where the insulating layer 400 is required to be prepared is exposed, and then the insulating layer 400 is prepared in the area. When the number of the insulating layers 400 is plural, the plural insulating layers 400 may be prepared by a multi-printing process.
Similarly, in order to simplify the preparation process of the fillet 500, the step S200 is specifically: the solder fillet 500 is prepared on the substrate 100 using a printing process. That is, the area where the solder fillet 500 is not to be prepared can be masked by the printing screen, the area where the solder fillet 500 is to be prepared is exposed, and then the solder fillet 500 is prepared in the area. Such a process is easier to implement and the quality of the resulting solder tail 500 is better.
In the above embodiments of the present invention, the difference between the embodiments is mainly described, and different optimization features between the embodiments can be combined to form a better embodiment as long as they are not contradictory, and further description is omitted here in view of brevity of the text.
The above description is only an example of the present invention, and is not intended to limit the present invention. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims (10)
1. The utility model provides a packaging assembly, its characterized in that includes base plate (100), components and parts (200), encapsulation layer (300), insulating layer (400) and ground connection piece (600), components and parts (200) are equipped with leg (500), components and parts (200) pass through leg (500) with base plate (100) link to each other, encapsulation layer (300) parcel components and parts (200), be equipped with around leg (500) insulating layer (400), just insulating layer (400) are located base plate (100) with between encapsulation layer (300), insulating layer (400) parcel ground connection piece (600), a part of insulating layer (400) is located ground connection piece (600) with between components and parts (200), ground connection piece (600) encircle leg (500).
2. The package assembly of claim 1, wherein the insulating layer (400) is provided in plurality, a plurality of the insulating layers (400) are stacked in sequence, and at least two of the insulating layers (400) in each of the insulating layers (400) have different thermal expansion coefficients.
3. The package assembly of claim 2, wherein the coefficient of thermal expansion of each of the insulating layers (400) is between the coefficient of thermal expansion of the package layer (300) and the coefficient of thermal expansion of the substrate (100).
4. The package assembly of claim 3, wherein the coefficient of thermal expansion of the encapsulation layer (300) is greater than the coefficient of thermal expansion of the substrate (100), and the coefficient of thermal expansion of each of the insulating layers (400) decreases in a direction in which the encapsulation layer (300) points toward the substrate (100); alternatively, the first and second electrodes may be,
the thermal expansion coefficient of the packaging layer (300) is smaller than that of the substrate (100), and the thermal expansion coefficient of each insulating layer (400) is gradually increased in the direction in which the packaging layer (300) points to the substrate (100).
5. The package assembly of claim 1, wherein the number of components (200) is at least one, each component (200) is provided with at least one of the solder fillets (500), and the insulating layer (400) and the ground (600) are provided around each solder fillet (500) of each component (200).
6. The package assembly of claim 1, wherein the ground (600) is grounded to the substrate (100).
7. An electronic device comprising the package assembly of any one of claims 1-6.
8. A packaging method applied to the package assembly of any one of claims 1 to 6, wherein the method comprises:
preparing an insulating layer (400) and a grounding piece (600) around a welding pin (500) of a component (200), wherein the insulating layer (400) is positioned between a substrate (100) and a packaging layer (300), the insulating layer (400) wraps the grounding piece (600), one part of the insulating layer (400) is positioned between the grounding piece (600) and the component (200), and the grounding piece (600) surrounds the welding pin (500).
9. The method of claim 8, wherein the step of preparing the insulating layer (400) and the ground (600) around the solder tail (500) of the component (200) comprises:
preparing a ground member (600) on a substrate (100);
an insulating layer (400) is prepared on a substrate (100).
10. The encapsulation method according to claim 9, further comprising, after preparing the insulating layer (400) on the substrate (100):
preparing a solder fillet (500) on the substrate (100);
preparing a component (200) on the solder tail (500);
preparing an encapsulation layer (300) on the insulation layer (400), wherein the encapsulation layer (300) wraps the component (200).
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| CN201911167330.9A CN110854086A (en) | 2019-11-25 | 2019-11-25 | Packaging assembly, electronic device and packaging method |
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| CN201911167330.9A CN110854086A (en) | 2019-11-25 | 2019-11-25 | Packaging assembly, electronic device and packaging method |
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