CN100524718C - Structure and making method of the base plate integrating the embedded parts - Google Patents
Structure and making method of the base plate integrating the embedded parts Download PDFInfo
- Publication number
- CN100524718C CN100524718C CNB2006100025875A CN200610002587A CN100524718C CN 100524718 C CN100524718 C CN 100524718C CN B2006100025875 A CNB2006100025875 A CN B2006100025875A CN 200610002587 A CN200610002587 A CN 200610002587A CN 100524718 C CN100524718 C CN 100524718C
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- circuit
- layer
- embedded element
- depression
- dielectric layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
This invention discloses one baseboard structure and its process method, wherein, the integrated imbed element baseboard forms several concaved grooves through removing part of circuit layer and dielectric layer and exposes part inner circuit layer in the groove; the imbed element of passive element is put into concave groove connected to the inner circuit layer exposed out of groove bottom.
Description
[technical field]
The present invention relates to a kind of board structure and its manufacture method, particularly relevant for a kind of integration embedded element board structure and its manufacture method.
[background technology]
In manufacture of semiconductor, the integrated circuit of on same wafer, making (integrated circuit, IC) be generally same kind, this is because will be with different production of integrated circuits on same wafer, not only can significantly increase its degree of difficulty and complexity, therefore more can cause the soaring of cost, and the elasticity of the function that increases in addition is undesirable, the development time is long, test process shortcoming consuming time or the like.Yet electronic product is generally and reaches desired purpose of design and effect, is not only can be reached by one or a kind of integrated circuit, and often needs to integrate the electronic product that could form telotism with other element.And how various semiconductor elements are integrated into a low cost, high efficiency and make the development priority that simple electronic product also is current electronic industry.
With reference to Figure 1A to Fig. 1 C, shown the electronic packaging method of integrated passive element.At first with reference to Figure 1A, a surface adhesive type substrate 10 with circuit layer is provided, also have several weld pads 101 and corresponding circuit (not shown) electric connection on it, this substrate 10 can be substrates such as printed circuit board (PCB) or ceramic circuit board.Then, on weld pad 101, form a scolding tin (solder paste) 12, shown in Figure 1B.Shown in Fig. 1 C, required passive device 14 is fixed on the weld pad 101 of substrate 10 by scolding tin 12 adhesions then.
Yet, utilize this electronic packaging mode, often need reflow (reflow) through one or many, and the such high temperature process of reflow can make fixed melts soldering tin and flow, cause passive device to fix and depart from pairing bond pad locations, cause circuit turn-on between passive device and the weld pad flaw to occur even open circuit.And the scolding tin on two adjacent weld pads can be assembled or bridge joint because of flowing, and makes entire circuit be short-circuited, and causes the grievous injury of product.
Therefore, how to prevent that the electronic packaging of integrated element is because repeatedly reflow and cause scolding tin to flow and gathering, bridge joint causes defectives such as passive device skew and short circuit, really is an important subject in present technique field.
[summary of the invention]
One of purpose of the present invention is to provide a kind of board structure of integrating embedded element, prevent because of the high temperature of back welding process or repeatedly reflow cause the scolding tin polymerization of flowing to cause taking place embedded element offset and short circuit, further reduce product losses, improve the yield and the production capacity of product.
Another object of the present invention is to provide a kind of manufacture method of integrating the substrate of embedded element, guarantee when reflow, still embedded element can be fixedly installed on the connection pad of substrate and can not be offset to some extent, avoid causing opening circuit or connecting defectives such as flaw and short circuit of circuit, improve the yield and the production capacity of product.
For achieving the above object, the present invention proposes following technical scheme: a kind of board structure of integrating embedded element, comprise core board, layer within the circuit, dielectric layer, layer outside the circuit and embedded element, wherein, layer within the circuit is located at a surface of core board, dielectric layer coats this layer within the circuit, and this dielectric layer has at least one depression, and exposes the part layer within the circuit from depression.Layer outside the circuit is located on the surface of dielectric layer, and embedded element has at least one contact, and it is arranged in the aforementioned depression and with the layer within the circuit that exposes and electrically connects.
The present invention also proposes following technical scheme: a kind of manufacture method of integrating the substrate of embedded element, at first, one substrate is provided, and this substrate has the dielectric layer and that a lip-deep layer within the circuit, that a core board, is positioned at core board coats layer within the circuit and is positioned at the lip-deep layer outside the circuit of dielectric layer.Then, remove part layer outside the circuit and part dielectric layer and form at least one depression, from this depression, expose the part layer within the circuit.Afterwards, an embedded element held being arranged in the depression, and with depression in the layer within the circuit that exposes electrically connect.
Board structure of the integration embedded element that the present invention proposes and preparation method thereof, be to utilize pocket configurations and embedded element insulating cement material on every side, the fixing effectively element of integrating in the embedded element, make in follow-up high temperature process for example in the reflow, can be because of the mobile polymerization of scolding tin is offset or short circuit, to improve quality, yield and the production capacity of product.
[description of drawings]
Figure 1A is the generalized section of initial substrate in the processing procedure of existing integrated passive element.
Figure 1B is the generalized section that forms scolding tin in the processing procedure of existing integrated passive element on substrate.
Fig. 1 C is the bonding generalized section that finishes of passive device in the processing procedure of existing integrated passive element.
Fig. 2 is the generalized section of the board structure of integration embedded element of the present invention.
Fig. 3 A is the generalized section of initial substrate in the manufacture method of substrate of integration embedded element of the present invention.
Fig. 3 B is the generalized section that forms depression in the manufacture method of substrate of integration embedded element of the present invention.
Fig. 3 C is the generalized section that forms welding resisting layer in the manufacture method of substrate of integration embedded element of the present invention.
Fig. 3 D is the generalized section that attaches scaling powder in the manufacture method of substrate of integration embedded element of the present invention on the layer within the circuit that exposes.
Fig. 3 E is the generalized section that connects embedded element in the manufacture method of substrate of integration embedded element of the present invention.
[embodiment]
Please refer to Fig. 2, it is the generalized section of board structure of the integration embedded element of a preferred embodiment of the present invention, the board structure 20 that this integrates embedded element comprises a core board 200, is provided with a layer within the circuit 203 that designs according to product demand on a surface of this core board 200.On the surface of layer within the circuit 203, be coated with a dielectric layer 205 with protection layer within the circuit 203, and dielectric layer 205 has a depression 207, exposes a part of layer within the circuit 206 from depression 207.In addition, be provided with a layer outside the circuit 204 on the surface of dielectric layer 205, the embedded element 215 with at least one contact is set in this depression 207 and with the layer within the circuit 206 that is exposed to wherein and electrically connects.In addition; be coated with a welding resisting layer 210 on the layer outside the circuit 204; in order to protection layer outside the circuit 204, and between layer outside the circuit 204 and layer within the circuit 203, be provided with several blind hole (not shown), electrically connect layer outside the circuit 204 by these blind holes and form circuit with layer within the circuit 203.
In addition, the layer within the circuit 206 that is exposed in the depression 207 is a circuit that separates in pairs, and it is connected by the scolding tin (not shown) with the contact of embedded element 215 respectively, and this embedded element 215 is passive devices, but is not limited to this.In addition, there is being a protruding 205a bottom at depression 207 between the circuit in pairs, this protruding 205a has not only separated the circuit 206 of paired separation, also intercepted simultaneously the scolding tin in order to be connected on the circuit 206 of paired separation with embedded element 215, make both to have made and for example in the reflow, also can not assemble and cause short circuit because of melts soldering tin in follow-up high temperature process.And embedded element 215 is also because be arranged in the depression 207, limited its space on every side, be coated and fixed by an insulating cement material 216 around adding it, therefore both made when reflow, can not occur that Yin Gaowen causes fixedly embedded element 215 of melts soldering tin as prior art yet, and the layer within the circuit 206 that 215 skews of the embedded element that causes expose, so that can't electrically connect or problem such as loose contact.
With reference to Fig. 3 A to Fig. 3 E, be the generalized section of the basal plate making process of integration embedded element of the present invention.At first, as shown in Figure 3A, provide a substrate 20, this substrate 20 has a core board 200, is provided with a layer within the circuit 203 on core board 200, and covers a dielectric layer 205 on layer within the circuit 203, further establishes a layer outside the circuit 204 again on dielectric layer 205.Then, shown in Fig. 3 B, remove part layer outside the circuit 204 and part dielectric layer 205, form a depression 207, and from depression 207, expose part layer within the circuit 206, but reserve part dielectric layer 205 and form a protruding 205a in depression 207 bottoms.The layer within the circuit 206 of above-mentioned exposure is a paired split circuit, and protruding 205a is between the layer within the circuit 206 of this exposure, to intercept this paired split circuit.The generation type of this depression 207 can adopt prior art such as etching technique or other modes.
As Fig. 3 C shown in, on layer outside the circuit 204 form a welding resisting layer 210, in order to protection layer outside the circuit 204 thereafter.Then, on the layer within the circuit 206 that exposes, attach scaling powder (flux) 212 or scolding tin as the surface adhering material, shown in Fig. 3 D.Again, shown in Fig. 3 E, an embedded element 215 is placed in the depression 207, and is connected with the layer within the circuit 206 that exposes, thereby embedded element 215 is fixed in the depression 207 by the scaling powder 212 that attaches before this.In depression 207, fill in addition insulating cement material 216 be enclosed in embedded element 215 around, make embedded element 215 more firmly be fixed in the depression 207.Then, form the substrate of an integration embedded element again through a back welding process.
The present invention utilizes cave structure to hold passive device and limits its surrounding space, in addition by scaling powder and insulating cement material can be more effectively fixing embedded element 215, passive device had both been made through high temperature processing procedures such as reflows, also can not occur causing the passive device shift phenomenon to influence product quality because of the melts soldering tin gathering.And, the projection that forms by dielectric layer that keeps in the depression, separated the layer within the circuit that exposes in the depression, make it can not occur as prior art assembling phenomenons such as causing the product short circuit, therefore can improve effectively for the yield and the production capacity of product because of reflow or high temperature process cause melts soldering tin.
Claims (8)
1. board structure of integrating embedded element, comprise core board, layer within the circuit, dielectric layer, layer outside the circuit and embedded element, it is characterized in that: form circuit by the blind hole electric connection between described layer within the circuit and the described layer outside the circuit, described layer within the circuit is to be located on the surface of core board, dielectric layer is coated on this layer within the circuit, described dielectric layer has at least one depression, from described depression, expose the part layer within the circuit, the layer within the circuit of described exposure is the paired split circuit that is positioned at described depression bottom, also comprise between the described paired split circuit by the formed projection of part dielectric layer, to intercept described paired split circuit; And layer outside the circuit is provided in a side of the surface of dielectric layer, and embedded element has at least one contact, and described embedded element is arranged in the described depression, and the surface of described embedded element with described contact towards the layer within the circuit that exposes and with its electric connection.
2. the board structure of integration embedded element as claimed in claim 1 is characterized in that: be provided with a welding resisting layer on described layer outside the circuit.
3. the board structure of integration embedded element as claimed in claim 1 is characterized in that: described embedded element is a passive device.
4. the board structure of integration embedded element as claimed in claim 1 is characterized in that: also be surrounded by the insulating cement material around described embedded element.
5. the board structure of integration embedded element as claimed in claim 1 is characterized in that: the sidewall at described depression also is provided with insulating barrier.
6. manufacture method of integrating the substrate of embedded element, it is characterized in that comprising following process: at first, one substrate is provided, this substrate has the dielectric layer and that a lip-deep layer within the circuit, that a core board, is positioned at core board coats layer within the circuit and is positioned at the lip-deep layer outside the circuit of dielectric layer, forms circuit by the blind hole electric connection between described layer within the circuit and the described layer outside the circuit; Then, remove part layer outside the circuit and part dielectric layer and form at least one depression, from described depression, expose the part layer within the circuit; The layer within the circuit of described exposure is the paired split circuit that is positioned at described depression bottom, remains with between the described paired split circuit by the formed projection of part dielectric layer, to intercept described paired split circuit; Afterwards, an embedded element that will have at least one contact is positioned in the described depression, the layer within the circuit that the surface that makes described embedded element have described contact exposes in depression and with its electric connection.
7. the manufacture method of the substrate of integration embedded element as claimed in claim 6 is characterized in that: described method also comprise be filled in the insulating cement material in the described depression and make its be enclosed in embedded element around.
8. the manufacture method of the substrate of integration embedded element as claimed in claim 6 is characterized in that: in the step of described placement embedded element, also further attach scaling powder and reflow embedded element on the described layer within the circuit that exposes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100025875A CN100524718C (en) | 2006-01-06 | 2006-01-06 | Structure and making method of the base plate integrating the embedded parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100025875A CN100524718C (en) | 2006-01-06 | 2006-01-06 | Structure and making method of the base plate integrating the embedded parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1996580A CN1996580A (en) | 2007-07-11 |
| CN100524718C true CN100524718C (en) | 2009-08-05 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100025875A Active CN100524718C (en) | 2006-01-06 | 2006-01-06 | Structure and making method of the base plate integrating the embedded parts |
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| Country | Link |
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| CN (1) | CN100524718C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102931165B (en) * | 2012-11-15 | 2015-08-19 | 日月光半导体(上海)有限公司 | The manufacture method of base plate for packaging |
| CN113453428B (en) * | 2020-03-27 | 2022-05-24 | 庆鼎精密电子（淮安）有限公司 | Circuit board and manufacturing method thereof |
| CN114080105B (en) * | 2020-08-20 | 2023-06-16 | 宏启胜精密电子(秦皇岛)有限公司 | Manufacturing method of circuit board with concave cavity |
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2006
- 2006-01-06 CN CNB2006100025875A patent/CN100524718C/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN1996580A (en) | 2007-07-11 |
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