CN110837040A - Charger mainboard test equipment for simulating wireless charging of Qi standard by using real coil - Google Patents
Charger mainboard test equipment for simulating wireless charging of Qi standard by using real coil Download PDFInfo
- Publication number
- CN110837040A CN110837040A CN201911284116.1A CN201911284116A CN110837040A CN 110837040 A CN110837040 A CN 110837040A CN 201911284116 A CN201911284116 A CN 201911284116A CN 110837040 A CN110837040 A CN 110837040A
- Authority
- CN
- China
- Prior art keywords
- charger
- circuit
- fpga
- signal
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 92
- 238000000034 method Methods 0.000 claims abstract description 25
- 230000008569 process Effects 0.000 claims abstract description 21
- 238000004458 analytical method Methods 0.000 claims abstract description 17
- 230000002093 peripheral effect Effects 0.000 claims abstract description 9
- 238000001514 detection method Methods 0.000 claims description 32
- 238000004088 simulation Methods 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 claims description 21
- 238000012545 processing Methods 0.000 claims description 15
- 230000008878 coupling Effects 0.000 claims description 13
- 238000010168 coupling process Methods 0.000 claims description 13
- 238000005859 coupling reaction Methods 0.000 claims description 13
- 238000004364 calculation method Methods 0.000 claims description 12
- 238000005070 sampling Methods 0.000 claims description 11
- 238000004891 communication Methods 0.000 claims description 10
- 230000008859 change Effects 0.000 claims description 8
- 238000007493 shaping process Methods 0.000 claims description 8
- 238000012544 monitoring process Methods 0.000 claims description 7
- 230000003321 amplification Effects 0.000 claims description 5
- 238000011990 functional testing Methods 0.000 claims description 5
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 5
- 230000001012 protector Effects 0.000 claims description 5
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 230000010354 integration Effects 0.000 abstract description 3
- 230000006870 function Effects 0.000 description 38
- 238000010586 diagram Methods 0.000 description 20
- 238000005516 engineering process Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 230000009977 dual effect Effects 0.000 description 4
- 208000032365 Electromagnetic interference Diseases 0.000 description 3
- 238000004231 fluid catalytic cracking Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
- UUKPIWYXWLJPJF-UHFFFAOYSA-N 2-(2-adamantyl)-1-(4-iodophenyl)guanidine Chemical compound C1C2CC(C3)CC1CC3C2N=C(N)NC1=CC=C(I)C=C1 UUKPIWYXWLJPJF-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2815—Functional tests, e.g. boundary scans, using the normal I/O contacts
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention provides the charger mainboard test equipment which is low in cost, high in integration level, complete in function and suitable for product manufacturing whole-process test and simulates Qi standard wireless charging by using a real coil. The equipment comprises a power supply module (1), a transmitting and receiving coil (2), an electronic analog load (3), an FPGA (4), a plurality of function testing modules, a high-speed ADC acquisition module (5) and a peripheral upper computer (6), wherein the power supply module is used for electrifying the whole testing equipment and a charger mainboard (7) to be tested, one side of the transmitting and receiving coil is connected with the charger mainboard to be tested, the other side of the transmitting and receiving coil is connected with the electronic analog load, the high-speed ADC acquisition module is used for acquiring various signals of the charger mainboard to be tested and uploading the FPGA, the function testing module is used for carrying out function testing on the analog output process of the charger mainboard to be tested and outputting a testing result to the FPGA for analysis, and the upper computer is uploaded to. The invention is used for the field of wireless charger testing.
Description
Technical Field
The invention relates to the field of wireless charger testing, in particular to charger mainboard testing equipment for simulating Qi standard wireless charging by using a real coil.
Background
With the wide development of network communication and electronic digital code, people increasingly depend on electronic products. However, the battery capacity is far from keeping up with the demand of electricity, and wireless charging is an emerging technology which can lead the power revolution most. It is very different from the conventional charging technology. It charges for electronic equipment through wireless energy transmission's mode, separates the physical connection between power supply unit and the consumer, like this in the pleasing to the eye of improvement consumer, when the practicality, can also improve consumer's security. Qi is a Wireless charging standard proposed by the Wireless charging alliance (Wireless Power Consortium WPC), which is the first global organization for promoting Wireless charging technology, and has two characteristics of convenience and universality. First, different brands of products, as long as there is a Qi logo, can be charged using Qi wireless chargers. Secondly, it has overcome the technical bottleneck of wireless charging commonality, and products such as cell-phone, camera, computer can all use Qi wireless charger to charge, provide the possibility for the large-scale commercial of wireless charging.
With the wide application of the Qi wireless charging technology, it is very important to design a device capable of testing Qi wireless charging performance index.
The traditional mode generally adopts a standard power supply, an electronic load and some self-made modules to form a test system, the test system is large in size and high in price, can only test basic functions such as efficiency and heat productivity, and cannot test more functions, especially, the functions such as charging communication and the like cannot be tested in the design stage of a charger circuit board, so that defects generated in the design stage of the circuit board can be discovered only in the detection process after the charger is manufactured in the later stage, the product quality cannot be guaranteed, the rejection rate is increased, and the cost is increased and the resources are wasted.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide the charger mainboard test equipment which is low in cost, high in integration level, complete in function and suitable for product manufacturing whole-process test and simulates Qi standard wireless charging by using a real coil.
The technical scheme adopted by the invention is as follows: the device comprises a power supply module, a transmitting and receiving coil, an electronic analog load, an FPGA, a plurality of function test modules, a high-speed ADC acquisition module and a peripheral upper computer, wherein the power supply module is used for electrifying the whole test equipment and a charger mainboard to be tested, one side of the transmitting and receiving coil is connected with the charger mainboard to be tested, the other side of the transmitting and receiving coil is connected with the electronic analog load, the high-speed ADC acquisition module is used for acquiring various signals of the charger mainboard to be tested and uploading the signals to the FPGA, the function test modules are used for carrying out function test on the analog output process of the charger mainboard to be tested, outputting the test result to the FPGA for analysis, and uploading the signals to the upper computer for background processing and,
the transmitting and receiving coil comprises a transmitting coil and a receiving coil, the transmitting coil couples a test signal to the receiving coil end, or the receiving coil couples a signal to the transmitting coil end;
the electronic simulation load is used for simulating a charged device for wireless charging;
the FPGA acquires and analyzes signals, uploads the analysis result to the upper computer and receives a command from the upper computer;
and the plurality of functional test modules are used for detecting various performances of the mainboard of the charger to be detected in the process of simulating wireless charging of the Qi standard, and uploading detection results to the FPGA for analysis.
According to the scheme, the system mainly tests the performance of the charger mainboard, and through the arrangement of the power supply module, the sending and receiving coil, the electronic analog load, the FPGA, the plurality of function testing modules, the high-speed ADC acquisition module and the peripheral upper computer, the power supply module supplies power to each module of the whole equipment, and the high-precision, wide-range and high-power supply output can well meet the voltage output requirements of different types of chargers, so that the application range of the testing equipment is expanded, and the adaptability of the testing equipment is improved; the transmitting and receiving coil adopts a real coil to realize the test of various performances of the charger mainboard, so that the authenticity of a test scene is ensured, the charging and charged conditions between the charger mainboard to be tested and a charged device are reflected by the truest scene, and the accuracy and reliability of the test are ensured; the electronic simulation load adopts an adjustable form, so that the test requirements of different charger mainboard tests under different working conditions are met; the combination of the FPGA and the high-speed ADC acquisition module can realize rapid analysis and data processing, and improve the processing capacity and speed of the whole equipment, so that the requirement of automatic rapid test is met; in addition, the arrangement of a plurality of functional test modules can realize the test of a plurality of performances of the charger mainboard on one device, the test function is complete, the integration level of the device is greatly improved, and compared with the prior art that various standard instruments are adopted for testing, the invention also greatly reduces the cost; the function testing modules are used for detecting various performances of the charger mainboard to be tested in the process of simulating wireless charging of the Qi standard and uploading a detection result to the FPGA for analysis, so that the whole process of manufacturing the charger mainboard is tested, the whole process of monitoring the manufacturing process of the charger mainboard is realized, the quality and the reliability of the charger mainboard are ensured, and the product quality is greatly improved.
Further, a plurality of the function test modules include, but are not limited to, an AC current collection module, a charging waveform collection module, a voltage collection module, an ASK modulation and demodulation module, an FSK demodulation module, a PING function simulation module, and a charging efficiency calculation and calibration module,
the AC current acquisition module is used for monitoring the current of the mainboard of the charger to be tested in the charging test process, capturing the peak value of the current wave and acquiring the limit current value;
the charging waveform acquisition module is used for outputting the signal waveform subjected to resonance processing to the FPGA for waveform analysis;
the voltage acquisition module is used for uploading detection results to the FPGA for voltage values at a plurality of voltage detection points arranged on the mainboard of the charger to be detected;
the ASK modulation and demodulation module is used for modulating an ASK signal of the charged equipment and demodulating a signal output from an ASK demodulation circuit of the charger mainboard to be detected, and comparing the consistency of the ASK signal of the charged equipment and the signal output from the ASK demodulation circuit of the charger mainboard to be detected so as to detect whether the communication from the charged equipment to the charger mainboard to be detected is normal or not;
the FSK demodulation module is used for demodulating an FSK signal sent to the charged equipment from the charger mainboard to be detected, and comparing the consistency of the FSK signal generated by the charger mainboard to be detected and the demodulated FSK signal so as to detect whether the communication from the charger mainboard to be detected to the charged equipment is normal or not;
the PING function simulation module is used for simulating whether a scene of charged equipment exists or not, and the main board of the charger to be tested judges whether the PING function of the main board is normal or not by detecting the condition of the simulated scene;
the charging efficiency calculating and calibrating module is used for detecting the charging efficiency between the charger mainboard to be tested and the charged equipment and calibrating the voltage value and the current value read by the charger mainboard to be tested.
According to the scheme, the plurality of function test modules comprise an AC current acquisition module, a charging waveform acquisition module, a voltage acquisition module, an ASK modulation and demodulation module, an FSK demodulation module, a PING function simulation module and a charging efficiency calculation and calibration module, wherein the AC current acquisition module is used for monitoring the current condition of a mainboard of the charger to be tested in the charging test process; the charging waveform acquisition module is used for outputting the signal waveform subjected to resonance processing to the FPGA for waveform analysis, so as to realize detection of the charging performance of the mainboard of the charger to be detected; the voltage acquisition module is used for uploading detection results to the FPGA to realize real-time monitoring of the voltage of each test point of the mainboard of the charger to be detected; the ASK modulation and demodulation module is used for modulating an ASK signal of the charged equipment and demodulating a signal output from an ASK demodulation circuit of the charger mainboard to be detected, and comparing the consistency of the ASK signal of the charged equipment and the signal output by the ASK demodulation circuit of the charger mainboard to be detected so as to detect whether the communication from the charged equipment to the charger mainboard to be detected is normal or not; the FSK demodulation module is used for demodulating an FSK signal sent to the charged equipment from the charger mainboard to be detected and comparing the consistency of the FSK signal generated by the charger mainboard to be detected and the demodulated FSK signal so as to detect whether the communication from the charger mainboard to be detected to the charged equipment is normal or not; the PING function simulation module is used for simulating whether a scene of charged equipment exists or not, and the main board of the charger to be tested judges whether the PING function of the main board is normal or not by detecting the condition of the simulated scene; the charging efficiency calculation and calibration module is used for detecting the charging efficiency between the charger mainboard to be detected and the charged equipment and calibrating the voltage value and the current value read by the charger mainboard to be detected; therefore, the performance test modules can perform performance test on the whole process of manufacturing the charger mainboard, and the quality and reliability of the charger mainboard are guaranteed.
Specifically, the AC current collection module includes a hall sensor disposed on the sending coil, the hall sensor is connected to the high-speed ADC collection module, the hall sensor collects an AC signal of the sending coil loop, and the high-speed ADC collection module collects an AC signal waveform of the sending coil loop and uploads the AC signal waveform to the FPGA; the charging waveform acquisition module comprises a front end attenuation circuit, a differential amplification circuit and a differential ADC driving circuit which are sequentially connected, wherein the front end of the front end attenuation circuit is connected to a loop of the sending coil, and the output end of the differential ADC driving circuit is connected with the high-speed ADC acquisition module; the voltage acquisition module comprises a MUX switch, a first buffer and an 18-bit ADC module which are sequentially connected, a plurality of voltage detection points are arranged on a main board of the charger to be detected, the input end of the MUX switch is connected with the plurality of voltage detection points arranged on the main board of the charger to be detected, and the output end of the 18-bit ADC module is connected with the FPGA.
According to the scheme, the Hall sensor can be used for rapidly acquiring the alternating current signals in the sending coil loop in real time, and acquiring and uploading the alternating current signals to the FPGA through the high-speed ADC acquisition module, and the loan of the Hall sensor reaches 1MHz, so that current spikes can be easily grabbed, the limiting current can be conveniently obtained, and references are provided for authentication of EMI (electro-magnetic interference) or FCC (fluid catalytic cracking) and the like; the front end attenuation circuit, the differential amplification circuit and the differential ADC driving circuit are used for processing signals, so that the signal waveform after resonance of the front end of the coil can be conveniently sent and drawn, and the amplitude, the frequency, the distortion rate and the like of the signals can be conveniently read; any voltage test point on the main board of the charger to be tested can be subjected to switching test in real time through the MUX switcher, so that the test is greatly facilitated; and the 18-bit ADC module can realize rapid signal acquisition, so that the voltage detection efficiency is further improved.
Still further, the ASK modulation and demodulation module includes three MOS switch tubes connected to the output end of the BMC encoder of the FPGA, three load adjusting capacitors respectively connected to the drains of the three MOS switch tubes, and an ASK demodulation circuit disposed inside the main board of the charger to be tested, the other ends of the three load adjusting capacitors are connected to the loop of the receiving coil, a signal generated by the FPGA is encoded by the BMC encoder, and then a set of MOS switch tubes and a load adjusting capacitor connected to the MOS switch tubes are selected to be input for load modulation, a change in load at the receiving coil end causes a change in amplitude of a signal at the transmitting coil end, the transmitting coil accesses the signal to the ASK demodulation circuit, the ASK demodulation circuit restores the signal to a signal form before BMC encoding, and then inputs the signal to the FPGA through the high-speed ADC acquisition module, the FPGA compares the consistency of the ASK signal generated by the FPGA with the consistency of the received decoded ASK signal.
According to the scheme, after being coded by the BMC, the signal generated by the FPGA realizes multi-gear load modulation through the matching of the three groups of MOS switching tubes and the load adjusting capacitor, the load change of the receiving coil end can cause the change of the signal amplitude of the sending end, the signal of the sending coil end is connected into the ASK demodulation circuit of the main board of the charger to be detected to demodulate the signal, the circuit can restore the signal to the state before the BMC coding and then input the signal into the FPGA through the high-speed ADC acquisition module, and the FPGA compares the ASK signal generated by the FPGA with the consistency of the received decoded ASK signal, so that whether the ASK signal modulation and demodulation function of the main board of the charger to be detected is normal or not and the reliability are conveniently judged.
Still further, the FSK demodulation module comprises a voltage division circuit, an overvoltage protector, a low-pass filter circuit, a signal coupling capacitor, a second buffer and a signal shaping comparator which are sequentially connected and connected between the receiving coil and the FPGA, wherein the input end of the voltage division circuit is connected with the receiving coil, and the output end of the signal shaping comparator is connected with the FPGA.
According to the scheme, the main board of the charger to be tested modulates signals to the sending coil, the receiving coil receives the modulated signals, the signals coupled to the receiving coil are processed by the voltage division circuit, the overvoltage protector, the low-pass filter circuit, the signal coupling capacitor, the second buffer and the signal shaping comparator, the signal coupling capacitor filters a DC part in the signals to obtain digital signals, the digital signals are sent to the FPGA for demodulation, finally the FPGA detects the consistency of the received signals and the signals sent by the main board of the charger to be tested, and then whether the FSK signal demodulation function between the main board of the charger to be tested and a charged device is normal or not and the reliability are conveniently judged.
Still further, the PING function simulation module includes a first dual switch disposed in the receiving coil loop and a second dual switch disposed at two ends of the electronic simulation load, the first dual switch controls on/off of the receiving coil loop, and the second dual switch controls on/off of the electronic simulation load.
According to the scheme, the receiving coil and the electronic simulation load are switched on and off by controlling the first double switch and the second double switch, so that the situation that whether the charged equipment exists is simulated quickly, and the main board of the charger to be tested can conveniently judge whether the PING function of the main board is normal or not by detecting the simulated situation.
In addition, the charging efficiency calculating and calibrating module comprises a sampling circuit arranged at the power input end of the main board of the charger to be tested and a rectifying circuit arranged between the receiving coil and the electronic analog load, the sampling circuit collects a standard current value and a voltage value input into the main board of the charger to be tested and transmits the standard current value and the voltage value to the FPGA, and the rectifying circuit rectifies alternating current of the receiving coil into direct current and supplies power to the electronic analog load.
According to the scheme, the voltage and the current input to the main board end of the charger to be detected are detected through the sampling circuit, the detected standard values of the voltage and the current are sent to the FPGA to carry out standard power calculation on the input side and are used as references to be compared with the voltage and the current read by the main board of the charger to be detected, and the calibration coefficient and the offset value are obtained through a least square method and a curve fitting technology, so that the power factor calibration of the main board of the charger is rapidly realized, the charging precision of the charger is improved, and the accurate control of wireless charging is realized; the rectifying circuit rectifies alternating current of the receiving coil into direct current and supplies power to the electronic analog load so as to calculate power of the receiving coil end and obtain power, the rectifying circuit plays a role in conversion, and charging efficiency can be rapidly detected through power calculation of the transmitting coil end and the receiving coil end.
Further, the function test module also comprises a dead time detection module, the dead time detection module comprises a first-stage comparator circuit and a second-stage logic comparison circuit, the primary comparator circuit comprises a first comparator and a second comparator, a signal to be tested output by the main board of the charger to be tested is respectively connected to the homodromous input ends of the first comparator and the second comparator, the reverse input end of the first comparator is connected with a high level reference level, the reverse input end of the second comparator is connected with a low level reference level, when the levels of the same-direction input ends of the first comparator and the second comparator are respectively higher than the levels of the reverse input ends, the first comparator and the second comparator both output high level to the second-level logic comparison circuit, otherwise, output low level to the second-level logic comparison circuit; the second-level logic comparison circuit comprises an exclusive-or gate chip and a peripheral circuit thereof, the input end of the second-level logic comparison circuit is connected with the output end of the first-level comparator circuit, the output end of the second-level logic comparison circuit is connected with the FPGA, when the logic level of the first-level comparator circuit is input to the second-level logic comparison circuit is the same, the low level is output to the FPGA, and when the logic level of the first-level comparator circuit is input to the second-level logic comparison circuit is different, the high level is output to the FPGA.
The scheme is that a high level reference level and a low level reference level are respectively introduced through a first comparator and a second comparator in a first-stage comparator circuit, the high level reference level and the low level reference level are respectively compared with a test signal, then the level is output to a second-stage logic comparison circuit for level comparison, the level of the test signal is obtained, when a time period in which the test signal is in the high level is measured, the dead time is determined, the dead time is compared with the theoretical dead time of a wireless charger mainboard, whether the tested wireless charger mainboard is a qualified product is obtained, in the testing process, the high testing precision is ensured through the comparator with high bandwidth and low output delay and the setting of a logic gate chip, the testing speed is high, only the high level value and the low level value of a target signal waveform are set, the testing is more flexible, and compared with the traditional method of calculating the dead time by adopting an oscilloscope waveform, the invention has higher test precision, and compared with the traditional expensive instrument, the invention has lower cost, smaller volume and lower influence of human factors.
Further, the high-speed ADC acquisition module is a 40M ADC chip. Therefore, the high-speed ADC acquisition module can meet the requirements of rapidness and real time and meet the requirement of automation.
In addition, the model of the FPGA sampling unit 5 is ZYNQ7Z 020. Therefore, the FPGA sampling clock of the type can reach 125MHz, can carry out signal error correction, and has high stability and high precision.
Drawings
FIG. 1 is a functional block diagram of the present invention as a whole;
FIG. 2 is a block diagram of a simplified structure of the power module;
FIG. 3 is a simplified circuit schematic of the power module;
fig. 4 is a simplified structural diagram of the transmitting and receiving coil;
FIG. 5 is a simplified schematic diagram of the Hall sensor access device;
FIG. 6 is a circuit schematic of the AC current collection module;
FIG. 7 is a schematic diagram of a current peak waveform collected by the AC current collection module;
FIG. 8 is a schematic diagram of the charging waveform acquisition module;
FIG. 9 is a block diagram of a simple structure of the voltage acquisition module;
FIG. 10 is a schematic block diagram of the present invention for ASK signal modulation and demodulation;
FIG. 11 is a schematic diagram of the encoding pattern output by the BMC encoder of the FPGA;
FIG. 12 is a simplified schematic diagram of any set of MOS switch transistors and a load-adjusting capacitor connected to the transmitter-receiver coil;
FIG. 13 is a functional block diagram of the demodulation circuit in the motherboard of the charger under test;
fig. 14 is a schematic diagram illustrating the analysis of the signal waveform of ASK demodulation signals by the FPGA according to the present invention;
fig. 15 is a circuit block diagram of the FSK demodulation module;
fig. 16 is a schematic circuit diagram of the FSK demodulation module;
FIG. 17 is a simplified schematic diagram of the PING function simulation module;
FIG. 18 is a schematic block circuit diagram of the charge efficiency calculation and calibration module;
fig. 19 is a circuit schematic of the sampling circuit 24;
fig. 20 is a schematic circuit diagram of the rectifier circuit 25;
FIG. 21 is a circuit schematic of the electronic analog load;
fig. 22 is a circuit schematic diagram of the MCU part of the signal processing part 29;
fig. 23 is a schematic circuit diagram of an ADC section of the signal processing section 29;
fig. 24 is a circuit schematic of a DAC part of the signal processing part 29;
FIG. 25 is a circuit block diagram of the dead time detection module;
FIG. 26 is a simplified circuit schematic of the one-stage comparator circuit;
FIG. 27 is a simplified circuit schematic of the two-stage logic compare circuit;
fig. 28 is a schematic view of a scenario of performing an FOD function test on a main board of a charger to be tested.
Detailed Description
The invention adopts a real coil to simulate the charger mainboard test of the Qi standard wireless charging.
As shown in fig. 1, the invention includes a power module 1, a transmitting and receiving coil 2, an electronic analog load 3, an FPGA4, a plurality of function test modules, a high-speed ADC acquisition module 5 and a peripheral upper computer 6. The power module 1 is used for electrifying the whole test equipment and the charger mainboard 7 to be tested. As shown in fig. 2 and fig. 3, the power module 1 is composed of a DC-DC module, an LC resonance, and a DAC feedback voltage regulation, wherein a 24V power is input to the DC-DC module, and simultaneously, the output of the DC-DC module is controlled by enabling, and after the LC resonance, a 2-20V voltage is output, while the DAC feedback voltage regulation inputs peripheral feedback to the DC-DC module, and the DC-DC module performs required voltage output according to the feedback. The sampling circuit 24 in the present invention is provided between the LC resonance and the voltage output terminal. Wherein, the voltage output precision is 0.2% +/-1 mV, the maximum output current is 5A, and the current collection precision is 0.2% +/-1 mA. The high-precision wide-range high-power output can meet the voltage input requirements of various chargers.
One side of sending and receiving coil 2 is connected with the charger mainboard 7 that awaits measuring, the opposite side with electronic analog load 3 is connected, high-speed ADC collection module 5 gathers and uploads the various signals of the charger mainboard 7 that awaits measuring FPGA4, a plurality of function test module carries out functional test to the analog output process of the charger mainboard 7 that awaits measuring to export the test result FPGA4 analysis, upload again host computer 6 carries out background processing and save. As shown in fig. 4, the transmitting and receiving coil 2 includes a transmitting coil TX and a receiving coil RX, and the transmitting coil TX couples a test signal to the receiving coil RX end or the receiving coil RX couples a signal to the transmitting coil TX end. The electronic analog load 3 is used for simulating a charged device for wireless charging. The FPGA4 collects and analyzes the signals, uploads the analysis result to the upper computer 6, and receives the command from the upper computer 6. In this embodiment, the high-speed ADC acquisition module 5 is a 40M ADC chip, which is called ADS5231 IPAG. The model of the FPGA4 is ZYNQ7Z 020.
In the present embodiment, the transmitting and receiving coil 2 uses a coil in practical application, the 2 coils are fixed on a mechanical device, and the distance between the coils can be adjusted. And relays K1, K2, K4 and K5 allow the coils to be completely disconnected from the system, and K5, K6 are used to short-circuit the coils in order to calculate the coupling coefficient K between 2 coils. The following is a calculation method of the coupling coefficient K:
① fixing the coil, and cutting off all K1, K2, K4 and K5;
② measuring an inductance across the TX coil and designated Ltx or an inductance across the RX coil and designated Lrx using an LCR meter;
③ close K6 and measure an inductance across the TX coil and be noted as Ltx (short), or close K3 and measure an inductance across the RX coil and be noted as Lrx (short).
The K value can be obtained from the following equation:
all the opening and closing actions can be completed by the FPGA control relay, so that the whole K value calculation process can be automatically completed by the LCR meter controlled by a computer as long as the LCR meter is connected to the corresponding connector, and the time required for finding a proper coupling coefficient K is greatly saved.
The plurality of functional test modules detect various performances of the charger mainboard 7 to be tested in the process of simulating wireless charging of the Qi standard, and upload detection results to the FPGA4 for analysis. The plurality of function test modules comprise but are not limited to an AC current acquisition module, a charging waveform acquisition module, a voltage acquisition module, an ASK modulation and demodulation module, an FSK demodulation module, a PING function simulation module, a charging efficiency calculation and calibration module and a dead time detection module. The specific modules are further described below.
The AC current acquisition module is used for monitoring the current of the charger mainboard 7 to be tested in the charging test process, capturing the peak value of the current wave and acquiring the limit current value. The AC current acquisition module comprises a Hall sensor 8 arranged on the sending coil TX, the Hall sensor 8 is connected with the high-speed ADC acquisition module 5, the Hall sensor 8 acquires an alternating current signal of the sending coil TX loop, and the high-speed ADC acquisition module 5 acquires an alternating current signal waveform of the sending coil TX loop and uploads the alternating current signal waveform to the FPGA 4. As shown in fig. 5 and 6, the hall sensor 8 is connected in series to the sending coil loop, and then the output of the sensor is connected to the high-speed ADC to collect waveforms, so as to monitor the current in the charging process. In this embodiment, the bandwidth of the hall sensor 8 is up to 1MHz, so a current spike like that shown in fig. 7 can be grabbed. The limit current of the main board of the charger to be tested can be obtained through the function, and the parameter can provide reference for certification of EMI or FCC and the like. In this embodiment, the hall sensor is selected from ACS 70331.
As shown in fig. 8, the charging waveform acquisition module is configured to output the signal waveform subjected to resonance processing to the FPGA4 for waveform analysis. The charging waveform acquisition module comprises a front end attenuation circuit 9, a differential amplification circuit 10 and a differential ADC driving circuit 11 which are sequentially connected, wherein the front end of the front end attenuation circuit 9 is connected to a loop of the sending coil TX, and the output end of the differential ADC driving circuit 11 is connected with the high-speed ADC acquisition module 5. The front-end attenuation circuit 9 is composed of a capacitor, a 10M resistor and a 1M resistor, the differential amplification circuit 10 is composed of two amplifiers, and the differential ADC driving circuit 11 is composed of a comparator and a feedback connected with the rear-end high-speed ADC acquisition module 5. Qi passes through LC resonance with 128KHz input signal when wireless charging, then couples the signal after resonance to the receiving coil end through sending receiving coil, and the waveform acquisition module that charges can draw the signal waveform after resonance, and then judges directly perceivedly whether the parameters such as amplitude, frequency, distortion of signal accord with the design demand.
As shown in fig. 9, the voltage acquisition module is configured to upload a detection result to the FPGA4 for voltage values at a plurality of voltage detection points on the main board 7 of the charger to be detected. The voltage acquisition module comprises a MUX switch 12, a first buffer 13 and an 18-bit ADC module 14 which are sequentially connected, a plurality of voltage detection points are arranged on the charger main board 7 to be detected, the input end of the MUX switch 12 is connected with the voltage detection points arranged on the charger main board 7 to be detected, and the output end of the 18-bit ADC module 14 is connected with the FPGA 4. The voltage acquisition module is mainly used for monitoring whether the voltage of each voltage rail of the main board of the Qi charger to be tested is within the specification.
As shown in fig. 10 to 14, the ASK modulation and demodulation module is configured to modulate an ASK signal of a charged device and demodulate a signal output from an ASK demodulation circuit of the main board 7 of the charger to be tested, and compare consistency between the ASK signal of the charged device and the signal output from the ASK demodulation circuit of the main board 7 of the charger to be tested, so as to detect whether communication between the charged device and the main board 7 of the charger to be tested is normal. The ASK modulation and demodulation module comprises three groups of MOS switch tubes 15 connected with the output end of a BMC encoder of the FPGA4, three load adjusting capacitors 16 respectively connected with the drains of the three groups of MOS switch tubes 15, and an ASK demodulation circuit arranged inside a charger main board 7 to be tested, the other ends of the three load adjusting capacitors 16 are connected with a loop of the receiving coil RX, a signal generated by the FPGA4 is encoded by the BMC encoder, and then a group of MOS switch tubes 15 and the load adjusting capacitors 16 connected with the group of MOS switch tubes 15 are selected to be input for load modulation, the load change at the receiving coil RX end causes the amplitude change of the signal at the TX end of the transmitting coil, the transmitting coil TX accesses the signal into the ASK demodulation circuit, the ASK demodulation circuit restores the signal to the signal form before BMC encoding, and then the signal is input into the FPGA4 through the high-speed ADC acquisition module 5, the FPGA4 compares the consistency of the ASK signal it generates with the decoded ASK signal it receives. In the present invention, three groups of MOS switch tubes 15 and three load adjusting capacitors 16 respectively form three modulation channels. The ASK modulation-demodulation module may simulate ASK modulation of the charged device and may demodulate a signal output from the charger ASK demodulation circuit. Different modulation channels are selected, the modulation depth can be controlled through the size of the modulation capacitor, the device has three modulation depths of large, medium and small, and the specific channel is selected according to the actual working condition. In addition, the ASK demodulation circuit includes an envelope detection diode 26, a demodulation filter 27 and a demodulation comparator 28, an anode of the envelope detection diode 26 is connected to the transmission coil TX, a cathode of the envelope detection diode 26 is connected to the demodulation filter 27, the other end of the demodulation filter 27 is connected to the demodulation comparator 28, and an output of the demodulation comparator 28 is connected to the high-speed ADC acquisition module. The signal received by the receiving coil end after ASK modulation is an analog signal, and needs to be envelope-detected first, and then the envelope is output, envelope detection directly adopts the envelope detection diode 26 to realize multiplication, so as to obtain the required demodulation voltage, then the low-pass demodulation filter 27 filters out high-frequency clutter, so that the envelope (baseband signal) passes through, and finally the envelope (baseband signal) is compared with a decision threshold through the demodulation comparator 28, and finally the envelope (baseband signal) is reduced into a digital signal, namely the digital signal fed back to the transmitting coil end by the receiving coil end.
As shown in fig. 15 and 16, the FSK demodulation module is configured to demodulate an FSK signal sent from the to-be-tested charger motherboard 7 to the to-be-charged device, and compare consistency between the FSK signal generated by the to-be-tested charger motherboard 7 and the demodulated FSK signal, so as to detect whether communication from the to-be-tested charger motherboard 7 to the to-be-charged device is normal. The FSK demodulation module comprises a voltage division circuit 17, an overvoltage protector 18, a low-pass filter circuit 19, a signal coupling capacitor 30, a second buffer 20 and a signal shaping comparator 21 which are sequentially connected and connected between the receiving coil RX and the FPGA4, wherein the input end of the voltage division circuit 17 is connected with the receiving coil RX, and the output end of the signal shaping comparator 21 is connected with the FPGA 4. During testing, the charger mainboard 7 to be tested modulates signals to the sending coil, the receiving coil receives the modulated signals after coupling, the signal coupling capacitor 30 filters out a DC part in the signals, the FSK demodulation module processes the signals on the receiving coil to obtain digital signals, the digital signals are sent to the FPGA for demodulation, and finally the obtained signals are consistent with the signals sent by the charger, so that the FSK demodulation function of the charger mainboard to be tested is normal, otherwise, the charger mainboard to be tested needs to be overhauled.
As shown in fig. 17, the PING function simulation module is configured to simulate whether a scene of a device to be charged exists, and the main board 7 of the charger to be tested determines whether its own PING function is normal by detecting a condition of the simulated scene. The PING function simulation module comprises a first double switch 22 arranged in the receiving coil RX loop and a second double switch 23 arranged at two ends of the electronic simulation load 3, wherein the first double switch 22 controls the on-off of the receiving coil RX loop, and the second double switch 23 controls the on-off of the electronic simulation load 3. The PING function is a very important function of a wireless charging system, and is used to detect whether there is a proper device to be charged in the vicinity of a charger. In the device, a scene (as shown in fig. 17) of whether the charging device exists is simulated by opening and closing the coil and the load of the receiving end, and the charger can judge whether the PING function is normal or not by detecting the simulated scene of the device.
As shown in fig. 18 to fig. 24, the charging efficiency calculating and calibrating module is configured to detect the charging efficiency between the charger motherboard 7 to be tested and the device to be charged, and calibrate the voltage value and the current value read by the charger motherboard 7 to be tested. The charging efficiency calculating and calibrating module comprises a sampling circuit 24 arranged at the power input end of the main board 7 of the charger to be tested, a rectifying circuit 25 arranged between the receiving coil RX and the electronic analog load 3 and a signal processing part 29, wherein the sampling circuit 24 collects a standard current value and a voltage value input into the main board 7 of the charger to be tested and transmits the standard current value and the voltage value to the FPGA4, and the rectifying circuit 25 rectifies alternating current of the receiving coil RX into direct current and supplies power to the electronic analog load 3. The calculation of the charging efficiency is realized by the signal processing section 29. As shown in fig. 18, the present apparatus can accurately measure the voltage (Vboost) and current consumption (Iboost) of the main board terminal of the charger to be measured, and calibrate the voltage (Vsns) and current consumption (Isns) values read back by the charger itself as a reference. At the receiving coil end, the device can rectify the AC voltage on the receiving coil into DC voltage, different electronic analog loads are arranged through a constant current source circuit, and the rectified output voltage and current are recorded as Vrect and Irect. The efficiency of the mainboard of the charger to be tested can be calculated through the following efficiency calculation formula:
if the charger adopts a full-bridge driving scheme, then during the PWM output, in order to prevent the switching tubes of the upper and lower half-bridges from being simultaneously turned on due to the switching speed problem, a dead time, also commonly called PWM response time, must be set. The equipment is provided with a hardware circuit, the circuit can convert the dead time output by the MCU into a pulse signal, and then the pulse signal is sent to the FPGA to calculate the pulse time, so that the dead time output by the PWM can be obtained. As shown in fig. 25 to 27, the dead time detection module includes a one-stage comparator circuit and a two-stage logic comparison circuit, the primary comparator circuit comprises a first comparator U1 and a second comparator U2, a signal to be tested output by a main board 7 of the charger to be tested is respectively connected to the same-direction input ends of the first comparator U1 and the second comparator U2, the inverting input terminal of the first comparator U1 is connected to a high level reference level Voh, the inverting input terminal of the second comparator U2 is connected to a low level reference level Vol, when the levels of the non-inverting input terminals of the first comparator U1 and the second comparator U2 are respectively higher than the levels of the inverting input terminals, the first comparator U1 and the second comparator U2 both output a high level to the second-stage logic comparison circuit, otherwise, output a low level to the second-stage logic comparison circuit; the second-level logic comparison circuit comprises an exclusive-or gate chip U3 and peripheral circuits thereof, the input end of the second-level logic comparison circuit is connected with the output end of the first-level comparator circuit, the output end of the second-level logic comparison circuit is connected with the FPGA4, when the logic levels input to the second-level logic comparison circuit by the first-level comparator circuit are the same, a low level is output to the FPGA4, and when the logic levels input to the second-level logic comparison circuit by the first-level comparator circuit are different, a high level is output to the FPGA 4.
In addition, along with the power of the wireless charging system is higher and higher, if a metal foreign object exists between the transmitting coil and the receiving coil during normal operation, the temperature rises to 100 ℃ within a very short time, so the FOD function is very important, after the metal foreign object is detected by the FOD function of the charging system, the protection function is started, the temperature of the system can be enabled to be not more than 60 ℃ within 10 minutes under the condition that the metal foreign object exists, so that serious damage to a device or a human body is avoided, and the foreign object is removed for a user in a time striving for, as shown in fig. 28, the device can simulate a scene with foreign object charging, and detect whether the FOD function of the charger is normal or not.
Compared with the existing test equipment, the wireless charging test equipment has the advantages of high precision, small volume and low cost, and because the real coil is used for simulating the whole wireless charging process, the test function is more complete, and the wireless charging test equipment is suitable for testing the whole production and manufacturing process of products, so that the production and manufacturing of the products are ensured, and the quality of the products is ensured.
The present invention describes a test device that simulates Qi wireless charging using real coils, but is not limited to only that described in the solution in the patent. All equivalent changes or modifications of the structure, features and principles described in the claims of the present invention should be included in the scope of the present invention.
Claims (10)
1. The utility model provides a charger mainboard test equipment that wireless charging of Qi standard was simulated with true coil which characterized in that: the device comprises a power module (1), a transmitting and receiving coil (2), an electronic analog load (3), an FPGA (4), a plurality of function testing modules, a high-speed ADC acquisition module (5) and a peripheral upper computer (6), wherein the power module (1) is used for electrifying the whole testing equipment and a charger mainboard (7) to be tested, one side of the transmitting and receiving coil (2) is connected with the charger mainboard (7) to be tested, the other side of the transmitting and receiving coil is connected with the electronic analog load (3), the high-speed ADC acquisition module (5) is used for acquiring various signals of the charger mainboard (7) to be tested and uploading the FPGA (4), the function testing modules are used for carrying out function testing on the analog output process of the charger mainboard (7) to be tested, outputting the testing result to the FPGA (4) for analysis and uploading the upper computer (6) for background processing and storage,
the transmit receive coil (2) comprises a transmit coil (TX) and a receive coil (RX), the transmit coil (TX) coupling a test signal to the receive coil (RX) terminal or the receive coil (RX) coupling a signal to the transmit coil (TX) terminal;
the electronic simulation load (3) is used for simulating a charged device charged wirelessly;
the FPGA (4) collects and analyzes signals, uploads the analysis result to the upper computer (6) and receives a command from the upper computer (6);
the plurality of functional test modules are used for detecting various performances of the charger mainboard (7) to be detected in the process of simulating wireless charging of the Qi standard, and uploading detection results to the FPGA (4) for analysis.
2. The charger mainboard test equipment for simulating wireless charging of Qi standard by using real coils as claimed in claim 1, wherein: the plurality of function test modules comprise but are not limited to an AC current acquisition module, a charging waveform acquisition module, a voltage acquisition module, an ASK modulation and demodulation module, an FSK demodulation module, a PING function simulation module and a charging efficiency calculation and calibration module,
the AC current acquisition module is used for monitoring the current of the charger mainboard (7) to be tested in the charging test process, capturing the peak value of the current wave and acquiring the limit current value;
the charging waveform acquisition module is used for outputting the signal waveform subjected to resonance processing to the FPGA (4) for waveform analysis;
the voltage acquisition module is used for uploading the voltage values at a plurality of voltage detection points on the main board (7) of the charger to be detected and the detection results to the FPGA (4);
the ASK modulation and demodulation module is used for modulating an ASK signal of the charged equipment and demodulating a signal output from an ASK demodulation circuit of the charger mainboard (7) to be detected, and comparing the consistency of the ASK signal of the charged equipment and the signal output from the ASK demodulation circuit of the charger mainboard (7) to be detected so as to detect whether the communication from the charged equipment to the charger mainboard (7) to be detected is normal or not;
the FSK demodulation module is used for demodulating an FSK signal sent to the charged equipment from the charger mainboard (7) to be detected, and comparing the consistency of the FSK signal generated by the charger mainboard (7) to be detected and the demodulated FSK signal so as to detect whether the communication from the charger mainboard (7) to be detected to the charged equipment is normal or not;
the PING function simulation module is used for simulating whether a scene of charged equipment exists or not, and the main board (7) of the charger to be tested judges whether the PING function of the main board is normal or not by detecting the condition of the simulated scene;
the charging efficiency calculating and calibrating module is used for detecting the charging efficiency between the charger mainboard (7) to be tested and the charged equipment, and calibrating the voltage value and the current value read by the charger mainboard (7) to be tested.
3. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the AC current acquisition module comprises a Hall sensor (8) arranged on the sending coil (TX), the Hall sensor (8) is connected with the high-speed ADC acquisition module (5), the Hall sensor (8) acquires an alternating current signal of a sending coil (TX) loop, and the high-speed ADC acquisition module (5) acquires an alternating current signal waveform of the sending coil (TX) loop and uploads the alternating current signal waveform to the FPGA (4); the charging waveform acquisition module comprises a front end attenuation circuit (9), a differential amplification circuit (10) and a differential ADC drive circuit (11) which are sequentially connected, wherein the front end of the front end attenuation circuit (9) is connected to a loop of the transmitting coil (TX), and the output end of the differential ADC drive circuit (11) is connected with the high-speed ADC acquisition module (5); the voltage acquisition module comprises a MUX switch (12), a first buffer (13) and an 18-bit ADC module (14) which are sequentially connected, a plurality of voltage detection points are arranged on a charger main board (7) to be detected, the input end of the MUX switch (12) is connected with the plurality of voltage detection points arranged on the charger main board (7) to be detected, and the output end of the 18-bit ADC module (14) is connected with the FPGA (4).
4. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the ASK modulation and demodulation module comprises three groups of MOS (metal oxide semiconductor) switching tubes (15) connected with the output end of a BMC (baseboard management controller) of the FPGA (4), three load adjusting capacitors (16) respectively connected with the drain electrodes of the three groups of MOS switching tubes (15) and an ASK demodulation circuit arranged in a main board (7) of a charger to be tested, the other ends of the three load adjusting capacitors (16) are connected with a loop of a receiving coil (RX), signals generated by the FPGA (4) are coded by the BMC encoder, a group of MOS switching tubes (15) and the load adjusting capacitors (16) connected with the group of MOS switching tubes (15) are selected to be input for load modulation, the amplitude change of the signals at the sending coil (TX) end is caused by the load change at the receiving coil (RX) end, the signals are accessed into the ASK demodulation circuit by the sending coil (TX), and the ASK demodulation circuit restores the signals to the signal form before BMC coding, and then the ASK signal is input into the FPGA (4) through the high-speed ADC acquisition module (5), and the FPGA (4) compares the consistency of the ASK signal generated by the FPGA and the received decoded ASK signal.
5. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coils as claimed in claim 4, wherein: the FSK demodulation module comprises a voltage division circuit (17), an overvoltage protector (18), a low-pass filter circuit (19), a signal coupling capacitor (30), a second buffer (20) and a signal shaping comparator (21), wherein the voltage division circuit (17), the overvoltage protector (18), the low-pass filter circuit (19), the signal coupling capacitor (30), the second buffer (20) and the signal shaping comparator (21) are sequentially connected and connected between the receiving coil (RX) and the FPGA (4), the input end of the voltage division circuit (17) is connected with the receiving coil (RX), and the output end of the signal shaping comparator (21) is connected with the FPGA.
6. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the PING function simulation module comprises a first double switch (22) arranged in the receiving coil (RX) loop and second double switches (23) arranged at two ends of the electronic simulation load (3), wherein the first double switch (22) controls the on-off of the receiving coil (RX) loop, and the second double switch (23) controls the on-off of the electronic simulation load (3).
7. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the charging efficiency calculating and calibrating module comprises a sampling circuit (24) arranged at a power input end of a charger mainboard (7) to be tested and a rectifying circuit (25) arranged between the receiving coil (RX) and the electronic analog load (3), the sampling circuit (24) collects a standard current value and a voltage value of the charger mainboard (7) to be tested and transmits the standard current value and the voltage value to the FPGA (4), and the rectifying circuit (25) rectifies alternating current of the receiving coil (RX) into direct current and supplies power to the electronic analog load (3).
8. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the function test module further comprises a dead time detection module, the dead time detection module comprises a first-stage comparator circuit and a second-stage logic comparison circuit, the first-stage comparator circuit comprises a first comparator (U1) and a second comparator (U2), signals to be tested output by a charger mainboard (7) to be tested are respectively connected to the same-direction input ends of the first comparator (U1) and the second comparator (U2), the reverse-direction input end of the first comparator (U1) is connected to a high level reference level (Voh), the reverse-direction input end of the second comparator (U2) is connected to a low level reference level (Vol), and when the levels of the same-direction input ends of the first comparator (U1) and the second comparator (U2) are respectively greater than the levels of the respective reverse-direction input ends, the first comparator (U1) and the second comparator (U2) both output high levels to the second-stage logic comparison circuit, otherwise, outputting a low level to the two-stage logic comparison circuit; the second grade logic comparison circuit includes exclusive-or gate chip (U3) and its peripheral circuit, second grade logic comparison circuit's input with the output of first grade comparator circuit is connected, second grade logic comparison circuit's output with FPGA (4) are connected, work as first grade comparator circuit input to second grade logic comparison circuit's logic level is the same, then output low level extremely FPGA (4), work as first grade comparator circuit input to second grade logic comparison circuit's logic level is different, then output high level extremely FPGA (4).
9. The charger motherboard testing apparatus for simulating wireless charging of Qi standard with real coil according to claim 2, wherein: the high-speed ADC acquisition module (5) is a 40M ADC chip.
10. The charger mainboard test equipment for simulating wireless charging of Qi standard by using real coils as claimed in claim 1, wherein: the type of the FPGA (4) is ZYNQ7Z 020.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911284116.1A CN110837040B (en) | 2019-12-13 | 2019-12-13 | Charger mainboard test equipment for simulating Qi standard wireless charging by using real coil |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911284116.1A CN110837040B (en) | 2019-12-13 | 2019-12-13 | Charger mainboard test equipment for simulating Qi standard wireless charging by using real coil |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110837040A true CN110837040A (en) | 2020-02-25 |
| CN110837040B CN110837040B (en) | 2024-10-11 |
Family
ID=69578567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911284116.1A Active CN110837040B (en) | 2019-12-13 | 2019-12-13 | Charger mainboard test equipment for simulating Qi standard wireless charging by using real coil |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110837040B (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111426974A (en) * | 2020-04-30 | 2020-07-17 | 深圳市鼎盛光电有限公司 | Power supply automatic test circuit, system and method |
| CN111564908A (en) * | 2020-05-14 | 2020-08-21 | 浙江万安亿创电子科技有限公司 | Information bidirectional transmission implementation method in wireless power transmission system |
| CN113092902A (en) * | 2021-03-29 | 2021-07-09 | 一汽奔腾轿车有限公司 | Automobile wireless charging electromagnetic compatibility test system and control method thereof |
| CN113411145A (en) * | 2021-06-17 | 2021-09-17 | 中电海康无锡科技有限公司 | FSK demodulation decoding performance test method and device and wireless charging system |
| CN115032454A (en) * | 2022-05-23 | 2022-09-09 | 珠海市运泰利自动化设备有限公司 | Lens module coil performance test detection system |
| CN116266767A (en) * | 2021-12-17 | 2023-06-20 | 华润微集成电路(无锡)有限公司 | Method for applying virtual load to wireless charging receiving end |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104158269A (en) * | 2014-08-11 | 2014-11-19 | 长城信息产业股份有限公司 | Wireless charging transmitter, receiver, charging device and wireless charging method |
| US20150054452A1 (en) * | 2013-08-22 | 2015-02-26 | Maxwave Co., Ltd. | System for Wireless Charging Control Based Magnetic Resonance Type |
| US20160336785A1 (en) * | 2015-05-11 | 2016-11-17 | Freescale Semiconductor, Inc. | Bidirectional communication demodulation for wireless charging system |
| CN107979394A (en) * | 2017-12-27 | 2018-05-01 | 中山德著智能科技有限公司 | A kind of wireless data acquisition device based on Qi agreement wireless energy supplies |
| CN108768556A (en) * | 2018-03-26 | 2018-11-06 | 成都市易冲无线科技有限公司 | A method of it is tested for wireless charging transmitting terminal demodulator circuit |
| CN110149291A (en) * | 2019-05-06 | 2019-08-20 | 南京睿赫电子有限公司 | One kind is for wireless charging receiving terminal ASK load modulation circuit and modulator approach |
| CN110398701A (en) * | 2019-08-01 | 2019-11-01 | 珠海市运泰利自动化设备有限公司 | Test equipment and method for wireless charging receiver |
| CN212134876U (en) * | 2019-12-13 | 2020-12-11 | 珠海市运泰利自动化设备有限公司 | Charger mainboard test equipment for simulating wireless charging of Qi standard by using real coil |
-
2019
- 2019-12-13 CN CN201911284116.1A patent/CN110837040B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150054452A1 (en) * | 2013-08-22 | 2015-02-26 | Maxwave Co., Ltd. | System for Wireless Charging Control Based Magnetic Resonance Type |
| CN104158269A (en) * | 2014-08-11 | 2014-11-19 | 长城信息产业股份有限公司 | Wireless charging transmitter, receiver, charging device and wireless charging method |
| US20160336785A1 (en) * | 2015-05-11 | 2016-11-17 | Freescale Semiconductor, Inc. | Bidirectional communication demodulation for wireless charging system |
| CN107979394A (en) * | 2017-12-27 | 2018-05-01 | 中山德著智能科技有限公司 | A kind of wireless data acquisition device based on Qi agreement wireless energy supplies |
| CN108768556A (en) * | 2018-03-26 | 2018-11-06 | 成都市易冲无线科技有限公司 | A method of it is tested for wireless charging transmitting terminal demodulator circuit |
| CN110149291A (en) * | 2019-05-06 | 2019-08-20 | 南京睿赫电子有限公司 | One kind is for wireless charging receiving terminal ASK load modulation circuit and modulator approach |
| CN110398701A (en) * | 2019-08-01 | 2019-11-01 | 珠海市运泰利自动化设备有限公司 | Test equipment and method for wireless charging receiver |
| CN212134876U (en) * | 2019-12-13 | 2020-12-11 | 珠海市运泰利自动化设备有限公司 | Charger mainboard test equipment for simulating wireless charging of Qi standard by using real coil |
Non-Patent Citations (1)
| Title |
|---|
| 蔡小伟;黄桂萍;陈阳;林华丰;: "基于Qi标准的无线充电器研究", 龙岩学院学报, vol. 35, no. 2, 30 April 2017 (2017-04-30), pages 19 - 23 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111426974A (en) * | 2020-04-30 | 2020-07-17 | 深圳市鼎盛光电有限公司 | Power supply automatic test circuit, system and method |
| CN111564908A (en) * | 2020-05-14 | 2020-08-21 | 浙江万安亿创电子科技有限公司 | Information bidirectional transmission implementation method in wireless power transmission system |
| CN113092902A (en) * | 2021-03-29 | 2021-07-09 | 一汽奔腾轿车有限公司 | Automobile wireless charging electromagnetic compatibility test system and control method thereof |
| CN113411145A (en) * | 2021-06-17 | 2021-09-17 | 中电海康无锡科技有限公司 | FSK demodulation decoding performance test method and device and wireless charging system |
| CN113411145B (en) * | 2021-06-17 | 2024-01-26 | 中电海康无锡科技有限公司 | FSK demodulation decoding performance test method and device and wireless charging system |
| CN116266767A (en) * | 2021-12-17 | 2023-06-20 | 华润微集成电路(无锡)有限公司 | Method for applying virtual load to wireless charging receiving end |
| CN116266767B (en) * | 2021-12-17 | 2024-08-27 | 华润微集成电路(无锡)有限公司 | Method for applying virtual load to wireless charging receiving end |
| CN115032454A (en) * | 2022-05-23 | 2022-09-09 | 珠海市运泰利自动化设备有限公司 | Lens module coil performance test detection system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110837040B (en) | 2024-10-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110837040B (en) | Charger mainboard test equipment for simulating Qi standard wireless charging by using real coil | |
| US11258311B2 (en) | Wireless power system with coupling-coefficient-based coil selection | |
| CN204925331U (en) | Two pulse switch capability test devices of IGBT power unit | |
| CN212134876U (en) | Charger mainboard test equipment for simulating wireless charging of Qi standard by using real coil | |
| CN102176635B (en) | Automatic acquisition device for safety monitoring data as well as power-supply method and device thereof | |
| CN104237645A (en) | Online monitoring system and method for insulation state of substation DC system | |
| CN109038854B (en) | Automatic tuning wireless energy transmitting system based on inductance compensation | |
| CN108732524B (en) | Automatic calibration circuit and system for formation and grading test power supply | |
| CN104459310A (en) | Alternating voltage frequency acquisition device | |
| CN110850158A (en) | Charging efficiency calculation and calibration circuit and method for charger mainboard | |
| CN108089055A (en) | A kind of testing lines device and its test method | |
| CN108879869B (en) | Load characteristic-based wireless charging system primary side control method and implementation system thereof | |
| CN111308232B (en) | System and method for measuring stray parameters of current loop of high-power current conversion module | |
| CN201413201Y (en) | Temperature and current measuring unit for high-voltage line | |
| CN207457464U (en) | A kind of accumulator wireless monitor system based on technology of Internet of things | |
| CN201956757U (en) | Data auto-acquisition unit used for safety monitoring field and power supply device thereof | |
| CN204422687U (en) | For the intelligent sensor that wiring state in electric energy meter calibration detects | |
| CN203722267U (en) | Communication power supply management terminal | |
| CN203376390U (en) | Current true RMS detection circuit of motor soft starter | |
| CN107579595A (en) | A kind of accumulator cell charging and discharging monitoring system based on switch cubicle | |
| CN204465518U (en) | A kind of smart antenna tuner | |
| CN204179952U (en) | There is the low-voltage and high-current variable frequency power supply of real-time leakage current test function | |
| CN103353566B (en) | Battery for mimic channel equipment testing circuit in place | |
| CN101526403B (en) | Measurement device for temperature and current of high voltage line | |
| CN203984446U (en) | The interchangeability testing apparatus of a kind of power information acquisition terminal local communication unit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |