CN110780473B - Liquid crystal display device and method for manufacturing the same - Google Patents
Liquid crystal display device and method for manufacturing the same Download PDFInfo
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- CN110780473B CN110780473B CN201911048076.0A CN201911048076A CN110780473B CN 110780473 B CN110780473 B CN 110780473B CN 201911048076 A CN201911048076 A CN 201911048076A CN 110780473 B CN110780473 B CN 110780473B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1323—Arrangements for providing a switchable viewing angle
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133512—Light shielding layers, e.g. black matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
Abstract
The invention discloses a liquid crystal display device and a manufacturing method thereof, wherein the liquid crystal display device comprises an array substrate, a color film substrate and a liquid crystal layer, wherein a plurality of first pixel units and a plurality of second pixel units are formed on the array substrate; the color film substrate comprises a third conducting layer which is a visual angle control electrode. In the liquid crystal display device manufactured by the liquid crystal display device manufacturing method and the liquid crystal display device manufactured by the liquid crystal display device manufacturing method, wide-viewing-angle, full-narrow-viewing-angle and left-right-narrow-viewing-angle display can be realized, and left-right and up-down peeping prevention can be realized simultaneously in a full-narrow-viewing-angle mode, so that the peeping prevention effect is greatly improved; the shielding layer can shield part of light leakage under the normal viewing angle, and can prevent light leakage under the full narrow viewing angle mode, so that light leakage under the large viewing angle is ensured, light leakage or little light leakage under the normal viewing angle is ensured, and the display effect is improved.
Description
Technical Field
The present invention relates to the field of liquid crystal display technologies, and in particular, to a liquid crystal display device and a method for manufacturing the liquid crystal display device.
Background
The liquid crystal display device has the advantages of good picture quality, small volume, light weight, low driving voltage, low power consumption, no radiation and relatively low manufacturing cost, and is dominant in the field of flat panel display. With the continuous progress of the liquid crystal display technology, the viewing angle of the display has been widened from about 120 ° to over 160 °, and people want to effectively protect business confidentiality and personal privacy while enjoying the visual experience brought by a large viewing angle, so as to avoid business loss or embarrassment caused by the leakage of screen information. Therefore, in addition to the wide viewing angle, the display device is also required to have a function of switching the wide viewing angle and the narrow viewing angle. In order to achieve protection of commercial confidentiality and personal privacy, a blind technology can be adopted, but with this technology, switching to a wide viewing angle mode is impossible, and loss of brightness is severe, and at the same time, manufacturing cost is high, and it is difficult to meet use requirements.
Disclosure of Invention
The invention provides a liquid crystal display device capable of realizing wide and narrow visual angle switching and a manufacturing method thereof.
The invention provides a liquid crystal display device, which comprises an array substrate, a color film substrate arranged opposite to the array substrate and a liquid crystal layer positioned between the array substrate and the color film substrate, wherein a plurality of first pixel units and a plurality of second pixel units are limited and formed on the array substrate by scanning lines and data lines; the color film substrate comprises a second substrate, a color resistance layer and a third conducting layer, wherein the color resistance layer and the third conducting layer are arranged on the second substrate, and the third conducting layer is a visual angle control electrode.
The embodiment of the invention also provides a manufacturing method of the liquid crystal display device, which is used for manufacturing the liquid crystal display device and comprises the following steps: forming the array substrate; forming the color film substrate, wherein the color film substrate comprises a second substrate, a color resistance layer and a third conducting layer, and the color resistance layer and the third conducting layer are arranged on the second substrate; arranging the array substrate and the color film substrate oppositely, and injecting a liquid crystal layer between the array substrate and the color film substrate, thereby forming a liquid crystal display device; the step of forming the array substrate specifically comprises: providing the first substrate, forming a thin film transistor on the first substrate, and forming the scanning line and the data line which define a plurality of first pixel units and a plurality of second pixel units; forming a first insulating layer on the thin film transistor; forming a protective layer on the first insulating layer; forming a first through hole on the protective layer of the second pixel unit, and forming a first conductive layer on the protective layer, wherein the first conductive layer penetrates through the first through hole and is electrically connected with the drain electrode of the thin film transistor; forming the shielding layer on the first conductive layer of the second pixel unit; forming a second insulating layer on the shielding layer, wherein the second insulating layer covers the shielding layer and the first conducting layer which is not covered by the shielding layer; forming a through second through hole on the protective layer and the second insulating layer of the first pixel unit, and forming a second conductive layer on the second insulating layer, wherein the second conductive layer penetrates through the second through hole and is electrically connected with the drain electrode of the thin film transistor;
or, providing a first substrate, forming a thin film transistor on the first substrate, and forming the scan line and the data line, the scan line and the data line defining a plurality of first pixel units and a plurality of second pixel units; forming the first conductive layer on the thin film transistor; forming a third insulating layer on the first conductive layer, wherein the third insulating layer only covers the first pixel unit region; forming a second metal layer on the first conductive layer in the second pixel unit region, and on the third insulating layer in the first pixel unit region; forming a fourth insulating layer on the second metal layer; forming the shielding layer on the fourth insulating layer; forming a protective layer on the shielding layer, wherein the protective layer covers the shielding layer and the fourth insulating layer which is not covered by the shielding layer; and a third through hole penetrating through the protective layer of the first pixel unit is formed, the second conductive layer is formed on the protective layer, and the second conductive layer penetrates through the third through hole and is electrically connected with the drain electrode of the thin film transistor.
The present invention also provides a method for manufacturing a liquid crystal display device, the method for manufacturing a liquid crystal display device, comprising: forming the array substrate; forming the color film substrate, wherein the color film substrate comprises the second substrate, the color resistance layer, the third conducting layer and the shielding layer, and the color resistance layer and the third conducting layer are arranged on the second substrate; the array substrate and the color film substrate are oppositely arranged, and the liquid crystal layer is injected between the array substrate and the color film substrate, so that a liquid crystal display device is formed; the step of forming the array substrate specifically comprises: providing the first substrate, forming a thin film transistor on the first substrate, and forming the scanning line and the data line which define a plurality of first pixel units and a plurality of second pixel units; forming a first insulating layer on the thin film transistor; forming a protective layer on the first insulating layer; forming a first through hole on the protective layer of the second pixel unit, and forming a first conductive layer on the protective layer, wherein the first conductive layer penetrates through the first through hole and is electrically connected with the drain electrode of the thin film transistor; forming a second insulating layer over the first conductive layer; forming a through second through hole on the protective layer and the second insulating layer of the first pixel unit, and forming a second conductive layer on the second insulating layer, wherein the second conductive layer penetrates through the second through hole and is electrically connected with the drain electrode of the thin film transistor;
or, providing the first substrate, forming the thin film transistor on the first substrate, and forming the scan line and the data line, the scan line and the data line defining a plurality of the first pixel units and a plurality of the second pixel units; forming the first conductive layer on the thin film transistor; forming a third insulating layer on the first conductive layer, wherein the third insulating layer only covers the first pixel unit region; forming a second metal layer on the first conductive layer in the second pixel unit region, and on the third insulating layer in the first pixel unit region; forming a fourth insulating layer on the second metal layer; forming a protective layer on the fourth insulating layer, wherein the protective layer covers the shielding layer and the fourth insulating layer which is not covered by the shielding layer; and a third through hole penetrating through the protective layer of the first pixel unit is formed, the second conductive layer is formed on the protective layer, and the second conductive layer penetrates through the third through hole and is electrically connected with the drain electrode of the thin film transistor.
Drawings
Fig. 1 is a plan view illustrating a portion of the structure of an array substrate of a liquid crystal display device according to a first embodiment of the present invention.
Fig. 2 is a schematic cross-sectional structure diagram of a first pixel cell P1 of an lcd device according to a first embodiment of the present invention.
Fig. 3 is a schematic cross-sectional structure diagram of a second pixel cell P2 of the lcd device according to the first embodiment of the present invention.
Fig. 4 is a schematic diagram of the first pixel cell P1 shown in fig. 2 under the full narrow viewing angle mode.
Fig. 5 is a schematic diagram of the second pixel cell P2 shown in fig. 3 in the full narrow viewing angle mode.
Fig. 6 is a schematic diagram of the first pixel cell P1 shown in fig. 2 in a left-right narrow viewing angle mode.
Fig. 7 is a schematic diagram of the second pixel cell P2 shown in fig. 3 in a left-right narrow viewing angle mode.
Fig. 8, 9 and 10 are display contrast simulation diagrams of the liquid crystal display device in the first embodiment of the invention in the wide viewing angle mode, the full narrow viewing angle mode and the left and right narrow viewing angle mode, respectively.
Fig. 11 is a schematic cross-sectional structure diagram of a first pixel cell P1 of a liquid crystal display device according to a second embodiment of the invention.
Fig. 12 is a schematic cross-sectional view illustrating a second pixel cell P2 of an lcd device according to a second embodiment of the present invention.
Fig. 13 is a schematic cross-sectional view of a first pixel cell P1 of an lcd device according to a third embodiment of the present invention.
Fig. 14 is a schematic cross-sectional view illustrating a second pixel cell P2 of an lcd device according to a third embodiment of the present invention.
Fig. 15 is a schematic cross-sectional view illustrating a first pixel cell P1 of an lcd device according to a fourth embodiment of the present invention.
Fig. 16 is a schematic cross-sectional view illustrating a second pixel cell P2 of an lcd device according to a fourth embodiment of the present invention.
Fig. 17 is a plan view of a portion of a structure of an array substrate of a liquid crystal display device according to a fifth embodiment of the present invention.
Fig. 18a to 18l are schematic structural views illustrating a method for manufacturing a liquid crystal display device according to a sixth embodiment of the present invention.
Fig. 19a to 19l are schematic structural views illustrating a method for manufacturing a liquid crystal display device according to a seventh embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description of the embodiments, structures, features and effects of the present invention will be made with reference to the accompanying drawings and examples.
First embodiment
As shown in fig. 1 to 3, the liquid crystal display device according to the first embodiment of the invention includes an array substrate 10, a color filter substrate 30 disposed opposite to the array substrate 10, and a liquid crystal layer 50 located between the array substrate 10 and the color filter substrate 30. A plurality of first pixel units P1 and a plurality of second pixel units P2 are defined on the array substrate 10 by the scan lines 100 and the data lines 101. The array substrate 10 includes a first substrate 102, a thin film transistor, a first conductive layer 104, a second conductive layer 106, and a blocking layer 108. The first conductive layer 104 is disposed above the thin film transistor, the second conductive layer 106 is disposed at an interval from the first conductive layer 104, and the shielding layer 108 is disposed between the first conductive layer 104 and the second conductive layer 106. The shielding layer 108 is disposed in a region corresponding to the second pixel cell P2, and is used for shielding light leakage at a normal viewing angle when the liquid crystal display device displays a full narrow viewing angle. The shielding layer 108 is a metal layer, and it is understood that the shielding layer 108 can also be a Black Matrix (BM). The first conductive layer 104 forms a first common electrode in the first pixel unit P1, a second pixel electrode in the second pixel unit P2, the second conductive layer 106 forms a first pixel electrode in the first pixel unit P1, and a second common electrode in the second pixel unit P2. The shielding layer 108 is disposed corresponding to the second common electrode in the second pixel unit P2.
In the first pixel unit P1, the second conductive layer 106 is electrically connected to the drain of the thin film transistor in the pixel unit to form a first pixel electrode; in the second pixel unit P2, the first conductive layer 104 is electrically connected to the drain of the tft in the pixel unit, and forms a second pixel electrode. The second conductive layer 106 in each of the first pixel unit P1 and the second pixel unit P2 includes a plurality of electrode bars, that is, the second conductive layer 106 has a comb shape, and the shielding layer 108 also includes a plurality of shielding bars corresponding to the electrode bars of the second conductive layer 106 in the first pixel unit P1. The first conductive layer 104 and the second conductive layer 106 are made of a transparent conductive material, such as an ITO (indium tin oxide) material. In the first and second pixel units P1 and P2, the first conductive layer 104 forms a bulk electrode.
The plurality of first pixel units P1 and the plurality of second pixel units P2 are arranged in a plurality of rows and columns, one row of the first pixel units P1 is disposed every other row, and one row of the second pixel units P2 is disposed every other row. For example, the odd line is the first pixel cell P1, and the even line is the second pixel cell P2; alternatively, the odd line is the second pixel cell P2, and the even line is the first pixel cell P1. In another embodiment, the plurality of first pixel units P1 and the plurality of second pixel units P2 are arranged in a plurality of rows and columns, one column of first pixel units P1 is disposed every other column, and one column of second pixel units P2 is disposed every other column. In yet another embodiment, the plurality of first pixel units P1 and the plurality of second pixel units P2 are arranged in a plurality of rows and a plurality of columns, and the first pixel units P1 and the second pixel units P2 are alternately arranged in each row. In the present embodiment, the area ratio of all the first pixel units P1 to all the second pixel units P2 is 1: 0.6-1. When the area of all the first pixel cells P1 is larger than that of all the second pixel cells P2, the first pixel cells P1 as the display region increase the transmittance in the full narrow viewing angle mode.
Referring to fig. 18k and 18l together, the array substrate further includes a first metal layer 110, a second metal layer 112 and a semiconductor material layer (not shown), the first metal layer 110 is disposed on the first substrate 102, the semiconductor material layer is disposed above the first metal layer 110 and spaced apart from the first metal layer 110, the second metal layer 112 is disposed on the semiconductor material layer and in contact with the semiconductor material layer, each thin film transistor includes a gate electrode, a semiconductor layer, a source 1120 and a drain 1122 (see fig. 1), the gate electrode is formed by the first metal layer 110, the semiconductor layer is formed by the semiconductor material layer, the source 1120 and the drain 1122 are formed by the second metal layer 112, the source 1120 and the drain 1122 are in contact with the semiconductor layer, the source 1120 and the drain 1122 are spaced apart from each other, the gate electrode is electrically connected to the scan line 100, and the source 1120 is electrically connected to the data line 101. A passivation layer 114 is disposed on the gate of the thin film transistor, and a semiconductor material layer is disposed on the passivation layer 114.
The array substrate 10 further includes a first insulating layer 115, a passivation layer 116 and a second insulating layer 118, wherein the first insulating layer 115 covers the thin film transistor, the passivation layer 116 is disposed on the first insulating layer 115, and the second insulating layer 118 is disposed between the first conductive layer 104 and the second conductive layer 106. The shielding layer 108 is disposed on the first conductive layer 104, and the second insulating layer 118 covers the shielding layer 108, the first conductive layer 104 not covered by the shielding layer 108, and the uncovered protective layer 116. The color filter substrate 30 includes a second substrate 302, a color resist layer 304, and a third conductive layer 306, where the color resist layer 304 and the third conductive layer 306 are disposed on the second substrate 302. The third conductive layer 306 is a viewing angle control electrode. The third conductive layer 306 is made of a transparent conductive material, such as an ITO (indium tin oxide) material.
The color-resist layer 304 is disposed on the second substrate 302 near the liquid crystal layer 50, and the third conductive layer 306 is disposed on the color-resist layer 304 near the liquid crystal layer 50. Specifically, the color filter substrate 30 further includes a shielding layer 309, and the shielding layer 309 is disposed corresponding to the gap between the pixel units. The shielding layer 309 may be a Black Matrix (BM). Specifically, the third conductive layer 306 is a whole block covering the color resist layer 304. By controlling voltage signals applied to the first conductive layer 104, the second conductive layer 106, and the third conductive layer 306, the liquid crystal display device can be switched between a wide viewing angle mode, a left-right narrow viewing angle mode, and a top-bottom-left-right full narrow viewing angle mode.
In the first viewing angle mode (i.e., the wide viewing angle display mode when the liquid crystal molecules of the liquid crystal layer 50 are positive liquid crystal molecules), as shown in fig. 2 and 3, a voltage of 0V is applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, i.e., the voltage difference between the first pixel electrode and the first common electrode, the voltage difference between the second pixel electrode and the second common electrode, the voltage difference between the third conductive layer 306 and the first common electrode, and the voltage difference between the third conductive layer 306 and the second pixel electrode are all 0V. At this time, liquid crystal molecules of the liquid crystal layer 50 are substantially horizontal, the first pixel unit P1 and the second pixel unit P2 are both used as image display regions, and light passing through the liquid crystal layer 50 does not leak, thereby forming a wide viewing angle display mode. In the wide viewing angle mode, the voltage difference between the first pixel electrode and the first common electrode and the voltage difference between the second pixel electrode and the second common electrode may not be 0V, for example, the voltage difference may be an ac voltage having a magnitude of 0.1V to 0.5V, even though the liquid crystal molecules have a pretilt angle of a small angle. Fig. 8 is a diagram showing a display contrast simulation in the wide viewing angle display mode.
In the second viewing angle mode (i.e., the narrow viewing angle display mode when the liquid crystal molecules of the liquid crystal layer 50 are positive liquid crystal molecules), as shown in fig. 4 and 5, voltages of 0V, -7V, 0V, and 5V are applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, respectively, i.e., the voltage difference between the first pixel electrode and the first common electrode is 0V, the voltage difference between the second pixel electrode and the second common electrode is 7V, the voltage difference between the third conductive layer 306 and the first common electrode is 5V, and the voltage difference between the third conductive layer 306 and the second pixel electrode is 12V. At this time, the first pixel unit P1 is used as an image display region, the second pixel unit P2 is not used as an image display region, the liquid crystal molecules in the first pixel unit P1 region are subjected to a vertical electric field, the liquid crystal molecules are deflected in the vertical direction, and the passing light is leaked left and right, the liquid crystal molecules in the second pixel unit P2 region are simultaneously subjected to a horizontal electric field and a vertical electric field, the liquid crystal molecules are deflected in the horizontal and vertical directions, and the passing light is leaked up and down, so that a full narrow viewing angle mode of up and down, left and right is formed. The voltage difference between the first pixel electrode and the first common electrode may be different from 0V, for example, an ac voltage with a magnitude of 0.1V to 0.5V, the voltage difference between the third conductive layer 306 and the first common electrode may be greater than or equal to 5V, the voltage difference between the second pixel electrode and the second common electrode may be greater than or equal to 5V, the voltage difference between the third conductive layer 306 and the first common electrode may be greater than or equal to 5V, and the voltage difference between the third conductive layer 306 and the second pixel electrode may be greater than or equal to 10V. Referring to fig. 9, a schematic diagram of a display effect image of the liquid crystal display device of the present embodiment is shown in table 1 below.
TABLE 1
In the third viewing angle mode (i.e., the left and right narrow viewing angle mode when the liquid crystal molecules of the liquid crystal layer 50 are positive liquid crystal molecules), as shown in fig. 8 and 9, voltages of 0V, and 5V are respectively applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode is 0V, a voltage difference between the second pixel electrode and the second common electrode is 0V, a voltage difference between the third conductive layer 306 and the first common electrode is 5V, and a voltage difference between the third conductive layer 306 and the second pixel electrode is 5V. At this time, the liquid crystal molecules in the first pixel cell P1 are subjected to the vertical electric field, the liquid crystal molecules are deflected in the vertical direction, and the passing light is leaked left and right, and the liquid crystal molecules in the second pixel cell P2 are subjected to the vertical electric field, the liquid crystal molecules are deflected in the vertical direction, and the passing light is leaked left and right, so that a left and right narrow viewing angle mode is formed. It is understood that the voltage difference between the first pixel electrode and the first common electrode may not be 0V, for example, an ac voltage having a magnitude of 0.1V to 0.5V, the voltage difference between the third conductive layer 306 and the first common electrode may be greater than or equal to 5V, the voltage difference between the second pixel electrode and the second common electrode may not be 0V, for example, an ac voltage having a magnitude of 0.1V to 0.5V, the voltage difference between the third conductive layer 306 and the first common electrode may be greater than or equal to 5V, and the voltage difference between the third conductive layer 306 and the second pixel electrode may be greater than or equal to 5V. Fig. 10 is a diagram showing a display contrast simulation in the left-right narrow viewing angle display mode.
With the liquid crystal display device, no bias voltage is applied to the third conductive layer 306 at a wide viewing angle, the liquid crystal in the liquid crystal layer 50 does not tilt, and the liquid crystal display device displays normally. Under a full narrow viewing angle, a bias voltage is applied to the third conductive layer 306, liquid crystal molecules are subjected to a vertical electric field in the region of the first pixel unit P1, the liquid crystal molecules deflect in the vertical direction, and the passing light leaks left and right to realize left and right peep prevention; in the second pixel unit P2, the liquid crystal molecules are affected by the horizontal electric field and the vertical electric field at the same time, and the liquid crystal molecules are deflected in both the horizontal and vertical directions, so that the passing light leaks vertically, and the vertical peep-proof is realized. Under the full narrow visual angle mode, can realize controlling simultaneously and peep-proof from top to bottom, improve the peep-proof effect greatly. Due to the shielding layer 108 disposed on the second pixel unit P2, part of light leakage at the front view angle is shielded, and light leakage at the front view angle in the full narrow view angle mode can be prevented, so that light leakage at the large view angle is prevented, light leakage at the front view angle is also ensured, and the display effect is improved. Moreover, when the shielding layer 108 is disposed corresponding to the second common electrode in the second pixel unit P2, the second common electrode is comb-shaped, so that the shielding area of the shielding layer 108 is small, the transmittance of the liquid crystal display device can be improved, and the display area in the wide viewing angle mode can be increased.
Second embodiment
Referring to fig. 11 and 12, the structure of the liquid crystal display device according to the second embodiment of the present invention is substantially the same as that of the liquid crystal display device according to the first embodiment, except that in the second embodiment, the shielding layer 108 is disposed in a region corresponding to the second pixel unit P2 and on the color filter substrate 30. More specifically, the shielding layer 108 is disposed on a side of the color filter substrate 30 close to the liquid crystal layer 50. The shielding layer 108 is disposed corresponding to the second common electrode in the second pixel unit P2. Other structures of the liquid crystal display device of this embodiment are similar to those of the liquid crystal display device of the first embodiment, and driving methods are also similar, which are not described herein again.
Third embodiment
Referring to fig. 13 and 14, a structure of the liquid crystal display device according to the third embodiment of the present invention is substantially the same as that of the liquid crystal display device according to the second embodiment, except that in the third embodiment, the first conductive layer 104 forms a first common electrode in the first pixel unit P1, a second common electrode in the second pixel unit P2, the second conductive layer 106 forms a first pixel electrode in the first pixel unit P1, and a second pixel electrode in the second pixel unit P2. The shielding layer 108 is disposed corresponding to an area between adjacent second pixel electrodes. The shielding layer 108 is disposed in a region corresponding to the second pixel unit P2 and on the color filter substrate 30. More specifically, the blocking layer 108 is disposed on a side of the color filter substrate 30 close to the liquid crystal layer 50. The shielding layer 108 may also be disposed on one side of the array substrate 10, for example, between the second pixel electrode and the second common electrode, as in the first embodiment. The blocking layer 108 is located between the fourth conductive layer 306 and the liquid crystal layer 50. Other structures of the liquid crystal display device of the present embodiment are similar to those of the liquid crystal display device of the second embodiment, and are not described herein again.
In the liquid crystal display device of this embodiment, in a first viewing angle mode (wide viewing angle), a voltage of 0V is applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode, a voltage difference between the second pixel electrode and the second common electrode, a voltage difference between the third conductive layer 306 and the first common electrode, and a voltage difference between the third conductive layer 306 and the second pixel electrode are all 0V; in a second viewing angle mode (full narrow viewing angle), voltages of 0V, -7V, 0V, and 5V are respectively applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode is 0V, a voltage difference between the second pixel electrode and the second common electrode is 7V, a voltage difference between the third conductive layer 306 and the first common electrode is 5V, and a voltage difference between the third conductive layer 306 and the second pixel electrode is 12V; in a third viewing angle mode (a left and right narrow viewing angle), 0V, and 5V are respectively applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode, and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode is 0V, a voltage difference between the second pixel electrode and the second common electrode is 0V, a voltage difference between the third conductive layer 306 and the first common electrode is 5V, and a voltage difference between the third conductive layer 306 and the second pixel electrode is 5V. That is, the driving manner of the present embodiment is also similar to that of the second embodiment.
Fourth embodiment
Referring to fig. 15 and fig. 16, a structure of a liquid crystal display device according to a fourth embodiment of the present invention is similar to that of the liquid crystal display device according to the third embodiment, except that in the fourth embodiment, the second conductive layer 106 is not formed in the second pixel unit P2, the fourth conductive layer 310 is disposed on a side of the color film substrate 30 facing the liquid crystal layer 50, and the fourth conductive layer 310 is formed in a corresponding region of the second pixel unit P2. The fourth conductive layer 310 has a comb shape, and the shielding layer 108 is disposed corresponding to an area between adjacent electrode bars of the fourth conductive layer 310. Specifically, the fourth conductive layer 310 is located between the barrier layer 108 and the liquid crystal layer 50. Other structures of the liquid crystal display device of the present embodiment are similar to those of the liquid crystal display device of the second embodiment, and are not described herein again.
In the liquid crystal display device of this embodiment, in a first viewing angle mode (wide viewing angle), a voltage of 0V is applied to the first pixel electrode, the fourth conductive layer 310, the first common electrode, the second common electrode, and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode, a voltage difference between the fourth conductive layer 310 and the second common electrode, a voltage difference between the third conductive layer 306 and the first common electrode, and a voltage difference between the third conductive layer 306 and the second pixel electrode are all 0V; in a second viewing angle mode (full narrow viewing angle), voltages of 0V, -7V, 0V, 5V and 5V are respectively applied to the first pixel electrode, the fourth conductive layer 310, the first common electrode, the second common electrode and the third conductive layer 306, that is, a voltage difference between the first pixel electrode and the first common electrode is 0V, a voltage difference between the fourth conductive layer 310 and the second common electrode is 12V, a voltage difference between the third conductive layer 306 and the first common electrode is 5V, and a voltage difference between the third conductive layer 306 and the second common electrode is 0V; in a third viewing angle mode (a left and right narrow viewing angle), voltages of 0V, 5V, 0V, and 5V are applied to the first pixel electrode, the fourth conductive layer 310, the first common electrode, the second common electrode, and the third conductive layer 306, respectively, that is, a voltage difference between the first pixel electrode and the first common electrode is 0V, a voltage difference between the fourth conductive layer 310 and the second common electrode is 5V, and a voltage difference between the third conductive layer 306 and the first common electrode is 5V.
Fifth embodiment
Referring to fig. 17, a structure of the liquid crystal display device according to the fifth embodiment of the present invention is substantially the same as that of the liquid crystal display device according to the first embodiment, except that in the fifth embodiment, three first pixel units P1 and one second pixel unit P2 are adjacently disposed to form a pixel unit group, and three first pixel units P1 in each pixel unit group are respectively disposed corresponding to R, G, B color resistances (i.e., a red color resistance, a green color resistance, and a blue color resistance). Other structures of the liquid crystal display device of this embodiment are similar to those of the liquid crystal display device of the first embodiment, and driving methods are also similar, which are not described herein again.
The structural form of the present embodiment in which three first pixel units P1 and one second pixel unit P2 form one pixel unit group can also be applied to the second embodiment, the third embodiment, and the fourth embodiment, and will not be described again.
Sixth embodiment
A sixth embodiment of the present invention provides a method for manufacturing a liquid crystal display device, which is used for manufacturing the liquid crystal display device of the first embodiment, and the method for manufacturing a liquid crystal display device of this embodiment includes the following steps:
s11, the first substrate 102 is provided, and a thin film transistor is formed on the first substrate 102.
Specifically, step S11 specifically includes: s112, as shown in fig. 18a and 18b, a first metal layer 110 is formed on the first substrate 102. Specifically, the first metal layer 110 is patterned to form a gate electrode of the thin film transistor and the scan line 100. S114, as shown in fig. 18c and 18d, a passivation layer 114 covering the first metal layer 110 is formed on the first metal layer 110. S116, a semiconductor layer (not shown) of the thin film transistor is formed on the passivation layer 114, and a second metal layer 112 is formed on the semiconductor layer. Specifically, the second metal layer 112 is patterned to form a source electrode 1120 and a drain electrode 1122 of the thin film transistor which are spaced apart from each other, the second metal layer 112 further forms a data line 101 electrically connected to the source electrode 1120, and the source electrode 1120 and the drain electrode 1122 are respectively in contact with the semiconductor layer, thereby forming the thin film transistor. A plurality of first pixel cells P1 and a plurality of second pixel cells P2 are defined by the scan lines 100 and the data lines 101.
S13, as shown in fig. 18e and 18f, a first insulating layer 115 is formed on the thin film transistor.
S14, a protective layer 116 is formed on the first insulating layer 115. S15, as shown in fig. 18g and 18h, a first through hole 1162 is formed through the first insulating layer 115 and the passivation layer 116 of the second pixel unit P2, and a first conductive layer 104 is formed on the passivation layer 116, wherein the first conductive layer 104 passes through the first through hole 1162 and is electrically connected to the drain 1122. The first conductive layer 104 forms a first common electrode in the first pixel unit P1 and a second pixel electrode in the second pixel unit P2. Specifically, in the first and second pixel units P1 and P2, the first conductive layer 104 forms a bulk electrode. S17, as shown in fig. 18i and 18j, a shielding layer 108 is formed on the first conductive layer 104 of the second pixel cell P2. In this embodiment, the shielding layer 108 is a metal layer, and it can be understood that the shielding layer 108 may also be a Black Matrix (BM). S19, as shown in fig. 18k and 18l, a second insulating layer 118 is formed on the shielding layer 108, the second insulating layer 118 covers the shielding layer 108 and the first conductive layer 104 not covered by the shielding layer 108, and the protective layer 116 not covered. S21, a through second via 1164 is formed on the first insulating layer 115, the passivation layer 116 and the second insulating layer 118 of the first pixel unit P1, and the second conductive layer 106 is formed on the second insulating layer 118, wherein the second conductive layer 106 is electrically connected to the drain 1122 through the second via 1164. The second conductive layer 106 forms a first pixel electrode in the first pixel unit P1, a second common electrode in the second pixel unit P2, and the shielding layer 108 is disposed corresponding to the second common electrode in the second pixel unit P2. The second conductive layer 106 in the first pixel unit P1 and the second pixel unit P2 each include a plurality of electrode stripes, i.e., the second conductive layer 106 has a comb shape. Correspondingly, the shielding layer 108 is also a shielding bar including a plurality of shielding bars corresponding to the electrode bars of the second conductive layer 106 in the first pixel unit P1. S23, forming a color filter substrate 30, where the color filter substrate 30 includes a second substrate 302, a color resist layer 304, and a third conductive layer 306, and the color resist layer 304 and the third conductive layer 306 are disposed on the second substrate 302. The first conductive layer 104, the second conductive layer 106, and the third conductive layer 306 are all made of a transparent conductive material, such as an ITO (indium tin oxide) material. It is understood that the color filter substrate 30 may be fabricated prior to the array substrate 10, or fabricated simultaneously with the array substrate 10. S25, the array substrate 10 and the color filter substrate 30 are disposed opposite to each other, and the liquid crystal layer 50 is injected between the array substrate 10 and the color filter substrate 30, thereby forming the liquid crystal display device.
Seventh embodiment
A seventh embodiment of the present invention provides another method for manufacturing a liquid crystal display device, which is used for manufacturing the liquid crystal display device of the first embodiment, and the method for manufacturing a liquid crystal display device of this embodiment includes the following steps:
s31, as shown in fig. 19a and 19b, a first substrate 102 is provided, a first metal layer 110 is formed on the first substrate 102, and the first substrate 102 includes a plurality of first pixel cell regions and a plurality of second pixel cell regions. Specifically, the first metal layer 110 is patterned to form a gate electrode of the thin film transistor and the scan line 100. S33, as shown in fig. 19c and 19d, a passivation layer 114 covering the first metal layer 110 is formed on the first metal layer 110. S35, a first conductive layer 104 is formed on the passivation layer 114. The first conductive layer 104 forms a first common electrode in the first pixel unit P1 and a second pixel electrode in the second pixel unit P2. Specifically, the first conductive layer 104 forms a bulk electrode in both the first pixel cell P1 region and the second pixel cell P2 region. S37, as shown in fig. 19e and 19f, a third insulating layer 119 is formed on the first conductive layer 104, and the third insulating layer 119 covers only the first pixel unit P1 region. S39, as shown in fig. 19g and 19h, a second metal layer 112 is formed, the second metal layer 112 is disposed on the first conductive layer 104 in the second pixel cell P2 region, and the second metal layer 112 is disposed on the third insulating layer 119 in the first pixel cell P1 region. Specifically, the second metal layer 112 is patterned to form a source electrode 1120 and a drain electrode 1122 which are spaced apart from each other, the second metal layer 112 further forms a data line 101 electrically connected to the source electrode 1120, and the source electrode 1120 and the drain electrode 1122 are respectively in contact with the semiconductor layer, thereby forming a thin film transistor. A plurality of first pixel cells P1 and a plurality of second pixel cells P2 are defined by the scan lines 100 and the data lines 101. S41, a fourth insulating layer 121 is formed on the second metal layer 112. The fourth insulating layer 121 covers the second metal layer 112, the third insulating layer 119 not covered by the second metal layer 112, and the first conductive layer 104 not covered by the second metal layer 112. S43, as shown in fig. 19i and 19j, the shielding layer 108 is formed on the fourth insulating layer 121. In this embodiment, the shielding layer 108 is a metal layer, and it can be understood that the shielding layer 108 may also be a Black Matrix (BM). S45, a protective layer 116 is formed on the blocking layer 108, and the protective layer 116 covers the blocking layer 108 and the fourth insulating layer 121 not covered by the blocking layer 108. S47, as shown in fig. 19k and 19l, a through third via 1165 is formed on the fourth insulating layer 121 and the passivation layer 116 of the first pixel unit P1, and the second conductive layer 106 is formed on the passivation layer 116, wherein the second conductive layer 106 passes through the third via 1165 and is electrically connected to the drain 1122. The second conductive layer 106 forms a first pixel electrode in the first pixel unit P1, a second common electrode in the second pixel unit P2, and the shielding layer 108 is disposed corresponding to the second common electrode in the second pixel unit P2. The second conductive layer 106 in the first pixel unit P1 and the second pixel unit P2 each include a plurality of electrode stripes, i.e., the second conductive layer 106 has a comb shape. Correspondingly, the shielding layer 108 is also a shielding bar including a plurality of shielding bars corresponding to the electrode bars of the second conductive layer 106 in the first pixel unit P1.
S49, forming a color filter substrate 30, where the color filter substrate 30 includes a second substrate 302, a color resist layer 304, and a third conductive layer 306, and the color resist layer 304 and the third conductive layer 306 are disposed on the second substrate 302. Specifically, the first conductive layer 104, the second conductive layer 106, and the third conductive layer 306 are each made of a transparent conductive material, such as an ITO (indium tin oxide) material. S50, the array substrate 10 and the color filter substrate 30 are disposed opposite to each other, and the liquid crystal layer 50 is injected between the array substrate 10 and the color filter substrate 30, thereby forming the liquid crystal display device.
By using the method for manufacturing the liquid crystal display device, the first conductive layer 104 is directly contacted with the second metal layer 112, and only one time of hole opening is needed in the manufacturing of the whole array substrate 10, thereby simplifying the manufacturing process. It is to be understood that the liquid crystal display devices of the second to fifth embodiments can be manufactured by the manufacturing methods of the sixth and seventh embodiments, and the manufacturing process of the shielding layer 108 and the manufacturing process of the color film substrate 30 are adjusted accordingly, which is not described herein again.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. The liquid crystal display device comprises an array substrate (10), a color film substrate (30) arranged opposite to the array substrate (10) and a liquid crystal layer (50) positioned between the array substrate (10) and the color film substrate (30), and is characterized in that a plurality of first pixel units (P1) and a plurality of second pixel units (P2) are defined and formed on the array substrate (10) by scanning lines (100) and data lines (101), the array substrate (10) comprises a first substrate (102), a thin film transistor, a first conductive layer (104), a second conductive layer (106) and a shielding layer (108), the second conductive layer (106) and the first conductive layer (104) are arranged at intervals in an insulating way, and the shielding layer (108) is arranged in a corresponding area of the second pixel unit (P2) and is used for shielding an orthographic view angle of the liquid crystal display device during full narrow-view angle display; the color film substrate (30) comprises a second substrate (302), a color resistance layer (304) and a third conducting layer (306), wherein the color resistance layer (304) and the third conducting layer (306) are arranged on the second substrate (302), and the third conducting layer (306) is a viewing angle control electrode; wherein the content of the first and second substances,
the first conductive layer (104) forms a first common electrode in the first pixel unit (P1), a second pixel electrode in the second pixel unit (P2), the second conductive layer (106) forms a first pixel electrode in the first pixel unit (P1), a second common electrode in the second pixel unit (P2), the liquid crystal display device realizes wide viewing angle, full narrow viewing angle and left and right narrow viewing angle modes by changing voltages applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode and the third conductive layer (306), and the shielding layer (108) is provided corresponding to the second common electrode in the second pixel unit (P2); alternatively, the first and second electrodes may be,
the first conductive layer (104) forms a first common electrode in the first pixel unit (P1), a second common electrode in the second pixel unit (P2), the second conductive layer (106) forms a first pixel electrode in the first pixel unit (P1), a second pixel electrode in the second pixel unit (P2), the liquid crystal display device realizes wide viewing angle, full narrow viewing angle and left and right narrow viewing angle modes by changing voltages applied to the first pixel electrode, the second pixel electrode, the first common electrode, the second common electrode and the third conductive layer (306), and the shielding layer (108) is disposed corresponding to an area between adjacent second pixel electrodes; alternatively, the first and second electrodes may be,
the first conductive layer (104) forms a first common electrode in the first pixel unit (P1), a second common electrode in the second pixel unit (P2), the second conductive layer (106) forms a first pixel electrode in the first pixel unit (P1), a fourth conductive layer (310) is disposed on one side of the color film substrate (30) facing the liquid crystal layer (50), the fourth conductive layer (310) is formed in a corresponding area of the second pixel unit (P2), the liquid crystal display device realizes wide viewing angle, full narrow viewing angle and left and right narrow viewing angle modes by changing voltages applied to the first pixel electrode, the first common electrode, the second common electrode, the third conductive layer (306) and the fourth conductive layer (310), and the shielding layer (108) is disposed corresponding to an area between adjacent electrode bars of the fourth conductive layer (310).
2. The lcd device of claim 1, wherein the shielding layer (108) is disposed on the array substrate (10).
3. The lcd device of claim 1, wherein the blocking layer (108) is disposed on the color filter substrate (30).
4. The LCD device according to claim 1, wherein the area ratio of all the first pixel cells (P1) to all the second pixel cells (P2) is 1: 0.6-1.
5. The liquid crystal display device of claim 3, wherein a plurality of the first pixel units (P1) and a plurality of the second pixel units (P2) are arranged in a plurality of rows and a plurality of columns, one row of the first pixel units (P1) is disposed in every other row, and one row of the second pixel units (P2) is disposed in every other row; or, a plurality of the first pixel units (P1) and a plurality of the second pixel units (P2) are arranged in a plurality of rows and a plurality of columns, one column of the first pixel units (P1) is arranged at every other column, and one column of the second pixel units (P2) is arranged at every other column; or, a plurality of the first pixel units (P1) and a plurality of the second pixel units (P2) are arranged in a plurality of rows and a plurality of columns, and in each row, the first pixel units (P1) and the second pixel units (P2) are alternately arranged; or, three first pixel units (P1) and one second pixel unit (P2) are adjacently arranged to form a pixel unit group, and the three first pixel units (P1) in each pixel unit group are respectively arranged corresponding to the red, green and blue color resistances of the color film substrate (30).
6. A method for manufacturing a liquid crystal display device according to claim 2, comprising: forming the array substrate (10); forming the color film substrate (30), wherein the color film substrate (30) comprises a second substrate (302), a color resistance layer (304) and a third conductive layer (306), and the color resistance layer (304) and the third conductive layer (306) are arranged on the second substrate (302); arranging the array substrate (10) and the color film substrate (30) oppositely, and injecting a liquid crystal layer (50) between the array substrate (10) and the color film substrate (30) to form a liquid crystal display device;
the step of forming the array substrate (10) specifically comprises: providing the first substrate (102), forming a thin film transistor on the first substrate (102), and forming the scan line (100) and the data line (101), wherein the scan line (100) and the data line (101) define a plurality of first pixel units (P1) and a plurality of second pixel units (P2); forming a first insulating layer (115) on the thin film transistor; forming a protective layer (116) on the first insulating layer (115); forming a first through hole (1162) in the first insulating layer (115) and the protection layer (116) of the second pixel unit (P2), and forming the first conductive layer (104) on the protection layer (116), wherein the first conductive layer (104) passes through the first through hole (1162) and is electrically connected to the drain (1122) of the thin film transistor; forming the shielding layer (108) on the first conductive layer (104) of the second pixel cell (P2); forming a second insulating layer (118) on the shielding layer (108), the second insulating layer (118) covering the shielding layer (108) and the first conductive layer (104) not covered by the shielding layer (108); forming a second through hole (1164) in the first insulating layer (115), the protective layer (116), and the second insulating layer (118) of the first pixel unit (P1), and forming the second conductive layer (106) on the second insulating layer (118), wherein the second conductive layer (106) passes through the second through hole (1164) and is electrically connected to the drain (1122) of the tft;
or, providing a first substrate (102), forming a thin film transistor on the first substrate (102), and forming the scanning line (100) and the data line (101), wherein the scanning line (100) and the data line (101) define a plurality of first pixel units (P1) and a plurality of second pixel units (P2); forming the first conductive layer (104) over the thin film transistor; forming a third insulating layer (119) over the first conductive layer (104), the third insulating layer (119) covering only the first pixel cell (P1) area; forming a second metal layer (112), the second metal layer (112) being disposed on the first conductive layer (104) in the second pixel cell (P2) region, the second metal layer (112) being disposed on the third insulating layer (119) in the first pixel cell (P1) region; forming a fourth insulating layer (121) on the second metal layer (112); forming the shielding layer (108) on the fourth insulating layer (121); forming a protective layer (116) on the shielding layer (108), the protective layer (116) covering the shielding layer (108) and the fourth insulating layer (121) not covered by the shielding layer (108); a third through hole (1165) is formed through the fourth insulating layer (121) and the protection layer (116) of the first pixel unit (P1), the second conductive layer (106) is formed on the protection layer (116), and the second conductive layer (106) passes through the third through hole (1165) and is electrically connected to the drain (1122) of the thin film transistor.
7. A method for manufacturing a liquid crystal display device according to claim 3, comprising: forming the array substrate (10); forming the color film substrate (30), wherein the color film substrate (30) comprises the second substrate (302), the color resistance layer (304), the third conductive layer (306) and the shielding layer (108), and the color resistance layer (304) and the third conductive layer (306) are arranged on the second substrate (302); the array substrate (10) and the color film substrate (30) are arranged oppositely, and the liquid crystal layer (50) is injected between the array substrate (10) and the color film substrate (30), so that a liquid crystal display device is formed;
the step of forming the array substrate (10) specifically comprises: providing the first substrate (102), forming a thin film transistor on the first substrate (102), and forming the scan line (100) and the data line (101), wherein the scan line (100) and the data line (101) define a plurality of first pixel units (P1) and a plurality of second pixel units (P2); forming a first insulating layer (115) over the thin film transistor; forming a protective layer (116) on the first insulating layer (115); forming a first through hole (1162) in the passivation layer (116) of the second pixel unit (P2), and forming the first conductive layer (104) on the first insulating layer (115) and the passivation layer (116), wherein the first conductive layer (104) passes through the first through hole (1162) and is electrically connected to the drain electrode (1122) of the tft; forming a second insulating layer (118) over the first conductive layer (104); forming a second through hole (1164) in the first insulating layer (115), the protective layer (116), and the second insulating layer (118) of the first pixel unit (P1), and forming the second conductive layer (106) on the second insulating layer (118), wherein the second conductive layer (106) passes through the second through hole (1164) and is electrically connected to the drain (1122) of the tft;
or, providing the first substrate (102), forming the thin film transistor on the first substrate (102), and forming the scan line (100) and the data line (101), wherein the scan line (100) and the data line (101) define a plurality of first pixel units (P1) and a plurality of second pixel units (P2); forming the first conductive layer (104) over the thin film transistor; forming a third insulating layer (119) over the first conductive layer (104), the third insulating layer (119) covering only the first pixel cell (P1) area; forming a second metal layer (112), the second metal layer (112) being disposed on the first conductive layer (104) in the second pixel cell (P2) region, the second metal layer (112) being disposed on the third insulating layer (119) in the first pixel cell (P1) region; forming a fourth insulating layer (121) on the second metal layer (112); forming a protective layer (116) on the fourth insulating layer (121), the protective layer (116) covering the shielding layer (108) and the fourth insulating layer (121) not covered by the shielding layer (108); a third through hole (1165) is formed through the fourth insulating layer (121) and the protection layer (116) of the first pixel unit (P1), the second conductive layer (106) is formed on the protection layer (116), and the second conductive layer (106) passes through the third through hole (1165) and is electrically connected to the drain (1122) of the thin film transistor.
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