CN110758143A - Single three-phase compatible charger control circuit and control method for reducing electrolytic capacitance - Google Patents
Single three-phase compatible charger control circuit and control method for reducing electrolytic capacitance Download PDFInfo
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L53/00—Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles
- B60L53/20—Methods of charging batteries, specially adapted for electric vehicles; Charging stations or on-board charging equipment therefor; Exchange of energy storage elements in electric vehicles characterised by converters located in the vehicle
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/70—Energy storage systems for electromobility, e.g. batteries
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/7072—Electromobility specific charging systems or methods for batteries, ultracapacitors, supercapacitors or double-layer capacitors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/72—Electric energy management in electromobility
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T90/00—Enabling technologies or technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02T90/10—Technologies relating to charging of electric vehicles
- Y02T90/14—Plug-in electric vehicles
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Abstract
The invention discloses a control circuit and a control method of a single-three phase compatible charger for reducing electrolytic capacitors, wherein the control circuit comprises a first alternating current-direct current conversion module, a second alternating current-direct current conversion module and a third alternating current-direct current conversion module which are respectively connected with three phase lines of a power grid, and the output ends of the first alternating current-direct current conversion module, the second alternating current-direct current conversion module and the third alternating current-direct current conversion module are connected in parallel and; the bus capacitor of the first AC/DC conversion module adopts a large-capacitance-value bus capacitor, and the bus capacitors of the second and third AC/DC conversion modules adopt a small-capacitance-value bus capacitor CFbus(ii) a In a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in a three-phase working mode, the first, second and third alternating current-direct current conversion modules are all put into operation; the invention can reduce electrolytic capacitance, improve the power density of the charger, prolong the service life of the charger, reduce the volume of the charger, and simultaneouslyThe output charging current ripple is suppressed, and the stable charging performance is maintained.
Description
Technical Field
The invention belongs to the technical field of electric automobile charging, and particularly relates to a single three-phase compatible charger control circuit for reducing electrolytic capacitors and a control method thereof.
Background
With the requirements of energy conservation and emission reduction and air pollution control, new energy automobiles are gradually commercialized in the market, and electric automobiles are more the main force of the new energy automobiles. Along with the increase of endurance mileage, the capacity of a power battery of an electric vehicle is increased day by day, in order to reduce charging waiting time, the vehicle-mounted charger has stronger and stronger requirements for high power, and a three-phase input high-power charger becomes a main force of the future market.
The current vehicle has longer and longer requirement on the service life of a charger power supply, the working environment is more and more severe (high temperature and large amplitude), and the service life of the charger is restricted by using a large number of electrolytic capacitors in the traditional power supply. Meanwhile, with the updating of semiconductor technology, high-frequency and high-density chargers become the key points for pursuing of various host factories and parts. For example, a typical 6.6kW charger requires about 1000uF electrolytic capacitance, which accounts for about 10% of the entire charger board.
FIG. 1 shows a conventional single-phase and three-phase compatible charger, which is internally composed of three independent AC/DC conversion modules, inputs of the three independent AC/DC conversion modules are respectively connected between lines L1-L3 and an N line, and outputs of the three independent AC/DC conversion modules are combined in parallel to charge a battery. FIG. 2 is a schematic block diagram of the AC/DC converter module of FIG. 1, the module being composed of two stages, the intermediate bus capacitor being formed by an electrolytic capacitor CEbusAnd a thin film (or ceramic capacitor) CFbusThe energy storage device is used for storing energy, inputting alternating current energy and outputting constant direct current energy. Fig. 3 is a graph of input voltage current, input power and output power for a conventional 220V 32A ac input, which requires periodic energy storage and release through bus capacitance due to the difference between input power and output power. The existing single-phase and three-phase compatible vehicle-mounted charger has the defects of low efficiency, more electrolytic capacitors and larger volume.
In order to improve the power density and prolong the service life of the charger, it is desirable to reduce or eliminate the PFC bus electrolytic capacitor inside the charger, but this may result in too large charging ripple current during single-phase charging. Therefore, there is a need in the art to develop a control circuit of a single three-phase compatible charger with small charging ripple current, small usage amount of electrolytic capacitors, small size and high power density.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides a single three-phase compatible charger control circuit for reducing electrolytic capacitors and a control method thereof.
The technical scheme adopted by the invention is to design a single-three phase compatible charger control circuit for reducing electrolytic capacitance, which comprises a first, a second and a third AC/DC conversion modules respectively connected with three phase lines of a power grid, wherein the output ends of the first, the second and the third AC/DC conversion modules are connected in parallel and then connected with a battery; the bus capacitor of the first AC/DC conversion module adopts a large-capacitance-value bus capacitor, and the bus capacitors of the second and third AC/DC conversion modules adopt a small-capacitance-value bus capacitor CFbus(ii) a In a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc conversion modules are all put into operation.
The first, second and third alternating current-direct current conversion modules comprise a PFC module and a DCDC module, and the PFC module and the DCDC module are connected through a positive bus and a negative bus; a small-capacitance bus capacitor C connected in parallel is arranged between the positive bus and the negative bus of the first AC-DC conversion moduleFbusAnd a large capacitance value capacitor CEbusA small-capacitance bus capacitor C is respectively arranged between the positive and negative buses of the second and third AC-DC conversion modulesFbus。
The large-capacitance capacitor CEbusBy means of electrolytic capacitors, the said small-value bus capacitor CFbusA thin film capacitor or a ceramic capacitor is used.
The large-capacitance capacitor CEbusA control switch S is connected in series and is controlled by a controller; in the single-phase operating mode, the control switch S is closed; in the three-phase operating mode, the control switch S is open.
When the three-phase working mode is adopted, the first, second and third alternating current-direct current conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a DCDC module output end current sampler and a DCDC module output end voltage sampler; the output end current sampler and the output end voltage sampler of the DCDC module are connected with two input ends of a first multiplier, the output end of the first multiplier is connected with the decrement input end of a first subtracter, the decrement input end of the first subtracter is connected with a charging power set value, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a second multiplier, the other input end of the second multiplier is connected with the PFC module voltage sampler, the output end of the second multiplier is connected with the subtracted input end of the second subtracter, the subtracting input end of the second subtracter is connected with the current sampler of the PFC module, the output end of the second subtracter is connected with the input end of the second PID regulator, the output end of the second PID regulator is connected with the first PWM controller, and the first PWM controller controls the PFC module. The controller comprises positive and negative bus voltage samplers, the output ends of the positive and negative bus voltage samplers are connected with the subtraction end of a third subtracter, the subtracted end of the third subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, the output end of the third PID regulator is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
In a single-phase working mode in a design scheme, the first, second and third alternating current-direct current conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a positive and negative bus voltage sampler, a DCDC module output end current sampler and a DCDC module output end voltage sampler; the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtraction end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtraction input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, the first PWM controller controls the PFC module, the output end voltage sampler of the DCDC module is connected with the subtraction end of a third subtracter, the subtraction end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, and the output end of the third PID regulator is connected with one input end of the small fetching device; the output end of the DCDC module is connected with a subtracting end of a fourth subtracter, a subtracted end of the fourth subtracter is connected with an output current set value Iout _ ref, an output end of the fourth subtracter is connected with an input end of a fourth PID regulator, and an output end of the fourth PID regulator is connected with the other input end of the small fetching device; and the output end of the small fetching device is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
In another design scheme, during a single-phase working mode, the first, second and third ac/dc conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a positive and negative bus voltage sampler, a DCDC module output end current sampler, and a DCDC module output end voltage sampler; the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtraction end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtraction input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, the first PWM controller controls the PFC module, the output end voltage sampler of the DCDC module is connected with the subtraction end of a third subtracter, the subtraction end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of the third PID regulator, one input end of the small device is taken from the output end of the third PID regulator, the other input end of the small device is connected with an output current set value Iout _ ref, the output end of the small device is connected with the subtracted end of the fourth subtracter, the output end of the DCDC module at the subtracted end of the fourth subtracter is connected with the current sampler at the output end of the DCDC module, the output end of the fourth subtracter is connected with the input end of the fourth PID regulator, the output end of the fourth PID regulator is connected with the second PWM controller, and the DCDC module is controlled by the second PWM controller.
The invention also designs a control method of the single-three phase compatible charger control circuit for reducing the electrolytic capacitance, which comprises a single-phase working mode and a three-phase working mode; in a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc converter modules are put into operation.
In the single-phase working mode, the large-capacitance capacitor C in the first AC/DC conversion moduleEbusAnd the small-capacitance value capacitor CFbusEntering parallel operation; in the three-phase working mode, make the capacitance C with large capacitance valueEbusThe parallel connection is separated and the operation is not carried out.
In a three-phase working mode, sampling input current Iin _ ac of a PFC module and input voltage Vin _ ac of the PFC module, and sampling output current Iout of a DCDC module and output voltage Vout of the DCDC module; multiplying output current Iout of a DCDC module and output voltage Vout of the DCDC module to obtain output power, subtracting the output power from a charging power set value Poutreq to obtain a power deviation value, obtaining a power loop output value through a first PID regulator, multiplying the power loop output value and input voltage Vin _ ac of a PFC module to obtain a current reference value, subtracting input current Iin _ ac from the current reference value to obtain a duty ratio regulation value, regulating the duty ratio regulation value through a second PID regulator, sending the duty ratio regulation value to a first PWM controller, and controlling the PFC module through the first PWM controller.
And (3) sampling the bus voltage Vpfc of the positive and negative buses, subtracting the bus voltage Vpfc by using a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, adjusting the voltage deviation value by a third PID (proportion integration differentiation) adjuster, and then sending the voltage deviation value to a second PWM (pulse width modulation) controller, and controlling the DCDC module by the second PWM controller.
In a single-phase working mode in a design scheme, the bus voltage Vpfc of a positive bus and a negative bus is sampled, the bus voltage Vpfc is subtracted from a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, the voltage deviation value is regulated by a first PID regulator and then multiplied by input voltage Vin _ ac of a PFC module, input current Iin _ ac of the PFC module is subtracted from the obtained product, the obtained difference value is regulated by a second PID regulator and then sent to a first PWM controller, and the PFC module is controlled by the first PWM controller; subtracting the output current Iout of the DCDC module from the set value Iout _ ref of the output current, adjusting the obtained difference value by a fourth PID adjuster, and sending the adjusted difference value to a small fetching device; and the small selector sends the smaller value of the two values to the second PWM controller, and the second PWM controller controls the DCDC module.
In another design scheme, during a single-phase working mode, the bus voltage Vpfc of a positive bus and a negative bus is sampled, the bus voltage Vpfc is subtracted from a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, the voltage deviation value is regulated by a first PID regulator and then multiplied by input voltage Vin _ ac of a PFC module, the input current Iin _ ac of the PFC module is subtracted from the obtained product, the obtained difference value is regulated by a second PID regulator and then sent to a first PWM controller, and the PFC module is controlled by the first PWM controller; and the small value is compared with an output current set value Iout _ ref by the small device, the output current Iout of the DCDC module is subtracted from the smaller value of the two values, the obtained difference value is regulated by a fourth PID regulator and then is sent to a second PWM controller, and the second PWM controller controls the DCDC module.
The single-phase working mode and the three-phase working mode both comprise a charging state and an inversion state.
The technical scheme provided by the invention has the beneficial effects that: the invention can reduce the use amount of the electrolytic capacitor and about 2/3 electrolytic capacitors under the condition of meeting the compatibility of single-phase and three-phase input, thereby greatly improving the power density of the charger, prolonging the service life of the charger, reducing the volume of the charger, inhibiting output charging current ripples and keeping stable charging performance.
Drawings
The invention is described in detail below with reference to examples and figures, in which:
FIG. 1 is a schematic diagram of a conventional single-phase and three-phase compatible charger;
FIG. 2 is a schematic diagram of a conventional ACDC conversion charging module;
FIG. 3 is a schematic diagram of input voltage current, input power and output power comparison in a prior art single phase mode of operation;
FIG. 4 is a schematic circuit diagram of the major loop circuit of the preferred embodiment of the present invention;
FIG. 5 shows a capacitor C according to a preferred embodiment of the present inventionEbusA series control switch schematic;
FIG. 6 is a schematic diagram of the control circuit in the three-phase mode of operation of the present invention;
FIG. 7 is a schematic diagram of a control circuit for one embodiment of the single phase mode of operation of the present invention;
FIG. 8 is a schematic diagram of a control circuit for another embodiment of the present invention in a single phase mode of operation;
fig. 9 is a schematic diagram of input voltage current, input power and output power comparison in a three-phase mode of operation of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention discloses a single three-phase compatible charger control circuit for reducing electrolytic capacitance, which refers to a main loop circuit schematic diagram shown in figure 4 and comprises a branch circuitThe first, second and third alternating current-direct current conversion modules are respectively connected with three phase lines of a power grid, and the output ends of the first, second and third alternating current-direct current conversion modules are connected in parallel and then connected with a battery; the bus capacitor of the first AC/DC conversion module adopts a large-capacitance-value bus capacitor, and the bus capacitors of the second and third AC/DC conversion modules adopt a small-capacitance-value bus capacitor CFbus(ii) a In a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc conversion modules are all put into operation.
The first, second and third alternating current-direct current conversion modules comprise a PFC module and a DCDC module, and the PFC module and the DCDC module are connected through a positive bus and a negative bus; a small-capacitance bus capacitor C connected in parallel is arranged between the positive bus and the negative bus of the first AC-DC conversion moduleFbusAnd a large capacitance value capacitor CEbusA small-capacitance bus capacitor C is respectively arranged between the positive and negative buses of the second and third AC-DC conversion modulesFbus。
The large-capacitance capacitor CEbusBy means of electrolytic capacitors, the said small-value bus capacitor CFbusA thin film capacitor or a ceramic capacitor is used.
As can be seen from the above description and fig. 4, the first ac/dc conversion module, and the second ac/dc conversion module have substantially the same circuit structure, the first ac/dc conversion module includes an electrolytic capacitor, and the other two modules do not include an electrolytic capacitor. In the three-phase working mode, the three modules control the output power to be consistent with the input power, and finally the output is stable direct-current power. During single-phase work, the first alternating current-direct current conversion module works according to a traditional working mode, inputs alternating current power and outputs direct current power. The remaining electrolytic capacitors smooth out the power difference so that the output ripple current is reduced. Therefore, under the condition of meeting the single-three phase input compatibility, the electrolytic capacitor of about 2/3 can be reduced, thereby greatly improving the power density of the charger, prolonging the service life of the charger, reducing the volume of the charger, inhibiting the output charging current ripple and keeping the stable charging performance.
With reference to the preferred embodiment shown in FIG. 5Example, the capacitor C with large capacitance valueEbusA control switch S is connected in series and is controlled by a controller; in the single-phase operating mode, the control switch S is closed; in the three-phase operating mode, the control switch S is open. In a single-phase working mode, enabling a capacitor CEbus and the bus capacitor CFbus to be connected in parallel for operation; in the three-phase working mode, the capacitor CEbus is disconnected from parallel connection and is not put into operation. After the control switch S is added, in a three-phase working mode, the three-phase circuit has symmetrical capacitance and operates more stably. Fig. 7 shows a comparative illustration of input voltage current, input power and output power in a three-phase mode of operation of the invention.
Referring to fig. 6, a schematic diagram of a control circuit of a preferred embodiment is shown, in a three-phase operating mode, the first, second, and third ac/dc conversion modules are respectively connected to respective controllers, and each controller includes a PFC module current sampler, a PFC module voltage sampler, a DCDC module output terminal current sampler, and a DCDC module output terminal voltage sampler; the output end current sampler and the output end voltage sampler of the DCDC module are connected with two input ends of a first multiplier, the output end of the first multiplier is connected with the decrement input end of a first subtracter, the decrement input end of the first subtracter is connected with a charging power set value, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a second multiplier, the other input end of the second multiplier is connected with the PFC module voltage sampler, the output end of the second multiplier is connected with the subtracted input end of the second subtracter, the subtracting input end of the second subtracter is connected with the current sampler of the PFC module, the output end of the second subtracter is connected with the input end of the second PID regulator, the output end of the second PID regulator is connected with the first PWM controller, and the first PWM controller controls the PFC module. The controller comprises positive and negative bus voltage samplers, the output ends of the positive and negative bus voltage samplers are connected with the subtraction end of a third subtracter, the subtracted end of the third subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, the output end of the third PID regulator is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
Referring to fig. 7, in a single-phase operation mode in an embodiment, the first, second, and third ac/dc conversion modules are respectively connected to respective controllers, and the controllers include a PFC module current sampler, a PFC module voltage sampler, a positive-negative bus voltage sampler, a DCDC module output terminal current sampler, and a DCDC module output terminal voltage sampler;
the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtracted end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtracted input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, and the first PWM controller controls the PFC module;
the output end of the DCDC module is connected with the subtracting end of a third subtracter, the subtracted end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, and the output end of the third PID regulator is connected with one input end of a small fetching device; the output end of the DCDC module is connected with a subtracting end of a fourth subtracter, a subtracted end of the fourth subtracter is connected with an output current set value Iout _ ref, an output end of the fourth subtracter is connected with an input end of a fourth PID regulator, and an output end of the fourth PID regulator is connected with the other input end of the small fetching device; and the output end of the small fetching device is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
Referring to fig. 8, in a single-phase operation mode in another embodiment, the first, second, and third ac/dc conversion modules are respectively connected to respective controllers, and the controllers include a PFC module current sampler, a PFC module voltage sampler, a positive-negative bus voltage sampler, a DCDC module output terminal current sampler, and a DCDC module output terminal voltage sampler;
the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtracted end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtracted input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, and the first PWM controller controls the PFC module;
the output end voltage sampler of the DCDC module is connected with the subtracting end of a third subtracter, the subtracted end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, one input end of a small device is taken from the output end of the third PID regulator, the other input end of the small device is connected with an output current set value Iout _ ref, the output end of the small device is connected with the subtracted end of a fourth subtracter, the current sampler of the DCDC module output end of the fourth subtracter, the output end of the fourth subtracter is connected with the input end of a fourth PID regulator, the output end of the fourth PID regulator is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
The invention also discloses a control method of the single-phase and three-phase compatible charger control circuit for reducing the electrolytic capacitance, which comprises a single-phase working mode and a three-phase working mode; in a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc converter modules are put into operation.
In the single-phase working mode, the large-capacitance capacitor C in the first AC/DC conversion moduleEbusAnd the small-capacitance value capacitor CFbusEntering parallel operation; in the three-phase working mode, make the capacitance C with large capacitance valueEbusThe parallel connection is separated and the operation is not carried out.
The single-phase working mode is mainly composed of a large-capacitance capacitor CEbusAnd energy storage filtering is carried out on the ripple current. In a three-phase working mode, sampling input current Iin _ ac of a PFC module and input voltage Vin _ ac of the PFC module, and sampling output current Iout of a DCDC module and output voltage Vout of the DCDC module; multiplying the output current Iout of the DCDC module and the output voltage Vout of the DCDC module to obtain output power, subtracting the output power from a charging power set value Poutreq to obtain a power deviation value, the power deviation value is processed by a first PID regulator to obtain a power loop output value (the power loop output value is proportional to input average current, the loop bandwidth is far smaller than input alternating current frequency, therefore, the power loop output is a quasi-constant value proportional to input required current), the power loop output value is multiplied by input voltage Vin _ ac of a PFC module to obtain a current reference value, the input current Iin _ ac is subtracted from the current reference value to obtain a duty ratio regulation value, the duty ratio regulating value is regulated by a second PID regulator and then is sent to a first PWM controller, the first PWM controller controls a PFC module, so that the input current coincides with the desired current, this current loop is relatively fast to obtain a high THD.
Referring to fig. 6, a schematic diagram of a control circuit of a preferred embodiment is shown, in a three-phase operating mode, a bus voltage Vpfc of a positive bus and a negative bus is sampled, the bus voltage Vpfc is subtracted from a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, the voltage deviation value is adjusted by a third PID regulator and then sent to a second PWM controller, and the second PWM controller controls a DCDC module to control power conversion of the DCDC module so that a PFC voltage is not changed, so that energy input into a Cbus is timely transmitted to a later stage to charge a battery.
The single-phase operation often uses a control loop (voltage outer loop current inner loop and voltage and current loop in parallel) to ensure constant output voltage and current. Referring to fig. 7, in the single-phase operation mode in an embodiment, the bus voltage Vpfc of the positive and negative buses is sampled, the bus voltage Vpfc is subtracted from the bus voltage set value Vpfc _ ref to obtain a voltage deviation value, the voltage deviation value is adjusted by the first PID adjuster and then multiplied by the input voltage Vin _ ac of the PFC module, the obtained product is subtracted from the input current Iin _ ac of the PFC module, the obtained difference value is adjusted by the second PID adjuster and then sent to the first PWM controller, and the first PWM controller controls the PFC module; subtracting the output current Iout of the DCDC module from the set value Iout _ ref of the output current, adjusting the obtained difference value by a fourth PID adjuster, and sending the adjusted difference value to a small fetching device; and the small selector sends the smaller value of the two values to the second PWM controller, and the second PWM controller controls the DCDC module.
Referring to fig. 8, in another embodiment, in the single-phase operation mode, the bus voltage Vpfc of the positive and negative buses is sampled, the bus voltage Vpfc is subtracted from the bus voltage set value Vpfc _ ref to obtain a voltage deviation value, the voltage deviation value is adjusted by the first PID adjuster and then multiplied by the input voltage Vin _ ac of the PFC module, the obtained product is subtracted by the input current Iin _ ac of the PFC module, the obtained difference value is adjusted by the second PID adjuster and then sent to the first PWM controller, and the first PWM controller controls the PFC module; and the small value is compared with an output current set value Iout _ ref by the small device, the output current Iout of the DCDC module is subtracted from the smaller value of the two values, the obtained difference value is regulated by a fourth PID regulator and then is sent to a second PWM controller, and the second PWM controller controls the DCDC module.
In a preferred embodiment, the single-phase operation mode and the three-phase operation mode both include a charging state and an inverting state.
The foregoing examples are illustrative only and are not intended to be limiting. Any equivalent modifications or variations without departing from the spirit and scope of the present application should be included in the claims of the present application.
Claims (13)
1. The utility model provides a reduce electrolytic capacitor's single three-phase compatible machine control circuit that charges which characterized in that: the power grid comprises a first alternating current-direct current conversion module, a second alternating current-direct current conversion module and a third alternating current-direct current conversion module, wherein the first alternating current-direct current conversion module, the second alternating current-direct current conversion module and the third alternating current-direct current conversion module are respectively connected with three phase lines of a power grid; the bus capacitor of the first AC/DC conversion module adopts a large-capacitance-value bus capacitor, and the bus capacitors of the second and third AC/DC conversion modules adopt a small-capacitance-value bus capacitor CFbus；
In a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc conversion modules are all put into operation.
2. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 1 further comprising: the first, second and third alternating current-direct current conversion modules comprise a PFC module and a DCDC module, and the PFC module and the DCDC module are connected through a positive bus and a negative bus; a small-capacitance bus capacitor C connected in parallel is arranged between the positive bus and the negative bus of the first AC-DC conversion moduleFbusAnd a large capacitance value capacitor CEbusA small-capacitance bus capacitor C is respectively arranged between the positive and negative buses of the second and third AC-DC conversion modulesFbus。
3. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 2 further comprising: the large-capacitance capacitor CEbusBy means of electrolytic capacitors, the said small-value bus capacitor CFbusA thin film capacitor or a ceramic capacitor is used.
4. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 3 further comprising: the large-capacitance capacitor CEbusA control switch S is connected in series and is controlled by a controller; in the single-phase operating mode, the control switch S is closed; in the three-phase operating mode, the control switch S is open.
5. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 3 further comprising: when the three-phase working mode is adopted, the first, second and third alternating current-direct current conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a DCDC module output end current sampler and a DCDC module output end voltage sampler;
the output end current sampler and the output end voltage sampler of the DCDC module are connected with two input ends of a first multiplier, the output end of the first multiplier is connected with the decrement input end of a first subtracter, the decrement input end of the first subtracter is connected with a charging power set value, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a second multiplier, the other input end of the second multiplier is connected with the PFC module voltage sampler, the output end of the second multiplier is connected with the subtracted input end of the second subtracter, the subtracting input end of the second subtracter is connected with the current sampler of the PFC module, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, and the first PWM controller controls the PFC module;
the controller comprises positive and negative bus voltage samplers, the output ends of the positive and negative bus voltage samplers are connected with the subtraction end of a third subtracter, the subtracted end of the third subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, the output end of the third PID regulator is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
6. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 3 further comprising: when the single-phase working mode is adopted, the first, second and third alternating current-direct current conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a positive and negative bus voltage sampler, a DCDC module output end current sampler and a DCDC module output end voltage sampler;
the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtracted end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtracted input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, and the first PWM controller controls the PFC module;
the output end of the DCDC module is connected with the subtracting end of a third subtracter, the subtracted end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, and the output end of the third PID regulator is connected with one input end of a small fetching device; the output end of the DCDC module is connected with a subtracting end of a fourth subtracter, a subtracted end of the fourth subtracter is connected with an output current set value Iout _ ref, an output end of the fourth subtracter is connected with an input end of a fourth PID regulator, and an output end of the fourth PID regulator is connected with the other input end of the small fetching device; and the output end of the small fetching device is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
7. The reduced electrolytic capacitor single three phase compatible charger control circuit of claim 3 further comprising: when the single-phase working mode is adopted, the first, second and third alternating current-direct current conversion modules are respectively connected with respective controllers, and each controller comprises a PFC module current sampler, a PFC module voltage sampler, a positive and negative bus voltage sampler, a DCDC module output end current sampler and a DCDC module output end voltage sampler;
the output end of the positive and negative bus voltage sampler is connected with the subtraction input end of a first subtracter, the subtracted end of the first subtracter is connected with a bus voltage set value Vpfc _ ref, the output end of the first subtracter is connected with a first PID regulator, the output end of the first PID regulator is connected with one input end of a first multiplier, the other input end of the first multiplier is connected with a PFC module voltage sampler, the output end of the first multiplier is connected with the subtracted input end of a second subtracter, the subtraction input end of the second subtracter is connected with a PFC module current sampler, the output end of the second subtracter is connected with the input end of a second PID regulator, the output end of the second PID regulator is connected with a first PWM controller, and the first PWM controller controls the PFC module;
the output end voltage sampler of the DCDC module is connected with the subtracting end of a third subtracter, the subtracted end of the third subtracter is connected with an output voltage set value Vout _ ref, the output end of the third subtracter is connected with the input end of a third PID regulator, one input end of a small device is taken from the output end of the third PID regulator, the other input end of the small device is connected with an output current set value Iout _ ref, the output end of the small device is connected with the subtracted end of a fourth subtracter, the current sampler of the DCDC module output end of the fourth subtracter, the output end of the fourth subtracter is connected with the input end of a fourth PID regulator, the output end of the fourth PID regulator is connected with a second PWM controller, and the second PWM controller controls the DCDC module.
8. A control method of a single three-phase compatible charger control circuit for reducing electrolytic capacitance according to any one of claims 1 to 7, characterized in that: the method comprises a single-phase working mode and a three-phase working mode;
in a single-phase working mode, only the first alternating current-direct current conversion module is put into operation; in the three-phase operating mode, the first, second and third ac/dc converter modules are put into operation.
9. The method of claim 8, wherein the method further comprises the steps of: in the single-phase working mode, the large-capacitance capacitor C in the first AC/DC conversion moduleEbusAnd the small-capacitance value capacitor CFbusEntering parallel operation; in three-phase operation mode, let be largeCapacitance value capacitor CEbusThe parallel connection is separated and the operation is not carried out.
10. The method of claim 9 for controlling a single three-phase compatible charger control circuit with reduced electrolytic capacitance, wherein: in the three-phase mode of operation,
sampling a PFC module input current Iin _ ac and a PFC module input voltage Vin _ ac, and sampling a DCDC module output current Iout and a DCDC module output voltage Vout;
multiplying output current Iout of a DCDC module and output voltage Vout of the DCDC module to obtain output power, subtracting the output power from a charging power set value Poutreq to obtain a power deviation value, obtaining a power loop output value through a first PID regulator, multiplying the power loop output value and input voltage Vin _ ac of a PFC module to obtain a current reference value, subtracting input current Iin _ ac from the current reference value to obtain a duty ratio regulation value, regulating the duty ratio regulation value through a second PID regulator, sending the duty ratio regulation value to a first PWM controller, and controlling the PFC module through the first PWM controller;
and (3) sampling the bus voltage Vpfc of the positive and negative buses, subtracting the bus voltage Vpfc by using a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, adjusting the voltage deviation value by a third PID (proportion integration differentiation) adjuster, and then sending the voltage deviation value to a second PWM (pulse width modulation) controller, and controlling the DCDC module by the second PWM controller.
11. The method of claim 9 for controlling a single three-phase compatible charger control circuit with reduced electrolytic capacitance, wherein: in the case of the single-phase operation mode,
sampling bus voltage Vpfc of a positive bus and a negative bus, subtracting the bus voltage Vpfc by a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, multiplying the voltage deviation value by input voltage Vin _ ac of a PFC module after being regulated by a first PID regulator, subtracting input current Iin _ ac of the PFC module from the obtained product, regulating the obtained difference value by a second PID regulator, and then sending the difference value to a first PWM controller, and controlling the PFC module by the first PWM controller;
sampling the output current Iout of the DCDC module and the output voltage Vout of the DCDC module, subtracting the output voltage Vout of the DCDC module from an output voltage set value Vout _ ref, adjusting the obtained difference value by a third PID adjuster, and then sending the adjusted difference value to a small fetching device; subtracting the output current Iout of the DCDC module from the set value Iout _ ref of the output current, adjusting the obtained difference value by a fourth PID adjuster, and sending the adjusted difference value to a small fetching device; and the small selector sends the smaller value of the two values to the second PWM controller, and the second PWM controller controls the DCDC module.
12. The method of claim 9 for controlling a single three-phase compatible charger control circuit with reduced electrolytic capacitance, wherein: in the case of the single-phase operation mode,
sampling bus voltage Vpfc of a positive bus and a negative bus, subtracting the bus voltage Vpfc by a bus voltage set value Vpfc _ ref to obtain a voltage deviation value, multiplying the voltage deviation value by input voltage Vin _ ac of a PFC module after being regulated by a first PID regulator, subtracting input current Iin _ ac of the PFC module from the obtained product, regulating the obtained difference value by a second PID regulator, and then sending the difference value to a first PWM controller, and controlling the PFC module by the first PWM controller;
sampling the output current Iout of the DCDC module and the output voltage Vout of the DCDC module, subtracting the output voltage Vout of the DCDC module from an output voltage set value Vout _ ref, adjusting the obtained difference value by a third PID adjuster, and then sending the adjusted difference value to a small fetching device; and the small value is compared with an output current set value Iout _ ref by the small device, the output current Iout of the DCDC module is subtracted from the smaller value of the two values, the obtained difference value is regulated by a fourth PID regulator and then is sent to a second PWM controller, and the second PWM controller controls the DCDC module.
13. The method of claim 8, wherein the method further comprises the steps of: the single-phase working mode and the three-phase working mode both comprise a charging state and an inversion state.
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