CN110753424A - Pin definition and drive circuit of LED drive chip - Google Patents

Pin definition and drive circuit of LED drive chip Download PDF

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Publication number
CN110753424A
CN110753424A CN201911049032.XA CN201911049032A CN110753424A CN 110753424 A CN110753424 A CN 110753424A CN 201911049032 A CN201911049032 A CN 201911049032A CN 110753424 A CN110753424 A CN 110753424A
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China
Prior art keywords
pin
output
driving circuit
sdi
sdo
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CN201911049032.XA
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CN110753424B (en
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陈大明
刘雪亮
李刚
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Shanghai Ling Xin Vision Technology Ltd By Share Ltd
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Shanghai Ling Xin Vision Technology Ltd By Share Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention relates to an LED driving chip, wherein SDI pins, SDO pins, LE pins and CLK pins are defined as follows: SDI pin: bidirectional data uplink access end, SDO pin: bidirectional data downlink access, LE pin: serial data latch, combination control enable, CLK pin: a data clock. Compared with the prior art, the invention does not change the related original energy definition of the chip, only performs the function upgrade on a plurality of pins again, and adds the internal functional circuit module to achieve the function required to be upgraded.

Description

Pin definition and drive circuit of LED drive chip
Technical Field
The present invention relates to a technology of an LED driving chip, and in particular, to a pin definition and driving circuit of an LED driving chip.
Background
For a system manufacturer, there are a plurality of different and different common driving firmware in the LED control driver, and different firmware drivers need to be selected for different chips. At the beginning of configuring the large LED screen, the module information is in a missing state, the previous system adopts trial and error configuration to solve the problem, and the method has the biggest problem of time consumption and low efficiency. The intelligent LED control system and the chip are used for information interaction management, and the intelligence is realized by using an information exchange technology, so that the thought method is more in line with the control intelligence direction, the customer experience is better, and standardized management can be formed.
The pin of the general driving chip in the market is electrically defined, SCLK is data transmission clock input, LAT is data latch, OE is channel opening enable or gray scale clock input pin, SDIN is data input, SDOUT is output, and the rest are LED constant current driving output pins (fig. 1).
In the traditional interface for controlling the LED display driving chip, the interface is mostly unidirectional, the specification of the chip cannot be obtained, and in order to control the system configuration process, a receiving card is correctly configured to drive the corresponding driving chip, the actual object of the chip is often carefully compared; in some cases, such as when the module is sealed or fully protected, the telephone also queries the manufacturer to obtain detailed information.
Disclosure of Invention
The present invention is directed to a pin definition and driving circuit of an LED driving chip, which overcomes the above-mentioned drawbacks of the prior art.
The purpose of the invention can be realized by the following technical scheme:
the pin definition of the LED driving chip comprises the following steps of SDI pin, SDO pin, LE pin and CLK pin:
SDI pin: a bidirectional data uplink access terminal is connected with the data transmission unit,
and (3) SDO pin: a bidirectional data downstream access end,
LE pin: serial data latching, combination control enabling,
a CLK pin: a data clock.
A drive circuit for realizing the pin definition comprises an output current regulator, and a displacement buffer, an output latch and an output driver which are sequentially connected, wherein one end of the output current regulator is connected with an R-EXT pin, the other end of the output current regulator is connected with each output pin, the input end of the output driver is also connected with an OE pin, the input end of the output latch is also connected with an LE pin, the displacement buffer is also respectively connected with an SDI pin, a CLK pin and an SDO pin, the drive circuit further comprises a logic bus control module, and the logic bus control module is respectively connected with the SDI pin, the LE pin, the SDO pin, the displacement buffer and the CLK pin; and the logic bus control module completes bidirectional data communication control of the SDI pin and the SDO pin.
The number of the output pins is 16.
The displacement buffer is a 16-bit displacement buffer.
The output bolt locking device is a 16-bit output bolt locking device.
The output drivers are all 16-bit output drivers.
The drive circuit also comprises a pre-charging circuit, wherein the input end of the pre-charging circuit is connected with the logic bus control module, and the output end of the pre-charging circuit is connected with the output driver.
The driving circuit further comprises a state buffer, wherein the input end of the state buffer is connected with the displacement buffer, and the output end of the state buffer is connected with the pre-charging circuit.
And the R-EXT pin is connected with an external resistor.
Compared with the prior art, the invention has the following beneficial effects: the related original energy definition of the chip is not changed, only the functions of a plurality of pins are upgraded again, and the internal functional circuit module is added to achieve the function required to be upgraded.
Drawings
FIG. 1 is a schematic diagram of a chip pin according to the present invention;
FIG. 2 is a block diagram of a driving circuit.
Detailed Description
The invention is described in detail below with reference to the figures and specific embodiments. The present embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation process are given, but the scope of the present invention is not limited to the following embodiments.
The technical scheme is that in the prior art, the intelligent management of the LED display control receiving card and the LED drive is realized by the existing control system, the access operation of the LED drive chip is formed through a protocol mechanism in the earlier stage of the work of the system receiving card and the LED chip, and the relevant required information is configured or read back to complete the management of the receiving card on the LED drive chip.
As shown in fig. 1, which is a schematic diagram of a chip pin, the pin definition modification is shown in table 1:
TABLE 1
Pin name Original definition New definition
SDI Serial data input (one-way) Data uplink access terminal (bidirectional)
SDO Serial data output (one-way) Data down access (bidirectional)
LE Serial data latch Serial data latch, combinational control enable
CLK Serial clock Data clock
OE Output enable Output enable
The driving circuit for realizing the pin definition comprises an output current regulator, and a displacement buffer, an output latch and an output driver which are sequentially connected, wherein one end of the output current regulator is connected with an R-EXT pin, the other end of the output current regulator is connected with each output pin, the input end of the output driver is also connected with an OE pin, the input end of the output latch is also connected with an LE pin, the displacement buffer is also respectively connected with an SDI pin, a CLK pin and an SDO pin, and the driving circuit further comprises a logic bus control module which is respectively connected with the SDI pin, the LE pin, the SDO pin, the displacement buffer and the CLK pin; and the logic bus control module completes bidirectional data communication control of the SDI pin and the SDO pin.
The number of the output pins is 16, the displacement buffer is a 16-bit displacement buffer, the output latch is a 16-bit output latch, and the output drivers are 16-bit output drivers.
The drive circuit also comprises a pre-charge circuit, wherein the input end of the pre-charge circuit is connected with the logic bus control module, and the output end of the pre-charge circuit is connected with the output driver.
The driving circuit also comprises a state buffer, wherein the input end of the state buffer is connected with the displacement buffer, and the output end of the state buffer is connected with the pre-charging circuit.
And the R-EXT pin is connected with an external resistor.
The basic model is realized, the bidirectional data communication control of a driving chip, the generation of an automatic queue ID and a working state machine are completed through a logic bus control module in the basic model; the CLK and LE combined time sequence generates relative control, and sends the command into the logic bus controller to start the two-way communication control.
The automatic queue ID generates the access precedence relationship of the cascade chips, and each chip has a unique queue ID in a bus serial connection state; when the information is interacted with the control system, the method is used for judging the byte position of the signal filled by the information.
The working state machine, the conversion condition among the states of the chip and the related logic control. When the driving chip works, the function of the original chip is kept; but when entering the configuration state, the information interaction between the chip and the control card can be realized.
And the logic bus control module analyzes the bus command, locks the state and uploads and binds the information. The information parameter includes a chip code for representing relevant information of the chip.

Claims (9)

1. The pin definition of the LED driving chip is characterized in that an SDI pin, an SDO pin, an LE pin and a CLK pin are defined as follows:
SDI pin: a bidirectional data uplink access terminal is connected with the data transmission unit,
and (3) SDO pin: a bidirectional data downstream access end,
LE pin: serial data latching, combination control enabling,
a CLK pin: a data clock.
2. A driving circuit for realizing the pin definition according to claim 1, which comprises an output current regulator, and a displacement buffer, an output latch and an output driver which are connected in sequence, wherein one end of the output current regulator is connected with an R-EXT pin, the other end of the output current regulator is connected with each output pin, the input end of the output driver is also connected with an OE pin, the input end of the output latch is also connected with an LE pin, the displacement buffer is also connected with an SDI pin, a CLK pin and an SDO pin respectively, and the driving circuit is characterized by further comprising a logic bus control module, the logic bus control module is connected with the SDI pin, the LE pin, the SDO pin, the displacement buffer and the CLK pin respectively; and the logic bus control module completes bidirectional data communication control of the SDI pin and the SDO pin.
3. The driving circuit according to claim 2, wherein the number of the output pins is 16.
4. The driving circuit of claim 3, wherein the shift buffer is a 16-bit shift buffer.
5. The driver circuit of claim 3, wherein the output latch is a 16-bit output latch.
6. The driving circuit of claim 3, wherein the output drivers are each 16-bit output drivers.
7. The driving circuit of claim 2, further comprising a pre-charge circuit having an input coupled to the logic bus control module and an output coupled to the output driver.
8. The driving circuit of claim 7, further comprising a status buffer having an input terminal coupled to the shift buffer and an output terminal coupled to the pre-charge circuit.
9. The driving circuit according to claim 2, wherein the R-EXT pin is connected to an external resistor.
CN201911049032.XA 2019-10-31 2019-10-31 Driving circuit defined by pins based on LED driving chip Active CN110753424B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114049863A (en) * 2021-12-13 2022-02-15 深圳市中渤光电有限公司 LED driving chip information management method based on half-duplex transmission
CN116416929A (en) * 2023-06-09 2023-07-11 中科(深圳)无线半导体有限公司 LED display system data feedback control method

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040100459A1 (en) * 2002-11-22 2004-05-27 Macroblock, Inc. System of led drivers for driving display devices
WO2005083577A2 (en) * 2004-02-18 2005-09-09 Koninklijke Philips Electronics N. V. Integrated circuit with two different bus control units
CN1851682A (en) * 2006-03-28 2006-10-25 华为技术有限公司 Method for realizing serial peripheral unit interface
US20070226477A1 (en) * 2006-03-21 2007-09-27 Scott Haban Digital architecture using one-time programmable (OTP) memory
CN101615169A (en) * 2008-06-26 2009-12-30 上海工程技术大学 Based on the reversible identification of SPI structural model and information exchange platform and method
CN101667453A (en) * 2008-09-05 2010-03-10 爱特梅尔公司 Method and system to access memory
CN101854279A (en) * 2009-04-01 2010-10-06 中国科学院空间科学与应用研究中心 Data acquisition and communication system suitable for small satellite controller local area network
US20110285325A1 (en) * 2010-05-24 2011-11-24 Macroblock, Inc. Led driving device and driving system thereof
CN205722740U (en) * 2016-05-11 2016-11-23 深圳市明微电子股份有限公司 The drive circuit of the mono-double-colored screen of a kind of LED and driving chip
CN207676155U (en) * 2017-11-21 2018-07-31 安徽四创电子股份有限公司 A kind of digital control circuit based on FPGA control modules
CN109410830A (en) * 2018-12-21 2019-03-01 深圳市羽微电子有限公司 A kind of LED display driving circuit

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040100459A1 (en) * 2002-11-22 2004-05-27 Macroblock, Inc. System of led drivers for driving display devices
WO2005083577A2 (en) * 2004-02-18 2005-09-09 Koninklijke Philips Electronics N. V. Integrated circuit with two different bus control units
US20070226477A1 (en) * 2006-03-21 2007-09-27 Scott Haban Digital architecture using one-time programmable (OTP) memory
CN1851682A (en) * 2006-03-28 2006-10-25 华为技术有限公司 Method for realizing serial peripheral unit interface
CN101615169A (en) * 2008-06-26 2009-12-30 上海工程技术大学 Based on the reversible identification of SPI structural model and information exchange platform and method
CN101667453A (en) * 2008-09-05 2010-03-10 爱特梅尔公司 Method and system to access memory
CN101854279A (en) * 2009-04-01 2010-10-06 中国科学院空间科学与应用研究中心 Data acquisition and communication system suitable for small satellite controller local area network
US20110285325A1 (en) * 2010-05-24 2011-11-24 Macroblock, Inc. Led driving device and driving system thereof
CN205722740U (en) * 2016-05-11 2016-11-23 深圳市明微电子股份有限公司 The drive circuit of the mono-double-colored screen of a kind of LED and driving chip
CN207676155U (en) * 2017-11-21 2018-07-31 安徽四创电子股份有限公司 A kind of digital control circuit based on FPGA control modules
CN109410830A (en) * 2018-12-21 2019-03-01 深圳市羽微电子有限公司 A kind of LED display driving circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
SASAN ARDALAN: "Radiation Hardened by Design 8 bit RISC with Dual I2C Bus Support and SPI for External NVM Support", 《25TH ANNUAL AIAA/USU CONFERENCE ON SMALL SATELLITE》 *
王龙: "基于ATmega 128的闪存数据记录器的设计", 《楚雄师范学院学报》 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114049863A (en) * 2021-12-13 2022-02-15 深圳市中渤光电有限公司 LED driving chip information management method based on half-duplex transmission
CN116416929A (en) * 2023-06-09 2023-07-11 中科(深圳)无线半导体有限公司 LED display system data feedback control method
CN116416929B (en) * 2023-06-09 2023-09-26 中科(深圳)无线半导体有限公司 LED display system data feedback control method

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