CN110752893A - Approximate decoding method and device for belief propagation of polarization code - Google Patents
Approximate decoding method and device for belief propagation of polarization code Download PDFInfo
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- H—ELECTRICITY
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
Abstract
The embodiment of the invention discloses an approximate decoding method and device for belief propagation of polarization codes, relates to the technical field of computer decoding, and can reduce the complexity of a decoder and improve the hardware efficiency and the decoding throughput rate. The invention comprises the following steps: inputting the received data to be processed into a decoder; carrying out approximate processing on the data to be processed at a first type node in the decoder; carrying out approximate processing on the data to be processed at a second type node in the decoder; and obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node, and exporting the decoder. The invention is suitable for a polar code decoder.
Description
Technical Field
The present invention relates to the field of computer decoding technologies, and in particular, to an approximate decoding method and apparatus for belief propagation of a polarization code.
Background
The decoder is an extremely basic and important technical branch in the communication field, and the polar code has the capability of reaching the shannon limit with lower encoding and decoding complexity, so that the polar code attracts attention in recent years. As a parallel decoding algorithm, the belief propagation decoding algorithm is widely applied to Polar. However, the conventional belief propagation decoding algorithm needs to calculate a large amount of data during decoding, and the calculation complexity is high.
With the continuous increase of data volume, the complexity of the decoder is also rapidly increased, and on the premise of not additionally increasing too much hardware cost, the computational efficiency and the decoding throughput rate of the decoding of the traditional belief propagation decoding algorithm are difficult to further improve, so that the method becomes a new bottleneck of the technology in practical application.
Disclosure of Invention
The embodiment of the invention provides an approximate decoding method and device for belief propagation of a polarization code, which can reduce the complexity of a decoder and improve the hardware efficiency and the decoding throughput rate.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in a first aspect, an embodiment of the present invention provides an approximate decoding method for belief propagation of polarization codes, including:
inputting the received data to be processed into a decoder;
carrying out approximate processing on the data to be processed at a first type node in the decoder;
carrying out approximate processing on the data to be processed at a second type node in the decoder;
and obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node, and exporting the decoder.
In a second aspect, an embodiment of the present invention provides an apparatus for approximate decoding of belief propagation of polarization codes, the apparatus operating on a communication device, the communication device comprising: the device comprises a processor, a communication interface, a memory and a bus, wherein the processor, the communication interface and the memory are communicated with each other through the bus, and the device is installed in the processor;
the receiving module is used for inputting the received data to be processed into the decoder;
the first processing module is used for carrying out approximation processing on the data to be processed at a first type node in the decoder;
the second processing module is used for carrying out approximation processing on the data to be processed at a second class node in the decoder;
and the output module is used for obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node and exporting the decoder.
The embodiment provides a design technology of an approximate polarization code belief propagation decoder based on a data structure, and two nodes in the traditional belief propagation decoder are optimized by an approximate calculation method on the basis of a new data structure by performing structure optimization on the data structure of channel information in the traditional polarization code belief propagation decoder. On the premise of not seriously reducing the decoding accuracy of the decoder, the complexity of the decoder is reduced, so that the hardware efficiency and the decoding throughput rate are improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a diagram illustrating a data structure according to an embodiment of the present invention;
fig. 2, fig. 3, fig. 4, fig. 5 and fig. 6 are schematic diagrams of specific examples provided by the embodiment of the present invention;
fig. 7 and 8 are schematic diagrams of simulation results provided by the embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or coupled. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The embodiment of the invention provides an approximate decoding method and device for belief propagation of polarization codes, comprising the following steps:
s101, inputting the received data to be processed into a decoder.
In this embodiment, the storage manner of the bit channel information of the data to be processed input to the decoder includes: a 1-bit sign bit, a 3-bit position bit, and a 2-bit value bit.
The position bit represents the position of the first non-zero bit in the original channel information in the channel information, and the numerical bit is the highest 2 bits of the original numerical bit. The storage mode of the original channel information comprises the following steps: a 1-bit sign bit and a 6-bit value bit. The position bit represents the position of the non-zero first bit in the original channel information in the channel information, and the numerical bit is the highest 2 bits of the original numerical bit. For example: as shown in fig. 1, the data structure conversion mode is to change the storage mode of 7-bit channel information from the original 1-bit sign bit and 6-bit numerical value bit to 1-bit sign bit, 3-bit numerical value bit and 2-bit numerical value bit.
S102, carrying out approximate processing on the data to be processed at the first type node in the decoder.
Specifically, the first class node and the second class node include:
the node in the decoder for realizing the g operation function is the first type node, the node for realizing the f operation function is the second type node, and:
the polarization code belief propagation decoding algorithm factor graph is shown in fig. 2. g () denotes a g operation function, f () denotes a f operation function, x and y denote parameters involved in the function calculation, i is a row index in a factor graph, j is a column index in the factor graph, Ri.jRepresents the information that the node located at (i, j) in the factor graph passes from left to right in the iterative process, i.e. the right information. L isi.jRepresents the information that a node located at (i, j) in the factor graph passes from right to left in the iterative process, i.e. the left information.
The method for updating the left information and the right information of each node by the decoder comprises the following steps:
approximation of nodes of the first type in a polar code belief propagation decoder, as shown in fig. 3, the absolute value of the input data is assumed to include a, b, and the sign bit is assumed to include Sa，Sb. The first kind of nodes mainly realize the size comparison of the absolute values of the input data, and the smaller absolute value is selectedThe value, sign bit takes the function of xoring two input sign bits. In this embodiment, when comparing the absolute value of input data, only the 3-bit position bit L of the input data is comparedaAnd LbIgnoring the numerical bit M of the input dataaAnd Mb. If L isa≥LbThen, determine s[n-1，0]＝a[n-1，0]Otherwise, judging s[n-1，0]＝b[n-1，0]。
And S103, carrying out approximate processing on the data to be processed at the second class node in the decoder.
S102 and S103 may be executed simultaneously, that is, the data to be processed is respectively imported into the first-class node and the second-class node, and the approximation processing is performed simultaneously.
In this embodiment, the approximating the data to be processed at the first type node in the decoder includes:
obtaining a 3-bit position L of data to be processed input to the decoderaAnd LbAnd ignoring the numerical value bit, wherein the absolute value of the data to be processed input into the decoder comprises a and b, and the sign bit comprises Sa，SbThe numerical bits include: maAnd MbIf L isa≥LbThen, determine s[n-1，0]＝a[n-1，0]Otherwise, judging s[n-1，0]＝b[n-1，0]。
In this embodiment, the approximating the data to be processed at the second type node in the decoder includes:
when adding 1, only the last k bits of the data to be processed input into the decoder are effective, and k is a positive integer. Discarding the carry bit generated by adding one, and setting all the last k bits as 1 when generating the carry bit, wherein the absolute value of the data to be processed input into the decoder comprises Ma，MbThe sign bit comprises Sa，SbThe absolute value of the output data is MsSign bit is Ss. For example: approximation of the second class of nodes in a polar code belief propagation decoder: as shown in fig. 4Let the absolute value of the input data comprise Ma，MbThe sign bit comprises Sa，SbThe absolute value of the output data is MsSign bit is Ss. The second kind of nodes mainly realize the addition operation of the input data. SsAnd MsThe values of (d) are determined from the following table, respectively.
| Sa | Sb | Absolute value comparison of input data | Ss | |
| 0 | 0 | - | 0 | Ma+ |
| 1 | 1 | - | 1 | Ma+ |
| 0 | 1 | Ma≥Mb | 0 | Ma- |
| 0 | 1 | Ma＜Mb | 1 | -(Ma-Mb) |
| 1 | 0 | Ma≥Mb | 1 | Ma- |
| 1 | 0 | Ma＜Mb | 0 | -(Ma-Mb) |
Specifically, as shown in table 1, the addition unit in fig. 4 is used, and as shown in fig. 5, the input data is a. When adding 1, only the last k bits of the input data a are validated. In addition, the carry bit generated by adding one unit is discarded, and the effect on the high bit of a is not generated. If carry bit exists, all the last k bits are set to be 1.
And S104, obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node, and exporting the decoder.
The embodiment provides a design technology of an approximate polarization code belief propagation decoder based on a data structure, and two nodes in the traditional belief propagation decoder are optimized by an approximate calculation method on the basis of a new data structure by performing structure optimization on the data structure of channel information in the traditional polarization code belief propagation decoder. On the premise of not seriously reducing the decoding accuracy of the decoder, the complexity of the decoder, the delay of a key path and the hardware consumption are reduced, so that the hardware efficiency and the decoding throughput rate are improved.
The concrete effects are mainly reflected in that:
for a first type of node: in a first type of node in a traditional belief propagation decoder, absolute values of input data need to be compared from high to low bit by bit, and under the condition that the absolute values of the input data are similar, the decoder node needs to finish comparing all bits of the input data to obtain a result. However, in this case, no matter which input data we select as output, the correct decoding result can be obtained. The approximate first-class node based on the data structure provided by the invention has the input data length of 7 bits, only compares the position of 3 bits of the absolute value of the input data, and ignores the numerical value of the input data. The invention can reduce hardware consumption on the basis of not seriously reducing the performance of the belief propagation decoder.
For the second type of nodes: as shown in fig. 6, the second type of node in the conventional belief propagation decoder needs to perform operations of negating and adding one to input data and output data, so that the critical path delay of the node is very large, and the decoding throughput rate is limited. In addition, the effect of adding a unit is not obvious in the decoding process, and the operation of processing by a full adder is redundant. In the approximate second class node based on the data structure, the inversion and addition operation of the input data is not performed, but a full subtracter and a full adder are directly used for processing the 3-bit numerical value of the input data. Next, selection is made between the two processing results according to the sign bit condition, and the selection rule is shown in table 1. The decoding throughput rate is improved. For the add unit of output data, only the last k bits of input data a are validated. In addition, the carry bit generated by adding one unit is discarded, and the effect on the high bit of a is not generated. If carry bit exists, all the last k bits are set to be 1. So as to achieve the purpose of reducing hardware consumption.
The present embodiment is applied to a polar code decoder, and decoding is performed by taking a 64-bit polar code with a code rate of 0.5 as an example, and simulation results are respectively shown in fig. 7 and fig. 8. According to the simulation graph, the comparator in the first class of nodes ignores the low-order 1 bit, and when a unit is added in the second class of nodes and acts on the low-order 3 bits, the decoding performance of the decoder cannot be greatly reduced, and the hardware consumption and the critical path delay of the decoder are reduced. Therefore, the simulation result can show that: on the premise of not seriously reducing the decoding accuracy of the decoder, the complexity of the decoder and the delay of a key path are effectively reduced, so that the hardware efficiency and the decoding throughput rate are improved.
An embodiment of the present invention further provides an apparatus for approximate decoding of belief propagation of a polarization code, where the apparatus is operated on a communication device, and the communication device includes: the device comprises a processor, a communication interface, a memory and a bus, wherein the processor, the communication interface and the memory are communicated with each other through the bus, and the device is installed in the processor;
the receiving module is used for inputting the received data to be processed into the decoder;
the first processing module is used for carrying out approximation processing on the data to be processed at a first type node in the decoder;
the second processing module is used for carrying out approximation processing on the data to be processed at a second class node in the decoder;
and the output module is used for obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node and exporting the decoder.
Specifically, the storage manner of the bit channel information of the data to be processed input to the decoder includes: 1 bit sign bit, 3 bit position bits and 2 bit numerical value bits, wherein the position bits represent the position of the first non-zero bit in the original channel information in the channel information, and the numerical value bits are the highest 2 bits of the original numerical value bits;
the storage mode of the original channel information comprises the following steps: a 1-bit sign bit and a 6-bit value bit.
The first class node and the second class node include:
the node in the decoder for realizing the g operation function is the first type node, the node for realizing the f operation function is the second type node, and:
wherein g () represents a g operation function, f () represents a f operation function, x and y represent parameters involved in the function calculation, i is a row index in a factor graph, j is a column index in the factor graph, Ri.jRepresents the information which is passed from left to right by the node at (i, j) in the factor graph in the iterative process, namely the right information; l isi.jRepresents the information which is transmitted from right to left by the node at (i, j) in the factor graph in the iteration process, namely left information;
the method for updating the left information and the right information of each node by the decoder comprises the following steps:
In this embodiment, the first processing module is specifically configured to obtain a 3-bit position bit L of the to-be-processed data input to the decoderaAnd LbAnd ignoring the numerical value bit, wherein the absolute value of the data to be processed input into the decoder comprises a and b, and the sign bit comprises Sa，SbThe numerical bits include: maAnd Mb；
If L isa≥LbThen, determine s[n-1，0]＝a[n-1，0]Otherwise, judging s[n-1，0]＝b[n-1，0]。
The second processing module is specifically configured to, when 1 is added, only take effect on the last k bits of the to-be-processed data input to the decoder, where k is a positive integer;
discarding the carry bit generated by adding one, and generating the next k bits when generating the carry bitAll are set to 1, wherein the absolute value of the data to be processed input into the decoder comprises Ma，MbThe sign bit comprises Sa，SbThe absolute value of the output data is MsSign bit is Ss。
The embodiment provides a design technology of an approximate polarization code belief propagation decoder based on a data structure, and two nodes in the traditional belief propagation decoder are optimized by an approximate calculation method on the basis of a new data structure by performing structure optimization on the data structure of channel information in the traditional polarization code belief propagation decoder. On the premise of not seriously reducing the decoding accuracy of the decoder, the complexity of the decoder, the delay of a key path and the hardware consumption are reduced, so that the hardware efficiency and the decoding throughput rate are improved.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the apparatus embodiment, since it is substantially similar to the method embodiment, it is relatively simple to describe, and reference may be made to some descriptions of the method embodiment for relevant points.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A method for approximate decoding of belief propagation for polar codes, comprising:
inputting the received data to be processed into a decoder;
carrying out approximate processing on the data to be processed at a first type node in the decoder;
carrying out approximate processing on the data to be processed at a second type node in the decoder;
and obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node, and exporting the decoder.
2. The method of claim 1, wherein the storing of the bit channel information of the data to be processed inputted to the decoder comprises: 1 bit sign bit, 3 bit position bits and 2 bit numerical value bits, wherein the position bits represent the position of the first non-zero bit in the original channel information in the channel information, and the numerical value bits are the highest 2 bits of the original numerical value bits;
the storage mode of the original channel information comprises the following steps: a 1-bit sign bit and a 6-bit value bit.
3. The method according to claim 1 or 2, wherein the first class of nodes and the second class of nodes comprise:
the node in the decoder for realizing the g operation function is the first type node, the node for realizing the f operation function is the second type node, and:
wherein g () represents a g operation function, f () represents a f operation function, x and y represent parameters involved in the function calculation, i is a row index in a factor graph, j is a column index in the factor graph, Ri，jRepresents the belief that a node located at (i, j) in the factor graph passes from left to right in the iterative processInformation, namely right information; l isi，jRepresents the information which is transmitted from right to left by the node at (i, j) in the factor graph in the iteration process, namely left information;
the method for updating the left information and the right information of each node by the decoder comprises the following steps:
4. The method of claim 2, wherein said approximating said data to be processed at a first type node in said decoder comprises:
obtaining a 3-bit position L of data to be processed input to the decoderaAnd LbAnd ignoring the numerical value bit, wherein the absolute value of the data to be processed input into the decoder comprises a and b, and the sign bit comprises Sa，SbThe numerical bits include: maAnd Mb；
If L isa≥LbThen, determine s[n-1，0]＝a[n-1，0]Otherwise, judging s[n-1，0]＝b[n-1，0]。
5. The method of claim 3, wherein said approximating said data to be processed at a second type node in said decoder comprises:
when adding 1, only the last k bits of the data to be processed input into the decoder are effective, wherein k is a positive integer;
discarding the carry bit generated by adding one, and setting all the last k bits as 1 when generating the carry bit, wherein the absolute value of the data to be processed input into the decoder comprises Ma，MbThe sign bit comprises Sa，SbThe absolute value of the output data is MsSign bit is Ss。
6. An apparatus for approximate decoding of belief propagation of polarization codes, the apparatus operating on a communication device comprising: the device comprises a processor, a communication interface, a memory and a bus, wherein the processor, the communication interface and the memory are communicated with each other through the bus, and the device is installed in the processor;
the receiving module is used for inputting the received data to be processed into the decoder;
the first processing module is used for carrying out approximation processing on the data to be processed at a first type node in the decoder;
the second processing module is used for carrying out approximation processing on the data to be processed at a second class node in the decoder;
and the output module is used for obtaining output data according to the data to be processed after the approximate processing on the first class node and the second class node and exporting the decoder.
7. The apparatus of claim 6, wherein the storage of the bit channel information of the data to be processed inputted to the decoder comprises: 1 bit sign bit, 3 bit position bits and 2 bit numerical value bits, wherein the position bits represent the position of the first non-zero bit in the original channel information in the channel information, and the numerical value bits are the highest 2 bits of the original numerical value bits;
the storage mode of the original channel information comprises the following steps: a 1-bit sign bit and a 6-bit value bit.
8. The apparatus according to claim 6 or 7, wherein the first class of nodes and the second class of nodes comprise:
the node in the decoder for realizing the g operation function is the first type node, the node for realizing the f operation function is the second type node, and:
wherein g () represents a g operation function, f () represents a f operation function, x and y represent parameters involved in the function calculation, i is a row index in a factor graph, j is a column index in the factor graph, Ri，jRepresents the information which is passed from left to right by the node at (i, j) in the factor graph in the iterative process, namely the right information; l isi，jRepresents the information which is transmitted from right to left by the node at (i, j) in the factor graph in the iteration process, namely left information;
the method for updating the left information and the right information of each node by the decoder comprises the following steps:
9. the apparatus according to claim 8, wherein the first processing module is specifically configured to obtain a 3-bit position bit L of the data to be processed input to the decoderaAnd LbAnd ignoring the numerical value bit, wherein the absolute value of the data to be processed input into the decoder comprises a and b, and the sign bit comprises Sa，SbThe numerical bits include: maAnd Mb；
If L isa≥LbThen, determine s[n-1，0]＝a[n-1，0]Otherwise, judging s[n-1，0]＝b[n-1，0]。
10. The apparatus according to claim 8, wherein the second processing module is configured to, when adding 1, only take effect on the last k bits of the data to be processed input to the decoder, where k is a positive integer;
discarding the carry bit generated by adding one, and setting all the last k bits as 1 when generating the carry bit, wherein the absolute value of the data to be processed input into the decoder comprises Ma，MbThe sign bit comprises Sa，SbThe absolute value of the output data is MsSign bit is Ss。
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