CN110729998A - Broadband injection locking frequency divider based on distributed injection and transformer - Google Patents

Broadband injection locking frequency divider based on distributed injection and transformer Download PDF

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CN110729998A
CN110729998A CN201910970460.XA CN201910970460A CN110729998A CN 110729998 A CN110729998 A CN 110729998A CN 201910970460 A CN201910970460 A CN 201910970460A CN 110729998 A CN110729998 A CN 110729998A
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injection
transformer
pmos
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CN110729998B (en
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马建国
邢子哲
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Tianjin University
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

The invention discloses a broadband injection locking frequency divider based on distributed injection and a transformer, which comprises the following components: the first transformer comprises a first primary coil, a first secondary coil, a first tertiary coil and a first transformer capacitor, and the second transformer comprises a second primary coil, a second secondary coil, a second tertiary coil and a second transformer capacitor. The invention can realize a wider locking range, achieves better overall performance in the aspects of phase noise, power consumption, output power and the like, and has better application prospect.

Description

Broadband injection locking frequency divider based on distributed injection and transformer
Technical Field
The invention relates to the field of microwave engineering, in particular to a broadband injection locking frequency divider based on distributed injection and a transformer.
Background
The performance of a frequency divider, which is one of the key modules in a phase-locked loop system, will directly affect the quality of the signal source and the overall performance of the transceiver system. While realizing the frequency division function, performance indexes such as the locking range, power consumption, phase noise, output power, chip area and the like of the frequency divider must be comprehensively considered. Frequency dividers can be divided into static frequency dividers, regenerative frequency dividers, and injection locked frequency dividers. Among them, the injection locked frequency divider has been receiving continuous attention because of its high operating frequency and low power consumption. In a phase locked loop system, the locking range of the injection locked frequency divider needs to cover the output frequency range of the voltage controlled oscillator. To avoid the influence caused by process variation and ensure good performance of the phase-locked loop system, achieving a wide locking range becomes a major challenge in designing an injection locked frequency divider.
Currently, a variety of techniques are used to extend the lock range in the design of injection locked frequency dividers. In 2013, Yue Chao and Howard C.Luong propose a frequency tracking method, which can increase the injection efficiency of an injection pipe and improve the locking range [1 ]. In 2016, Sheng Lyang Jang et al used a third order resonator to reduce the quality factor of the divider resonator, thereby increasing the locking range [2 ]. In 2017, a distributed injection mode is proposed by Alireza Imani and Hossein Hashmemi, and the energy injected by a plurality of nodes is utilized, so that the frequency divider completes the frequency division function at more resonance points, and the bandwidth is improved [3 ]. However, the existing methods have limited effect on improving the locking range, and cannot achieve optimal compromise among various indexes, and cannot meet the strict requirements of the system on the injection locking frequency divider.
Therefore, how to better expand the lock range has become a key issue in the design of the injection locked frequency divider.
[ REFERENCE ] to
[1]Y.Chao and H.C.Luong,“Analysis and Design of a 2.9-mW 53.4–79.4-GHz Frequency-Tracking Injection-Locked Frequency Divider in 65-nm CMOS,”IEEEJ.Solid-State Circuits,vol.48,no.10,pp.2403–2418,Oct.2013.
[2]S.L.Jang et al.“Triple-Resonance RLC-Tank Divide-By-2Injection-Locked Frequency Divider”,Electronics Letters,vol.52,no.8,pp.624-626,April2016.
[3]Alireza Imani and Hossein Hashemi,“Distributed Injection-LockedFrequency Dividers”,IEEE J.Solid-State Circuits.vol.52.no.8.pp.2083-2093.August 2017.
Disclosure of Invention
Based on the requirements, the invention provides the broadband injection locking frequency divider based on the distributed injection and the transformer, which can realize a wider locking range, achieves better overall performance in the aspects of phase noise, power consumption, output power and the like, and has better application prospect.
The purpose of the invention is realized by the following technical scheme.
The invention relates to a broadband injection locking frequency divider based on distributed injection and a transformer, which comprises a first transformer and a second transformer, wherein one end of a first primary coil of the first transformer is grounded, and the other end of the first primary coil is connected with the input end of a first output buffer; one end of a first secondary coil of the first transformer is connected with a voltage source, the other end of the first secondary coil is connected with a first tertiary coil, and the first secondary coil and the second tertiary coil are respectively connected with drain electrodes of a second nMOS injection tube and a second pMOS injection tube; one end of a first-stage coil and a third-stage coil of the first transformer are connected with the first-stage coil, and the other end of the first-stage coil and the third-stage coil are respectively connected with a drain electrode of a first cross coupling tube, a grid electrode of a second cross coupling tube, a drain electrode of a first nMOS injection tube and a drain electrode of a first pMOS injection tube;
one end of a second primary coil of the second transformer is grounded, and the other end of the second primary coil is connected with the input end of the second output buffer; one end of a secondary coil of the second transformer is connected with a voltage source, and the other end of the secondary coil of the second transformer is connected with a third coil of the second transformer and is respectively connected with a source electrode of a second nMOS injection tube and a source electrode of a second pMOS injection tube; one end of a second and third-stage coil of the second transformer is connected with the second-stage coil, and the other end of the second and third-stage coil is respectively connected with a grid electrode of a first cross coupling tube, a drain electrode of a second cross coupling tube, a source electrode of a first nMOS injection tube and a source electrode of a first pMOS injection tube;
the source electrode of the first cross coupling tube and the source electrode of the second cross coupling tube are both connected with the drain electrode of the current source tube, the source electrode of the current source tube is grounded, and the grid electrode of the current source tube inputs control voltage; the grid electrode of the first nMOS injection tube is connected with the negative end of an input signal through a third transmission line; the grid electrode of the second nMOS injection tube is connected with the negative end of an input signal through a fourth transmission line and a third transmission line in sequence; the grid electrode of the first pMOS injection tube is connected with the positive end of an input signal through a first transmission line; and the grid electrode of the second pMOS injection tube is connected with the positive end of the input signal through a second transmission line and a first transmission line in sequence.
The first output buffer and the second output buffer are identical in circuit structure and respectively comprise a pMOS output tube, the source electrode of the pMOS output tube is grounded, the grid electrode of the pMOS output tube is used as the input end of the output buffer, and the drain electrode of the pMOS output tube is respectively connected with an inductor, a harmonic short-circuit capacitor and an output capacitor; one end of the inductor is connected with a drain electrode of the output tube of the pMOS, the other end of the inductor is respectively connected with a bypass capacitor and a voltage source, one end of the bypass capacitor is connected with the inductor, and the other end of the bypass capacitor is grounded; one end of the harmonic short-circuit capacitor is connected with the drain electrode of the pMOS output tube, and the other end of the harmonic short-circuit capacitor is grounded; one end of the output capacitor is connected with the drain electrode of the output tube of the pMOS, and the other end of the output capacitor is used as the output end of the output buffer.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
(1) the topology of the invention utilizes distributed injection to generate a locking range with a plurality of sections of mutual intersection at a plurality of resonance points, thereby forming the effect of a whole wide locking range. In addition, the adopted fourth-order resonant cavity further expands the locking range.
(2) The invention adopts the peaking inductance technology, increases the impedance peak value of the resonant cavity at the resonance point and reduces the power consumption of the circuit. And by optimizing the parameters of elements such as the transformer, the injection tube, the cross-coupling tube and the like, better overall performance can be achieved in the aspects of power consumption, output power and the like.
(3) The invention has simple topological structure and is convenient for integration.
Drawings
FIG. 1 is a schematic diagram of a wideband injection locked frequency divider based on distributed injection and transformers according to the present invention;
FIG. 2 is a schematic diagram of an output buffer;
FIG. 3 is a graph showing the simulation results of the output sensitivity curve.
Reference numerals: m1First cross-coupled tube, M2Second cross-coupled tube, M3nMOS injector tube I, M4pMOS injection tube, M5nMOS injection tube II, M6pMOS injection tube II, M7Current source tube, M8pMOS output tube, TL1Transmission line, TL2Transmission line number two, TL3Transmission line number three, TL4Number four transmission line, L1Primary winding, L2Secondary winding number one, L3Third stage coil, L4Primary winding number two, L5Secondary winding number two, L6Second third stage coil, Ct1First transformer capacitor, Ct2A second transformer capacitor, a Buffer1 first output Buffer, a Buffer2 second output Buffer, and LbInductor, C1Bypass capacitor, C2Harmonic short-circuit capacitance, CoutAnd an output capacitor.
Detailed Description
In order to more clearly illustrate the technical solution of the present invention, the present invention is further described below with reference to the accompanying drawings.
The invention provides a broadband injection locking frequency divider based on distributed injection and a transformer. The topology consists of cross-coupled pair tubes, a transformer and an output buffer. The topology adopts a distributed differential injection mode, enhances injection current and injection efficiency, adopts a high-order transformer as a resonant cavity, effectively increases the locking range of the frequency divider under the condition of not using a variable capacitance tube for tuning, reduces the number of control voltages and simplifies operation. Meanwhile, the design of the high-order transformer combines the peaking inductance technology, and the power consumption of the circuit is reduced. In addition, the structure of the traditional buffer is improved, the harmonic suppression capability is enhanced, and the wider locking range is kept.
The injection locked frequency divider of the LC structure can express the relation between its locking range and circuit parameters by equation (1).
Figure BDA0002231922650000041
Wherein Q is the quality factor of the resonant cavity, fcenterIs the self-resonant frequency of the frequency divider, eta is the injection efficiency of the injection tube, IinjTo inject a current, IoscIs the dc current of the frequency divider circuit. It can be seen that in order to extend the locking range of the frequency divider, it is necessary to increase the injection efficiency η and reduce the resonator quality factor Q. But do notIn order to guarantee the gain condition of the frequency divider and make it operate stably, the Q value needs to be large enough, otherwise the power consumption of the circuit will increase greatly. The topology provided by the invention can effectively improve the injection efficiency eta of the injection pipe, and the good integral performance of the frequency divider is achieved by selecting the proper quality factor Q of the resonant cavity.
As shown in FIG. 1, the broadband injection locking frequency divider based on the distributed injection and transformer of the invention comprises a first transformer and a second transformer, wherein the first transformer comprises a first primary coil L1First secondary coil L2The first stage coil L3First transformer capacitor Ct1,Ct1Two ends of a first transformer capacitor are respectively connected to a first primary coil L1Two ends; the second transformer comprises a second primary coil L4And secondary coil L5Third-stage coil L6No. two transformer capacitor Ct2Capacitor C of second transformert2Both ends are respectively connected to the second primary coil L4Two ends.
First primary coil L of first transformer1One end of the output Buffer is grounded, and the other end of the output Buffer is connected with the input end of the first output Buffer 1; a secondary coil L of a transformer2One terminal connected to a voltage source VDDConnected with the other end of the first-stage coil L3Connected with and respectively connected with a second nMOS injection tube M5And a second pMOS injection tube M6A drain electrode of (1); no. one third-stage coil L of No. one transformer3One end and a first secondary coil L2The other ends of the cross coupling tubes are respectively connected with a first cross coupling tube M1Drain electrode and second cross coupling tube M2Grid, nMOS injection tube M3Drain, pMOS injection tube M4And a drain electrode.
No. two primary coils L of No. two transformers4One end of the output Buffer is grounded, and the other end of the output Buffer is connected with the input end of the second output Buffer 2. Second secondary coil L of second transformer5One terminal connected to a voltage source VDDIs connected with the other end of the third-stage coil L6Connected with and respectively connected with a second nMOS injection tube M5And a second pMOS injection tube M6Of the substrate. No. two third-stage coil L of No. two transformers3One end and a second secondary coil L5The other ends of the cross coupling tubes are respectively connected with a first cross coupling tube M1Grid and second cross coupling tube M2Drain and nMOS injection tube M3Source electrode and one-number pMOS injection tube M4And a source electrode.
The first cross coupling tube M1Source electrode and second cross coupling tube M2The source electrodes are all connected with a current source tube M7Drain electrode, the current source tube M7Source electrode is grounded, and the current source tube M7Control voltage V outside grid input chipB. The nMOS injection tube M3The grid is connected with TL through a third transmission line3Connecting the negative terminal V of the input signalinj-. The second nMOS injection tube M5The grid electrode passes through a fourth transmission line TL in sequence4Three-number transmission line TL3Connecting the negative terminal V of the input signalinj-. The pMOS injection tube M4Grid through a transmission line TL1Connecting the positive terminal V of the input signalinj+. The second pMOS injection tube M6The grid electrode passes through a second transmission line TL in sequence2First transmission line TL1Connecting the positive terminal V of the input signalinj+。
As shown in fig. 2, the first output Buffer1 and the second output Buffer2 have the same circuit structure and each include a pMOS output tube M8The output pipe M of the pMOS8The source electrode is grounded, the grid electrode is used as the input end of the output buffer, and the drain electrodes are respectively connected with an inductor LbHarmonic short-circuit capacitor C2An output capacitor Cout. The inductance LbOne end is connected with a pMOS output tube M8The drain electrode and the other end are respectively connected with a bypass capacitor C1And a voltage source VDDSaid bypass capacitor C1One end is connected with an inductor LbAnd the other end is grounded. The harmonic short-circuit capacitor C2One end is connected with a pMOS output tube M8And the other end of the drain is grounded. The output capacitor CoutOne end is connected with a pMOS output tube M8And the other end of the drain electrode is used as the output end of the output buffer.
First cross coupling tube M1Source electrode and second cross coupling tube M2And when the resonant cavity is conducted, negative resistance is provided for the frequency divider circuit, and the loss of the resonant cavity is compensated. nMOS injection tube M3First pMOS injection tube M4nMOS injection tube M5Second pMOS injection tube M6The mixer mixes the injected double frequency signal with the fundamental frequency feedback signal to obtain the fundamental frequency output, thereby completing the frequency division function. nMOS injection tube M of the topology3First pMOS injection tube M4And a second nMOS injection tube M5Second pMOS injection tube M6And the two pairs of injection tubes are respectively connected with the source electrode and the drain electrode of the pMOS. The differential injection is realized, meanwhile, the transconductance is enhanced, the injection efficiency is improved, the size of the total parasitic capacitance is reduced, and the locking range of the frequency divider is improved. The transformer adopts the mode of combining coaxial coupling and vertical coupling, reduces the parasitic capacitance of the transformer and simultaneously leads L to be1L2L3、L4L5L6The coupling coefficients between them are almost equal. First transformer capacitor Ct1And the second transformer capacitor Ct2For adjusting the parameters of the transformer. And finally, the output signal is coupled to the input end of the buffer by the transformer and is output to the next-stage frequency divider.
The frequency divider provided by the invention adopts the fourth-order resonant cavity, reduces the phase shift of the resonant cavity, and is more beneficial to meeting the phase condition of injection locking. The slope of a phase response curve of a traditional second-order LC resonant cavity at a central frequency point is larger, so that the phase shift of the resonant cavity in a wider frequency band is overlarge, the phase shift compensation provided by an injection tube is difficult, and the locking range of a frequency divider is reduced. Although the impedance of the second-order LC resonant cavity is larger at the central frequency point and can fully meet the gain condition, the steeper phase response curve cannot meet the phase condition in a wider bandwidth, and the overall locking range is narrower. To improve this situation, this topology uses a fourth-order LC resonator to effectively extend the locking range. The impedance of the fourth-order LC resonant cavity presents two adjacent peak values, the phase response presents a corrugated gentle curve near 0 degrees, and the gain condition and the phase condition of injection locking of the frequency divider can be met in a wider bandwidth.
To further extend the lock range, this topology employs a distributed injection approach that increases the lock range by increasing iinj. The traditional injection locking frequency divider only has one resonance point, the size of injection current is irrelevant to frequency, and the locking range is limited. The distributed injection method can enhance the injection current and enable the frequency divider to meet the starting oscillation condition at a plurality of resonance points, so that the locking range and the injection power required by the frequency divider are improved. The magnitude of the injection current of the distributed injection is related to the frequency omega, and when the frequency is greater than the first resonance point, the injection current of the distributed injection is gradually increased and is greater than the current magnitude of the traditional structure. The injection stage number and the locking range present a direct proportion relation, but the topology selects two-stage distributed injection to achieve a wider locking range due to the consideration of chip area. By careful selection of the injection tube M3~M6Size and L of2、L3The inductance of (3) is such that the two levels of injection current are superimposed in the forward direction. Therefore, the injection current in the frequency band above the self-resonant frequency of the frequency divider is enhanced, the energy injected into the frequency divider is effectively enhanced, the highest frequency division frequency is improved, and the locking range is enlarged.
Besides distributed injection, the topology also adopts a differential injection mode, adopts a mode that an nMOS and a pMOS source and drain are mutually connected, enhances the transconductance of the injection tube, increases the injection current, reduces the size of the total parasitic capacitance and improves the locking range of the frequency divider. Meanwhile, the differential injection tube is convenient to be connected with the differential output of the VCO.
The output buffer of the invention adopts the harmonic suppression technology. The injection locked frequency divider is used as a first-stage frequency divider of a phase-locked loop, and the fundamental wave of an output signal is larger than the harmonic wave of the output signal. In the output buffer shown in fig. 2, the inductance LbAnd a bypass capacitor C1For biasing the pMOS output tube M8. To filter out harmonics, LbThe inductance value of (a) tends to be large, otherwise the harmonic magnitude will be larger than the fundamental wave, resulting in poor signal quality and a narrowed lock range. But LbOccupying an excessive chip area. Therefore, the invention is in a bias networkThen harmonic short-circuit capacitor C is introduced2The bias network is enabled to become alternating current ground for the second harmonic and the third harmonic, and therefore the effect of suppressing the harmonic is achieved. Through simulation comparison, the buffer structure can improve the power ratio of the fundamental wave to the second harmonic by 10.91 dB.
As shown in FIG. 3, simulation verifies that the invention can reach a locking range of 22.8-36.3GHz (45.7%) under the injection power of 0dBm, the power consumption is 3.54mW, and a wider locking range and better overall performance are reached.
While the present invention has been described in terms of its functions and operations with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise functions and operations described above, and that the above-described embodiments are illustrative rather than restrictive, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or spirit of the invention as defined by the appended claims.

Claims (2)

1. A broadband injection locking frequency divider based on distributed injection and a transformer comprises a first transformer and a second transformer, and is characterized in that a first primary coil (L) of the first transformer1) One end of the output Buffer is grounded, and the other end of the output Buffer is connected with the input end of a first output Buffer (Buffer 1); a primary secondary coil (L) of the primary transformer2) One terminal connected to a voltage source (V)DD) Connected with the other end of the first-stage coil (L)3) Connected to and respectively connected to a second nMOS injection tube (M)5) And pMOS injection tube II (M)6) A drain electrode of (1); no. one third-stage coil (L) of the first transformer3) One end and a first secondary coil (L)2) The other ends are respectively connected with a first cross coupling tube (M)1) Drain electrode, second cross coupling tube (M)2) Grid, nMOS injection tube (M)3) Drain, pMOS injection tube number one (M)4) A drain electrode;
the second primary coil (L) of the second transformer4) One end of the output Buffer is grounded, and the other end of the output Buffer is connected with the input end of a second output Buffer (Buffer 2); secondary coil (L) of the second transformer5) One terminal connected to a voltage source (V)DD) Connected with the other end connected with a third coil (L)6) Connected to and respectively connected to a second nMOS injection tube (M)5) And pMOS injection tube II (M)6) A source electrode of (a); no. two third-stage coil (L) of the No. two transformer3) One end and a secondary coil (L)5) The other ends are respectively connected with a first cross coupling tube (M)1) Grid, second cross coupling tube (M)2) Drain electrode, nMOS injection tube I (M)3) Source, pMOS injection tube number one (M)4) A source electrode;
the first cross coupling tube (M)1) Source and second cross coupling tube (M)2) The source electrodes are all connected with a current source tube (M)7) Drain electrode, said current source tube (M)7) Source electrode is grounded, the current source tube (M)7) Gate input control voltage (V)B) (ii) a The nMOS injection tube I (M)3) The grid is connected with the gate through a third Transmission Line (TL)3) Connecting the negative terminal (V) of the input signalinj-) according to the formula (I); the second nMOS injection tube (M)5) The grid electrode passes through a fourth Transmission Line (TL) in sequence4) Three-number Transmission Line (TL)3) Connecting the negative terminal (V) of the input signalinj-) according to the formula (I); the pMOS injection tube (M)4) Gate via Transmission Line (TL)1) Connecting the positive terminals (V) of the input signalsinj(+) of; the second pMOS injection tube (M)6) The grid electrode passes through a second Transmission Line (TL) in sequence2) A first Transmission Line (TL)1) Connecting the positive terminals (V) of the input signalsinj+)。
2. The distributed injection and transformer based wideband injection locked frequency divider of claim 1, wherein the circuit structures of the first output Buffer (Buffer1) and the second output Buffer (Buffer2) are the same, and each comprises a pMOS output tube (M)8) Said pMOS output tube (M)8) The source is grounded, the gate is used as the input end of the output buffer, and the drain is connected with an inductor (L)b) Harmonic short circuit capacitor (C)2) An output capacitor (C)out) (ii) a The inductor (L)b) One end is connected with a pMOS output tube (M)8) Drain electrode, the other end is connected with bypass capacitorC1) And a voltage source (V)DD) Said bypass capacitance (C)1) One end is connected with an inductor (L)b) The other end is grounded; the harmonic short-circuit capacitor (C)2) One end is connected with a pMOS output tube (M)8) The other end of the drain electrode is grounded; the output capacitor (C)out) One end is connected with a pMOS output tube (M)8) And the other end of the drain electrode is used as the output end of the output buffer.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060033587A1 (en) * 2004-08-11 2006-02-16 Jose Cabanillas Coupled-inductor multi-band VCO
US20120019289A1 (en) * 2010-07-20 2012-01-26 Industrial Technology Research Institute Injection-locked frequency divider
WO2014026029A1 (en) * 2012-08-09 2014-02-13 Qualcomm Incorporated Tunable injection locked dividers with enhanced locking range
CN103607201A (en) * 2013-11-27 2014-02-26 中国科学院微电子研究所 Injection locking frequency divider with wide locking range
WO2015042814A1 (en) * 2013-09-25 2015-04-02 Huawei Technologies Co., Ltd. Wideband injection locked frequency multipliers, oscillators and dividers using higher order lc resonant tank
JP2016208156A (en) * 2015-04-17 2016-12-08 株式会社半導体理工学研究センター Oscillation circuit and phase lock loop
CN106487382A (en) * 2016-10-13 2017-03-08 天津大学 A kind of injection locking frequency divider of multimode frequency dividing

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060033587A1 (en) * 2004-08-11 2006-02-16 Jose Cabanillas Coupled-inductor multi-band VCO
US20120019289A1 (en) * 2010-07-20 2012-01-26 Industrial Technology Research Institute Injection-locked frequency divider
WO2014026029A1 (en) * 2012-08-09 2014-02-13 Qualcomm Incorporated Tunable injection locked dividers with enhanced locking range
WO2015042814A1 (en) * 2013-09-25 2015-04-02 Huawei Technologies Co., Ltd. Wideband injection locked frequency multipliers, oscillators and dividers using higher order lc resonant tank
CN103607201A (en) * 2013-11-27 2014-02-26 中国科学院微电子研究所 Injection locking frequency divider with wide locking range
JP2016208156A (en) * 2015-04-17 2016-12-08 株式会社半導体理工学研究センター Oscillation circuit and phase lock loop
CN106487382A (en) * 2016-10-13 2017-03-08 天津大学 A kind of injection locking frequency divider of multimode frequency dividing

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