CN110727046B - Method for manufacturing optical coupling end face in three-dimensional integrated optical interconnection chip - Google Patents
Method for manufacturing optical coupling end face in three-dimensional integrated optical interconnection chip Download PDFInfo
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- CN110727046B CN110727046B CN201810776259.3A CN201810776259A CN110727046B CN 110727046 B CN110727046 B CN 110727046B CN 201810776259 A CN201810776259 A CN 201810776259A CN 110727046 B CN110727046 B CN 110727046B
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/12002—Three-dimensional structures
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12166—Manufacturing methods
- G02B2006/12192—Splicing
Abstract
The invention provides a method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip, which comprises the following steps: providing a device wafer, wherein the device wafer comprises a front side with a device structure and a back side opposite to the front side, and the device wafer is provided with a through silicon via extending from the front side to the back side; bonding the front surface with a carrier wafer; forming spherical welding points on the back surface; and etching the device wafer from the back surface to form an optical coupling end surface penetrating through the device wafer. The invention simplifies the manufacturing process of the optical coupling end face in the three-dimensional integrated optical interconnection chip, improves the quality of the optical coupling end face and reduces the manufacturing cost of the three-dimensional integrated optical interconnection chip.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip.
Background
As the feature size of semiconductor devices is continuously reduced with the continuous development of scientific technology, moore's law is approaching to the physical limit, and therefore, it is becoming more difficult to improve the chip integration degree only by reducing the device size. To solve this problem, Three-Dimensional (3D) integrated packages have been produced. The three-dimensional integrated packaging technology is one of the key development technologies in the future, and is a key solution for realizing chip miniaturization, overcoming signal delay and breaking through the bottleneck of moore's law. The core idea of three-dimensional integrated packaging is to stack and integrate chips in a direction perpendicular to a substrate, and to realize interconnection in the perpendicular direction by means of leads, Through Silicon Vias (TSVs), and the like, so as to further improve the integration density in a unit area, thereby reducing the packaging size. Meanwhile, heterogeneous integration can be realized by three-dimensional integrated packaging, so that optoelectronic products develop towards higher integration density and multiple functions.
The most feasible scheme of on-chip optical interconnection at the present stage is based on 3D integrated silicon photon interconnection, namely, an electrical chip and an integrated silicon optical chip are respectively prepared on different chips, 3D photoelectric integration is realized by utilizing a silicon optical adapter plate, and the breakthrough of the technology has huge market space in the field of high-speed chips.
The optical coupling end face of the existing silicon optical chip is manufactured by combining deep etching with the traditional cleavage process, so that the high-quality optical coupling end face can be easily obtained, and the coupling alignment process from the optical fiber to the silicon optical chip is not influenced. However, in the implementation process of 3D integrated package, due to the introduction of the TSV fabrication process and the subsequent ball pad fabrication process, if the above deep etching process is still used to fabricate the optical coupling end face, the existence of the deep etching trench will have a great influence on the subsequent wafer thinning and ball pad fabrication. Meanwhile, the quality of the optical coupling end face in the silicon optical chip is difficult to ensure only by adopting the traditional cleavage method, and the optical coupling efficiency from the optical fiber to the silicon optical chip is influenced.
Therefore, how to ensure the quality of the optical coupling end face in the three-dimensional integrated optical interconnection chip and reduce the process complexity is a technical problem to be solved urgently at present.
Disclosure of Invention
The invention provides a method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip, which is used for solving the problem that the manufacturing process of the optical coupling end face in the existing three-dimensional integrated optical interconnection chip is complex and improving the quality of the optical coupling end face.
In order to solve the above problems, the present invention provides a method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip, comprising the following steps:
providing a device wafer, wherein the device wafer comprises a front side with a device structure and a back side opposite to the front side, and the device wafer is provided with a through silicon via extending from the front side to the back side;
bonding the front surface with a carrier wafer;
forming spherical welding points on the back surface;
and etching the device wafer from the back surface to form an optical coupling end surface penetrating through the device wafer.
Preferably, the method further comprises the following steps before bonding the front surface to a carrier wafer:
and filling a conductive material in the silicon through hole.
Preferably, the conductive material is one or more of platinum, gold, copper, titanium and tungsten.
Preferably, the device wafer comprises an SOI substrate; the specific steps of bonding the front side to a carrier wafer include:
etching the top silicon and the buried oxide layer in the SOI substrate to form an opening region for exposing the bottom silicon in the SOI substrate;
and depositing a bonding material layer in the opening area and the top silicon surface to bond the device wafer and the carrier wafer.
Preferably, the material of the bonding material layer is a polymer temporary bonding material.
Preferably, the specific step of forming the spherical solder joint on the back surface includes:
thinning the device wafer from the back side to expose the through silicon via;
and forming spherical welding points at the exposed ends of the through silicon vias.
Preferably, the step of etching the device wafer from the back surface to form an optical coupling end face penetrating through the device wafer includes:
and etching the device wafer from the back surface to the front surface direction to expose the opening region and form the optical coupling end surface.
Preferably, after the wafer is etched from the back surface to form the optical coupling end face penetrating through the device wafer, the method further includes the following steps:
debonding to separate the carrier wafer and the device wafer.
The invention provides a method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip, which comprises the steps of bonding the front face of a device wafer with a device structure with a carrier wafer before forming the optical coupling end face through deep etching, and etching the device wafer from the back after completing a preparation process of a spherical welding spot on the back of the device wafer so as to form the optical coupling end face penetrating through the device wafer. Therefore, the invention simplifies the manufacturing process of the optical coupling end face in the three-dimensional integrated optical interconnection chip, improves the quality of the optical coupling end face and reduces the manufacturing cost of the three-dimensional integrated optical interconnection chip.
Drawings
FIG. 1 is a flow chart of a method for fabricating an optical coupling facet in a three-dimensional integrated optical interconnect chip in accordance with an embodiment of the present invention;
fig. 2A-2H are schematic cross-sectional views of main processes in the manufacturing process of the optical coupling end surface in the three-dimensional integrated optical interconnection chip according to the embodiment of the present invention.
Detailed Description
The following describes in detail a specific embodiment of a method for manufacturing an optical coupling end surface in a three-dimensional integrated optical interconnection chip according to the present invention with reference to the accompanying drawings.
Fig. 1 is a flowchart of a method for manufacturing an optical coupling end surface in a three-dimensional integrated optical interconnection chip according to an embodiment of the present invention, and fig. 2A to 2H are schematic cross-sectional views of main processes in a process for manufacturing an optical coupling end surface in a three-dimensional integrated optical interconnection chip according to an embodiment of the present invention. As shown in fig. 1 and fig. 2A to fig. 2H, the method for manufacturing an optical coupling end surface in a three-dimensional integrated optical interconnection chip according to this embodiment includes the following steps:
step S11, a device wafer is provided, where the device wafer includes a front side 201 having a device structure and a back side 202 opposite to the front side 201, and the device wafer has a through silicon via 21 extending from the front side 201 to the back side 202, as shown in fig. 2A. The device wafer includes a substrate, which may be a Silicon substrate, an SOI (Silicon On Insulator) substrate, a GOI (Germanium On Insulator) substrate, or the like. In this embodiment, the front surface 201 with the device structure formed on the device wafer is etched to form the through-silicon via 21. In this step, the through-silicon via 21 preferably does not penetrate to the back side 202 of the device wafer.
In step S12, the front surface 201 is bonded to a carrier wafer 24, as shown in fig. 2D. The carrier wafer 24 is used to support the device wafer for subsequent handling of the backside 202 of the device wafer. The specific type of the carrier wafer 24 may be selected by a person skilled in the art according to actual needs, and may be, for example, a silicon wafer, which is not limited in this embodiment.
Preferably, the method further comprises the following steps before bonding the front side 201 to a carrier wafer 24: conductive material is filled in the through silicon via 21, as shown in fig. 2B. And realizing interconnection of the three-dimensional integrated optical interconnection chip in the direction vertical to the substrate of the device wafer through the conductive material filled in the through silicon via 21. More preferably, the conductive material is one or more of platinum, gold, copper, titanium and tungsten.
In order to facilitate the subsequent determination of the position of the optical coupling end face and simplify the etching process from the back side to the front side direction so as to further improve the performance of the optical coupling end face of the three-dimensional integrated optical interconnection chip, preferably, the device wafer comprises an SOI substrate; the specific steps of bonding the front side 201 to a carrier wafer 24 include:
(S12-1) etching the top silicon 23 and the buried oxide layer 22 in the SOI substrate to form an open region 203 exposing the bottom silicon 20 in the SOI substrate, as shown in fig. 2C;
(S12-2) depositing a bonding material layer 25 in the open region 202 and on the surface of the top silicon 23 to bond the device wafer and the carrier wafer 24. In order to facilitate subsequent separation of the device wafer and the carrier wafer, it is more preferable that the material of the bonding material layer 25 is a polymer temporary bonding material. After the front surface 201 of the device wafer and the carrier wafer are bonded by adopting the viscose type polymer temporary bonding material, in the bonding removing process, only corresponding chemical solvents are needed to dissolve the polymer temporary bonding material, so that the operation is simple and convenient, and the damage to the device structure on the front surface 201 of the device wafer can be avoided. The specific type of the high molecular temporary bonding material and the corresponding method for debonding can be selected by those skilled in the art according to actual needs, such as 1-dodecene or D-limonene.
In step S13, a ball bond is formed on the back surface 202, as shown in fig. 2F. Specifically, the step of forming the ball bond on the back surface includes:
(S13-1) thinning the device wafer from the back side 202, exposing the through silicon vias 21, as shown in fig. 2E. In fig. 2E, after thinning, an etched surface 2021 for forming ball pads is formed on the back surface of the device wafer opposite to the front surface 201. The specific method for thinning the bottom silicon layer 20 may be, but is not limited to, mechanical Grinding (Grinding), dry etching, wet etching or plasma etching, Chemical Mechanical Polishing (CMP), or a combination of several methods. Since the through-silicon via 21 is filled before the thinning process is performed, the position of the through-silicon via 21 can be exposed through the thinning process, and the surface quality of the through-silicon via 21 is ensured.
(S13-2) forming ball bonds 27 at the exposed ends of the through-silicon-vias 21. The ball pads 27 serve as leads for a subsequent packaging process. The material of the ball-shaped solder joint 27 can be, but is not limited to, tin, so as to improve the bonding and conductivity of the three-dimensional integrated optical interconnection die solder joint.
Step S14, the device wafer is etched from the back side 202 to form an optical coupling facet 28 that penetrates the device wafer, as shown in fig. 2H.
Preferably, the step of etching the device wafer from the back side 202 to form the optical coupling end face penetrating through the device wafer includes:
the device wafer is etched from the back side 202 towards the front side 201, exposing the open region 203, forming the optical coupling end face 28.
Specifically, first, a photoresist layer 26 is coated on the etched surface 2021 on which the ball pads are formed; then, photoetching is carried out on the photoresist layer 26, and the photoresist corresponding to the opening region 203 is removed, so that an etching window is defined on the etching surface 2021; then, etching the bottom silicon 20 from the etching surface 2021 (i.e. the back of the thinned device wafer) in the etching window by using a deep etching process to form an optical coupling end surface 28 penetrating through the bottom silicon 20, as shown in fig. 2G; finally, the photoresist layer 26 is removed. In the process of defining an etching window on the back surface of the device wafer on which the ball pads are formed, in order to improve the alignment accuracy between the etching window and the opening region 203, an alignment mark may be disposed on the front surface 201.
Preferably, after etching the device wafer from the back side 202 to form the optical coupling facet 28 through the device wafer, the method further includes the steps of: debonding to separate the carrier wafer 24 from the device wafer.
In the method for manufacturing the optical coupling end face in the three-dimensional integrated optical interconnection chip according to the present embodiment, before the optical coupling end face is formed by deep etching, the front surface of the device wafer on which the device structure is formed is bonded to the carrier wafer, and after the preparation process of the spherical solder joint is completed on the back surface of the device wafer, the thinned device wafer is etched to form the optical coupling end face of the device wafer. Therefore, the invention simplifies the manufacturing process of the optical coupling end face in the three-dimensional integrated optical interconnection chip, improves the quality of the optical coupling end face and reduces the manufacturing cost of the three-dimensional integrated optical interconnection chip.
Furthermore, the present embodiment further provides a three-dimensional integrated optical interconnection chip, and the structure of the three-dimensional integrated optical interconnection chip is shown in fig. 2H. As shown in fig. 2H, the three-dimensional integrated optical interconnection chip provided in this embodiment includes: a device wafer including a front side having a device structure and a back side opposite the front side, the device wafer having through-silicon vias 21 extending from the front side in a direction toward the back side; a carrier wafer 24 bonded to the front side of the device wafer; the back side of the device wafer has ball pads 27 and an optical coupling end face 28 extending from the back side to the front side. The carrier wafer 24 is used to support the device wafer for subsequent handling of the backside of the device wafer. The specific type of the carrier wafer 24 may be selected by a person skilled in the art according to actual needs, and may be, for example, a silicon wafer, which is not limited in this embodiment.
In the embodiment, the extending direction of the through silicon via is opposite to the extending direction of the optical coupling end face, that is, the optical coupling end face extends from the back face to the front face of the device wafer on which the spherical solder joint is formed.
In this embodiment, the device wafer includes a substrate, and the substrate may be a Silicon substrate, an SOI (Silicon On Insulator) substrate, a GOI (Germanium On Insulator) substrate, or the like. In this embodiment, the through silicon via 21 is formed by etching from the front surface 201 of the device wafer on which the device structure is formed.
Preferably, the through silicon via 21 is filled with a conductive material. More preferably, the conductive material is one or more of platinum, gold, copper, titanium and tungsten. In this embodiment, the three-dimensional integrated optical interconnection chip is interconnected in a direction perpendicular to the substrate of the device wafer by the conductive material filled in the through silicon via 21.
Preferably, the device wafer comprises an SOI substrate; the front side of the device wafer has an opening through the top silicon 23 and buried oxide layer 22 in the SOI substrate; a bonding material layer 25 is filled in the opening and on the surface of the top silicon 23, and the carrier wafer 24 is bonded to the front surface of the device wafer through the bonding material layer 25.
In order to facilitate the subsequent separation of the device wafer from the carrier wafer 24, preferably, the material of the bonding material layer 25 is a polymer temporary bonding material. The bonding of the high-molecular temporary bonding material of the viscose type is adopted for bonding the front surface of the device wafer and the carrier wafer, and only corresponding chemical solvents are needed to be adopted for dissolving the high-molecular temporary bonding material in the bonding removing process, so that the operation is simple and convenient, and the damage to the device structure on the front surface of the device wafer can be avoided. The specific type of the high molecular temporary bonding material and the corresponding method for debonding can be selected by those skilled in the art according to actual needs, such as 1-dodecene or D-limonene.
Preferably, the ball pads 27 are located at the end of the through-silicon vias 21 exposed to the back side of the device wafer. The ball pads 27 serve as leads for a subsequent packaging process. The material of the ball-shaped solder joint 27 can be, but is not limited to, tin, so as to improve the bonding and conductivity of the three-dimensional integrated optical interconnection die solder joint.
Preferably, the optical coupling end surface 28 penetrates the device wafer and is disposed corresponding to the opening.
In the three-dimensional integrated optical interconnection chip provided by the present embodiment, the optical coupling end surface is formed by extending from the back surface of the device wafer having the spherical solder joint to the front surface having the device structure, so that the quality of the optical coupling end surface is effectively improved, and the manufacturing cost of the three-dimensional integrated optical interconnection chip is also reduced.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (6)
1. A method for manufacturing an optical coupling end face in a three-dimensional integrated optical interconnection chip is characterized by comprising the following steps:
providing a device wafer, wherein the device wafer comprises a front side with a device structure and a back side opposite to the front side, and the device wafer is provided with a through silicon via extending from the front side to the back side;
bonding the front side to a carrier wafer, the device wafer comprising an SOI substrate; the specific steps of bonding the front side to a carrier wafer include: etching the top silicon and the buried oxide layer in the SOI substrate to form an opening region for exposing the bottom silicon in the SOI substrate, and depositing a bonding material layer in the opening region and the top silicon surface to bond the device wafer and the carrier wafer;
thinning the device wafer from the back side to expose the through silicon via;
forming spherical welding points at the exposed end parts of the through silicon vias;
and etching the device wafer from the back surface to form an optical coupling end surface penetrating through the device wafer.
2. The method of claim 1, further comprising the step of bonding the front surface to a carrier wafer prior to the step of:
and filling a conductive material in the silicon through hole.
3. The method of claim 2, wherein the conductive material is one or more of platinum, gold, copper, titanium, and tungsten.
4. The method of claim 1, wherein the bonding material layer is a temporary polymer bonding material.
5. The method of claim 1, wherein the step of etching the device wafer from the backside to form the optical coupling facet extending through the device wafer comprises:
and etching the device wafer from the back surface to the front surface direction to expose the opening region and form the optical coupling end surface.
6. The method of claim 1, wherein the step of etching the device wafer from the backside to form the optical coupling facet extending through the device wafer further comprises:
debonding to separate the carrier wafer and the device wafer.
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2018
- 2018-07-16 CN CN201810776259.3A patent/CN110727046B/en active Active
Patent Citations (6)
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| EP0335104A2 (en) * | 1988-03-31 | 1989-10-04 | Siemens Aktiengesellschaft | Arrangement to optically couple one or a plurality of optical senders to one or a plurality of optical receivers of one or a plurality of integrated circuits |
| CN1591920A (en) * | 2003-09-01 | 2005-03-09 | 株式会社东芝 | Light semiconductor device and optical signal input and output device |
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