CN110707127A

CN110707127A - Display panel and display device

Info

Publication number: CN110707127A
Application number: CN201910823792.5A
Authority: CN
Inventors: 周志伟
Original assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Current assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date: 2019-09-02
Filing date: 2019-09-02
Publication date: 2020-01-17
Also published as: WO2021042618A1

Abstract

The invention discloses a display panel and a display device. The invention changes the introduction mode of the power supply voltage signal and simultaneously provides the power supply voltage signal at different positions to solve the problem of voltage drop of the display panel, thereby improving the problem of uneven brightness of the picture.

Description

Display panel and display device

Technical Field

The invention belongs to the technical field of display, and particularly relates to a display panel and a display device.

Background

When the organic light emitting diode emits light, the driving current is related to the power supply voltage, and needs to be supplied by the power supply voltage VDD. Considering the impedance of the power supply voltage VDD, the actual VDD voltage obtained by the pixel unit is lower than the VDD voltage supplied by the power supply, i.e., VDDpixel — VDD _ Ioled RVDD, under the action of the resistance drop (IRDrop). As shown in fig. 1, the upper end of the display panel is relatively farther from the power voltage VDD and the resistance is relatively larger than the lower end of the display panel, so that the power voltage VDD drops more at this position, which may cause the upper end of the display panel to be dark and the lower end to be bright, and seriously affect the brightness uniformity of the display panel.

How to effectively solve the problems of dark upper end and bright lower end of the display panel and improve the brightness uniformity of the display panel is an important subject in the display technology.

Disclosure of Invention

Embodiments of the present invention provide a display panel, which changes a mode of introducing a power Voltage (VDD) signal, and simultaneously provides the VDD signal at different positions to solve a voltage drop problem of the display panel, so as to improve a problem of uneven brightness of a picture.

According to an aspect of the present invention, there is provided a display panel including: the display device comprises a display area and a non-display area, wherein the non-display area is positioned at the periphery of the display area; the first routing is arranged in the non-display area and forms a closed loop; the second wires penetrate through the display area along the longitudinal direction of the display panel, and are electrically connected with the first wires; and the driving chip is electrically connected with the first wire, is used for generating a power supply end voltage signal of the display panel and provides the power supply end voltage signal to the second wire through the first wire.

Further, the first routing line is arranged around the display area.

Further, the first wire is a source drain wire.

Further, the driving chip is disposed at one end of the non-display area along a longitudinal direction of the display panel.

Further, the display panel further includes at least one third trace, the third trace penetrates through the display area along the transverse direction of the display panel, and the third trace is electrically connected to the first trace and the second trace, and is configured to receive a power supply end voltage signal that is transmitted by the first trace and generated from the driving chip, and transmit the power supply end voltage signal to the second trace.

Further, the third trace and the first trace are disposed on the same layer.

Further, when the third routing wire is single, the third routing wire penetrates through the display area along the central axis of the display area.

Further, when the third traces are multiple, the third traces are arranged at equal intervals.

Further, the third wire is communicated with the second wire through a via structure.

According to another aspect of the present invention, there is provided a display device comprising the display panel as described in any one of the above.

The embodiment of the invention changes the introduction mode of the power supply Voltage (VDD) signal and simultaneously provides the VDD signal at different positions to solve the problem of voltage drop of the display panel, thereby improving the problem of uneven picture brightness.

Drawings

The technical solution and the advantages of the present invention will be apparent from the following detailed description of the embodiments of the present invention with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a display panel provided in the prior art.

Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention.

Fig. 3 is a schematic structural diagram of a via hole provided in an embodiment of the present invention.

Fig. 4 is a schematic structural diagram of a line change process according to an embodiment of the present invention.

Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention.

Fig. 6 is a schematic flowchart of another display panel according to an embodiment of the present invention.

Fig. 7 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terms "first," "second," "third," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the objects so described are interchangeable under appropriate circumstances. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.

In particular embodiments, the drawings discussed below and the embodiments used to describe the principles of the present disclosure are by way of illustration only and should not be construed to limit the scope of the present disclosure. Those skilled in the art will understand that the principles of the present invention may be implemented in any suitably arranged system. Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. Further, a terminal according to an exemplary embodiment will be described in detail with reference to the accompanying drawings. Like reference symbols in the various drawings indicate like elements.

The terminology used in the detailed description is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concepts. Unless the context clearly dictates otherwise, expressions used in the singular form encompass expressions in the plural form. In the present specification, it is to be understood that terms such as "comprising," "having," and "containing" are intended to specify the presence of stated features, integers, steps, acts, or combinations thereof, as taught in the present specification, and are not intended to preclude the presence or addition of one or more other features, integers, steps, acts, or combinations thereof. Like reference symbols in the various drawings indicate like elements.

As shown in fig. 2, an embodiment of the invention provides a display panel 1, which includes a display area 10, a non-display area 20, a first trace 30, a second trace 40, and a driving chip 50.

Specifically, the non-display area 20 is located at the periphery of the display area 10.

The first trace 30 is disposed on the non-display area 20, and in this embodiment, the first trace 30 forms a closed loop around the display area 10, so that the first trace 30 provides the same VDD signal at two ends of the display panel 1 at the same time, thereby reducing a voltage drop caused by the VDD signal provided from the driving chip 50, and reducing the problem of uneven brightness of the display panel 1. The first trace 30 is a source/drain (SD) trace.

The plurality of second traces 40 penetrate the display area 10 along the longitudinal direction of the display panel 1, and the plurality of second traces 40 are electrically connected to the first traces 30. The second trace 40 is used for providing a voltage to the thin film transistor.

The driving chip 50 is disposed at one end of the non-display area 20 along the longitudinal direction of the display panel 1, and is electrically connected to the first trace 30. The driving chip 50 is used for generating a VDD signal of the display panel 1 and is provided to the second trace 40 through the first trace 30.

As shown in fig. 3 and fig. 4, because the design of the first line 30 has more longitudinal SD traces 320 arranged along the longitudinal direction of the display panel 1 than the prior art, and thus a short circuit occurs with the original transverse SD trace 330 arranged along the transverse direction of the display panel 1 and on the same layer, it is necessary to replace the insulating layer 200 at the intersection point by using the cnt (contact) via 310, so that the longitudinal SD trace 320 at the intersection point is replaced by the metal trace 100 on a different layer, so as to prevent the risk of short circuit.

As shown in fig. 5, another display panel 1 according to an embodiment of the present invention includes a display area 10, a non-display area 20, a first trace 30, a second trace 40, a driving chip 50, and a third trace 60.

The first wire 30 is disposed on the non-display area 20, and in the present embodiment, the first wire 30 is formed around the display area 10 to form a closed loop. The first trace 30 is a source/drain (SD) trace.

The plurality of second traces 40 penetrate the display area 10 along the longitudinal direction of the display panel, and the plurality of second traces 40 are electrically connected to the third trace 60. The second trace 40 is used for providing a voltage to the thin film transistor.

The driving chip 50 is disposed at one end of the non-display area 20 along the longitudinal direction of the display panel 1, and is electrically connected to the first trace 30, and the driving chip 50 is used for generating a VDD signal of the display panel 1.

The third trace 60 penetrates the display area 10 along a central axis of the display panel 1 in the transverse direction, and the third trace 60 is electrically connected to the first trace 30 and the second trace 40, respectively. The third trace 60 is used for receiving the VDD signal transmitted by the first trace 30 and generated from the driving chip 50, and transmitting the VDD signal to the second trace 40. The third trace 60 and the first trace 30 are disposed on the same layer, and the third trace 60 is communicated with the second trace 40 through a via structure.

The third wire 60 provides the VDD signal to both ends of the display panel 1 from the central position, so as to reduce the number of VDD signal paths through the thin film transistors and reduce the voltage drop, thereby reducing the problem of uneven brightness of the display panel 1.

As shown in fig. 6, the embodiment of the invention provides another display panel 1, which includes a display area 10, a non-display area 20, a first trace 30, a second trace 40, a driving chip 50, and a third trace 60.

The plurality of second traces 40 penetrate the display area 10 along the longitudinal direction of the display panel 1, and the plurality of second traces 40 are electrically connected to the third traces 60. The second trace 40 is used for providing a voltage to the thin film transistor.

The third routing lines 60 penetrate the display area 10 along the transverse direction of the display panel 1. In the present embodiment, there are 3 third traces 60, and they are disposed at equal intervals. The third trace 60 is electrically connected to the first trace 30 and the second trace 40, respectively, and is configured to receive the VDD signal transmitted by the first trace 30 and generated from the driving chip 50, and transmit the VDD signal to the second trace 40. The third trace 60 and the first trace 30 are disposed on the same layer, and the third trace 60 is communicated with the second trace 40 through a via structure.

The VDD signals are provided to the two ends of the display panel 1 from three positions through the third wire 60, so that the number of VDD signal paths through the thin film transistors is further reduced, and the voltage drop is reduced, thereby reducing the problem of uneven brightness of the picture of the display panel 1.

As shown in fig. 3 and fig. 4, because the design of the first line 30 has more longitudinal SD traces 320 arranged along the longitudinal direction of the display panel 1 than that in the prior art, and a short circuit occurs with the original transverse SD trace 330 arranged along the transverse direction of the display panel 1 and on the same layer, it is necessary to change the insulating layer 200 at the intersection point in a cnt (contact) via 310 manner, so that the longitudinal SD trace 320 at the intersection point is replaced with the metal trace 100 on a different layer, so as to prevent the risk of short circuit. The 3 third traces 60 are disposed to compress the size space of the pixels, so that corresponding modifications to the related lines of the display area 10 are required.

As shown in fig. 7, the embodiment of the invention further provides a display device 100, which includes the display panel 1 as described above, so as to improve the problem of uneven brightness of the picture due to the problem of voltage drop.

The display panel and the display device provided by the embodiment of the present invention are described in detail above, and the principle and the embodiment of the present invention are explained herein by applying specific examples, and the description of the above embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A display panel, comprising:

the display device comprises a display area and a non-display area, wherein the non-display area is positioned at the periphery of the display area;

the first routing is arranged in the non-display area and forms a closed loop;

the second wires penetrate through the display area along the longitudinal direction of the display panel, and are electrically connected with the first wires;

and the driving chip is electrically connected with the first wire, is used for generating a power supply end voltage signal of the display panel and provides the power supply end voltage signal to the second wire through the first wire.

2. The display panel according to claim 1, wherein the first trace is disposed around the display area.

3. The display panel according to claim 1, wherein the first traces are source-drain traces.

4. The display panel according to claim 1, wherein the driving chip is provided at one end of the non-display region in a longitudinal direction of the display panel.

5. The display panel according to claim 1, wherein the display panel further comprises at least one third trace, the third trace penetrates the display region along a transverse direction of the display panel, and the third trace is electrically connected to the first trace and the second trace, respectively, and is configured to receive a power supply end voltage signal that is transmitted by the first trace and generated from the driving chip, and transmit the power supply end voltage signal to the second trace.

6. The display panel according to claim 1, wherein the third traces and the first traces are disposed on the same layer.

7. The display panel according to claim 5, wherein when the third trace is a single trace, the third trace penetrates the display area along a central axis of the display area.

8. The display panel according to claim 5, wherein when the third traces are plural, the third traces are disposed at equal intervals from each other.

9. The display panel according to claim 7 or 8, wherein the third trace is communicated with the second trace through a via structure.

10. A display device comprising the display panel according to any one of claims 1 to 9.