CN110673683A - Low temperature floats time delay drive controller - Google Patents

Low temperature floats time delay drive controller Download PDF

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Publication number
CN110673683A
CN110673683A CN201910971469.2A CN201910971469A CN110673683A CN 110673683 A CN110673683 A CN 110673683A CN 201910971469 A CN201910971469 A CN 201910971469A CN 110673683 A CN110673683 A CN 110673683A
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circuit
pulse
gate
input
circuits
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CN201910971469.2A
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CN110673683B (en
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于春香
高慧
张勇
李金宝
杜松
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China North Industries Group Corp No 214 Research Institute Suzhou R&D Center
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China North Industries Group Corp No 214 Research Institute Suzhou R&D Center
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Pulse Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

The invention relates to a low-temperature drift delay driving controller, which comprises two charging circuits, two comparison circuits, a precision reference circuit, two pulse circuits, an OR gate circuit and a power switch circuit, wherein the charging circuits are connected with the two comparison circuits; the two paths of input signals are respectively and correspondingly input into the two paths of charging circuits for voltage division, and then delayed charging voltages are respectively input into the two corresponding paths of comparison circuits and are compared with reference voltages provided by a precision reference circuit; when the charging voltage exceeds the reference voltage, the output voltage of the corresponding comparison circuit jumps; the comparison circuit outputs the jump signal to a corresponding pulse circuit, the pulse circuit is triggered to generate a pulse signal, the pulse signal is input to an OR gate circuit, the pulse signal is inverted by the OR gate circuit, and the pulse signal is input to open a power switch circuit to provide a current pulse output signal for a load. The invention can be directly used in time-delay occasions with a wide working temperature range of-55-125 ℃, and meets the use requirements of small volume, high precision and low temperature drift.

Description

Low temperature floats time delay drive controller
Technical Field
The invention relates to a low-temperature-drift delay driving controller based on an LTCC substrate, which can meet the requirements of a place with a wide temperature working range and low delay temperature drift.
Background
In a precision guided weapon system, in order to precisely control the time of an ignition switch, a delay driving circuit is used for controlling a starting device so as to control the ignition switch. Meanwhile, because the system working environment is severe, the delay driving circuit is generally required to have the capabilities of high-precision delay and low-temperature drift delay time.
The existing delay circuit has low precision and large high-low temperature change range, can only meet the working condition of normal temperature, and can not meet the precision requirement under the severe working environment condition, so the existing delay circuit cannot be used, and needs to be improved.
Disclosure of Invention
The invention aims to solve the defects of the existing delay drive controller and provide a delay drive controller which has the advantages of small volume, high precision and low temperature drift.
The technical solution for realizing the purpose of the invention is as follows:
a low temperature drift delay drive controller, comprising:
the circuit comprises two charging circuits, two comparison circuits, a precision reference circuit, two pulse circuits, an OR gate circuit and a power switch circuit;
the two paths of input signals are respectively and correspondingly input into the two paths of charging circuits for voltage division, and then delayed charging voltages are respectively input into the two corresponding paths of comparison circuits and are compared with reference voltages provided by a precision reference circuit; when the charging voltage exceeds the reference voltage, the output voltage of the corresponding comparison circuit jumps; the comparison circuit outputs the jump signal to a corresponding pulse circuit, the pulse circuit is triggered to generate a pulse signal, the pulse signal is input to an OR gate circuit, the pulse signal is inverted by the OR gate circuit, and the pulse signal is input to open a power switch circuit to provide a current pulse output signal for a load.
Furthermore, each charging circuit comprises a divider resistor and a first capacitor;
the input step signal is subjected to voltage division treatment through the voltage division resistor and then charges the first capacitor, and the charging voltage of the first capacitor is connected to the comparison circuit.
Further, each path of comparison circuit comprises a comparator; the positive input end of the comparator is connected with the output end of the charging circuit; and the negative input end of the comparator is connected with the reference voltage generated by the precision reference circuit.
Furthermore, a precision voltage stabilizing source generates a 5V reference voltage in the precision reference circuit.
Furthermore, each pulse circuit comprises a one-shot trigger;
when a signal jumping from 0 level to high level is input to the trigger input end of the one-shot trigger, one output end of the one-shot trigger is triggered to output a pulse with low level to an OR gate circuit.
Further, the OR gate circuit comprises a first NOR gate, a second NOR gate, a first diode and a second diode;
the output ends of the two paths of pulse circuits are respectively and correspondingly connected to one input end of the first NOR gate and the second NOR gate, and the other input ends of the first NOR gate and the second NOR gate are grounded; the output ends of the first NOR gate and the second NOR gate are respectively and correspondingly connected with the positive ends of the first diode and the second diode; the negative ends of the first diode and the second diode are grounded.
Further, the power switch circuit comprises a triode; the base electrode of the triode is connected with the output end of the OR gate circuit; the collector of the triode is connected to a power supply VCC; the emitter of the triode is grounded through a load.
The charging circuit mainly divides the input 1 (or input 2) signal to provide a charging voltage to charge the capacitor to the positive end of the comparator circuit. The precision reference circuit mainly adopts power conversion to generate high-precision and low-temperature-drift 5V reference voltage to the negative end of the comparator circuit. When the voltage of the positive terminal of the comparator exceeds the voltage of the negative terminal 5V, the output voltage of the comparator jumps and changes from low level to high level. The comparison circuit outputs to the one-shot trigger circuit to generate a pulse, thereby forming a pulse circuit. The OR gate circuit is composed of digital circuits or gates, and when the pulse circuit of the input 1 (or the input 2) has pulse output, the power switch circuit is opened, so that a large-current pulse output is provided for a load.
The invention has the advantages of realizing high-precision time delay and driving functions, solving the defects of larger time delay time temperature drift and limited use occasions of the traditional time delay circuit on one hand, and being directly used in the time delay occasions with the working temperature range of-55-125 ℃. And on the other hand, the thick film hybrid integration process based on LTCC is adopted, and the requirement of system miniaturization is met.
Drawings
Fig. 1 is a circuit block diagram of a low temperature drift delay driving controller according to the present invention.
Fig. 2 is a circuit diagram of a charging circuit of a low-temperature-drift delay driving controller according to the present invention.
Fig. 3 is a circuit diagram of a comparison circuit of a low temperature drift delay driving controller according to the present invention.
FIG. 4 is a circuit diagram of a low temperature drift delay driving controller precision reference circuit according to the present invention.
FIG. 5 is a circuit diagram of a low temperature drift delay driving controller pulse circuit according to the present invention.
Fig. 6 is a circuit diagram of a low temperature drift delay drive controller or gate circuit of the present invention.
Fig. 7 is a circuit diagram of a power switch circuit of a low temperature drift delay driving controller according to the invention.
FIG. 8 is a timing diagram of a power switch circuit of a low temperature drift delay driver controller according to the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the low temperature drift delay driving controller of the present invention includes charging circuits 11 and 12, comparing circuits 12 and 22, a precision reference circuit 13, pulse circuits 14 and 24, an or gate circuit 15 and a power switch circuit 16.
Referring to fig. 7, the two charging circuits 11 and 12 mainly divide the two input signals 1 and 2, provide a delayed charging voltage to charge the capacitor, and are connected to the positive input terminals of the comparators in the comparison circuits 12 and 22. The precision reference circuit mainly performs power conversion, generates a high-precision and low-temperature-drift 5V reference voltage, and is connected to the negative input end of the comparator in the comparison circuits 12 and 22. When the voltage of the positive input end of the comparator exceeds the voltage of the negative input end by 5V, the output voltage of the comparator jumps and changes from low level to high level. The comparator circuit outputs the jump signal to a one-shot flip-flop circuit in the pulse circuit, generates a pulse, inputs the pulse to an or gate circuit 15, the or gate circuit 15 inverts the pulse signal, and the input opens a power switch circuit 16 to provide a large-current pulse output signal for a load.
As shown in fig. 2, each of the charging circuits 11 and 12 includes resistors R1 and R2 and a capacitor C1. The input step signal can form a voltage division circuit through the resistors R1 and R2, and the voltage division circuit performs voltage division processing to provide charging voltage to charge the capacitor C1 to the positive end of the comparator circuit.
According to the formula: uc (t) = uc (∞) + [ uc (0+) -uc (∞)]×e-t/τThe delay time t can be calculated. In the formula, uc (∞) ═ uin × R2/(R1+ R2), uc (0+) ═ 0V, uc (t) ═ 5V, and τ = R1 × C1.
The capacitor C1 is a 1-class multilayer ceramic dielectric chip capacitor, has the characteristic of low temperature coefficient, and ensures that the delay time and temperature drift are small.
As shown in fig. 3, each of the comparator circuits 12 and 22 is composed of a comparator N1 and a resistor R3. The output of each charging circuit is correspondingly connected to the positive input end of the comparator 12 in one comparing circuit. The 5V reference voltage generated by the precision reference circuit 13 is respectively connected to the negative input end of each comparator 12. When the voltage of the positive input end of the comparator 12 exceeds the voltage of the negative input end 5V, the output voltage of the comparator jumps and changes from low level to high level. The output end of the comparator is correspondingly connected to the B end of the trigger input end of the one-shot trigger in the subsequent pulse circuit.
As shown in fig. 4, the precision reference circuit 13 is composed of a precision regulator N3 and a capacitor C2. The precision reference circuit has the main functions of power supply conversion, generates 5V reference voltage with high precision and low temperature drift, has high precision of output voltage, outputs 5.000V +/-0.003V, has temperature drift of 3 ppm/DEG C, has the output voltage drift of 2.7mV when the working temperature is between 55 ℃ below zero and 125 ℃, and ensures the low temperature drift and high precision requirement of the forward input end voltage of the comparator.
As shown in fig. 5, the pulse circuits 14 and 24 are composed of a one-shot D1, resistors R4 and R5, and capacitors C3 and C4. A resistor R4 is externally connected between Rcext and a power supply VCCC; an indirect capacitor C3 between the external resistor end Rcext and the external capacitor end Cext; a resistor R5 is externally connected between the reset terminal CLR and the power supply VCC; the reset terminal CLR is grounded through a capacitor C4. When the trigger input terminal B of the one-shot D1 jumps from 0 level to high level, the one-shot/Q output terminal immediately outputs a low level pulse, the low level pulse width is determined by the product of the resistor R4 and the capacitor C3, and the pulse width is about 0.3 RC.
As shown in fig. 6, the or gate circuit 15 includes nor gates D3B, D3C, capacitors C5, C6, C7, diodes V1, V2, and a resistor R6. The output ends of the monostable flip-flops/Q are respectively output to the input ends of the NOR gates D3B and D3C, the output ends of the NOR gates D3B and D3C are respectively grounded through capacitors C5 and C6, and meanwhile, the output ends of the NOR gates D3B and D3C are connected with the positive ends of diodes V1 and V2; the negative terminals of the diodes V1, V2 are grounded via a resistor R6 and via a capacitor C7, respectively. The nor gates D3B and D3C perform the reverse operation of the signal, and when the positive terminal of the diode V1 has a high level pulse, the signal passes through the diode V1 to the negative terminal, and the diode V2 operates similarly.
As shown in fig. 7, the power switch circuit 16 includes resistors R7, R8, R9, capacitors C7, C8, and a transistor V3. The resistor R7 is connected between the base of the triode V3 and the output end of the OR gate circuit 15; the base of the triode V3 is grounded through a capacitor C7; the collector of the triode V3 is connected to a power supply VCC through a resistor R8; the emitter of the triode V3 is grounded through a resistor R9; the resistor R9 is connected with the capacitor C8 in parallel. The or gate circuit 15 outputs a signal to the power switch circuit 16, when the output signal of the or gate circuit 15 is at a high level, the ce electrode of the power transistor is turned on, so that a large current is supplied to the resistor R9 (load), and when the output signal of the or gate circuit 15 is at a low level, the ce electrode of the power transistor is turned off, and the resistor R9 (load) operates in an open state.
The low-temperature drift delay drive controller is integrally manufactured by adopting a thick film hybrid integration process based on LTCC (Low temperature Co-fired ceramic), and can meet the requirement of miniaturization and use of a system.

Claims (7)

1. A low temperature drift delay drive controller, comprising:
the circuit comprises two charging circuits, two comparison circuits, a precision reference circuit, two pulse circuits, an OR gate circuit and a power switch circuit;
the two paths of input signals are respectively and correspondingly input into the two paths of charging circuits for voltage division, and then delayed charging voltages are respectively input into the two corresponding paths of comparison circuits and are compared with reference voltages provided by a precision reference circuit; when the charging voltage exceeds the reference voltage, the output voltage of the corresponding comparison circuit jumps; the comparison circuit outputs the jump signal to a corresponding pulse circuit, the pulse circuit is triggered to generate a pulse signal, the pulse signal is input to an OR gate circuit, the pulse signal is inverted by the OR gate circuit, and the pulse signal is input to open a power switch circuit to provide a current pulse output signal for a load.
2. The low temperature drift delay driving controller according to claim 1, wherein each charging circuit comprises a voltage dividing resistor and a first capacitor;
the input step signal is subjected to voltage division treatment through the voltage division resistor and then charges the first capacitor, and the charging voltage of the first capacitor is connected to the comparison circuit.
3. The low temperature drift delay drive controller according to claim 1, wherein each of the comparison circuits comprises a comparator; the positive input end of the comparator is connected with the output end of the charging circuit; and the negative input end of the comparator is connected with the reference voltage generated by the precision reference circuit.
4. The low temperature drift delay drive controller of claim 1, wherein a precision voltage regulator in the precision reference circuit generates a 5V reference voltage.
5. The low temperature drift delay drive controller according to claim 1, wherein each pulse circuit comprises a one-shot flip-flop;
when a signal jumping from 0 level to high level is input to the trigger input end of the one-shot trigger, one output end of the one-shot trigger is triggered to output a pulse with low level to an OR gate circuit.
6. The low temperature drift delay drive controller according to claim 1, wherein the or gate circuit comprises a first nor gate, a second nor gate, a first diode, and a second diode;
the output ends of the two paths of pulse circuits are respectively and correspondingly connected to one input end of the first NOR gate and the second NOR gate, and the other input ends of the first NOR gate and the second NOR gate are grounded; the output ends of the first NOR gate and the second NOR gate are respectively and correspondingly connected with the positive ends of the first diode and the second diode; the negative ends of the first diode and the second diode are grounded.
7. The low temperature drift delay drive controller of claim 1, wherein the power switch circuit comprises a triode; the base electrode of the triode is connected with the output end of the OR gate circuit; the collector of the triode is connected to a power supply VCC; the emitter of the triode is grounded through a load.
CN201910971469.2A 2019-10-14 2019-10-14 Low temperature floats time delay drive controller Active CN110673683B (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613519A (en) * 1984-06-15 1986-01-09 Mitsubishi Electric Corp Pulse circuit
CN101820162A (en) * 2010-05-18 2010-09-01 北京星网锐捷网络技术有限公司 Overcurrent protector
CN201844765U (en) * 2010-10-29 2011-05-25 北京矿冶研究总院 Time-delay exploder
CN102394613A (en) * 2011-10-24 2012-03-28 中国兵器工业集团第二一四研究所苏州研发中心 Single pulse power supply time delay circuit
CN107020252A (en) * 2017-06-05 2017-08-08 佛山科学技术学院 A kind of delay circuit of motion control
CN107450377A (en) * 2017-09-11 2017-12-08 北方电子研究院安徽有限公司 A kind of delay control circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613519A (en) * 1984-06-15 1986-01-09 Mitsubishi Electric Corp Pulse circuit
CN101820162A (en) * 2010-05-18 2010-09-01 北京星网锐捷网络技术有限公司 Overcurrent protector
CN201844765U (en) * 2010-10-29 2011-05-25 北京矿冶研究总院 Time-delay exploder
CN102394613A (en) * 2011-10-24 2012-03-28 中国兵器工业集团第二一四研究所苏州研发中心 Single pulse power supply time delay circuit
CN107020252A (en) * 2017-06-05 2017-08-08 佛山科学技术学院 A kind of delay circuit of motion control
CN107450377A (en) * 2017-09-11 2017-12-08 北方电子研究院安徽有限公司 A kind of delay control circuit

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