CN110661402B - Self-adaptive ZVS circuit and control method thereof - Google Patents

Self-adaptive ZVS circuit and control method thereof Download PDF

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Publication number
CN110661402B
CN110661402B CN201910935198.5A CN201910935198A CN110661402B CN 110661402 B CN110661402 B CN 110661402B CN 201910935198 A CN201910935198 A CN 201910935198A CN 110661402 B CN110661402 B CN 110661402B
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power supply
voltage
inductor
switching tube
output
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CN110661402A (en
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卢鹏飞
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Mornsun Guangzhou Science and Technology Ltd
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Mornsun Guangzhou Science and Technology Ltd
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Priority to PCT/CN2020/100117 priority patent/WO2021057158A1/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a self-adaptive ZVS circuit and a control method thereof, wherein the self-adaptive ZVS circuit comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and double comparison units; the drain of the switch tube Q1 and one input end of the double comparison unit are connected to a power supply V1, the source of the switch tube Q1, the drain of the switch tube Q2 and the other input end of the double comparison unit are connected to one end of an inductor L1, the source of the switch tube Q2 is connected to a power supply V2, and the other end of the inductor L1 is connected to the power supply V3. The invention utilizes the definition of generalized ZVS, can simply and rapidly judge whether the switching tube realizes ZVS switching-on through the double comparison units, and tell whether the control circuit regulates the next period and how to regulate the circuit time sequence to realize the self-adaptive ZVS switching-on of the switching tube.

Description

Self-adaptive ZVS circuit and control method thereof
Technical Field
The present invention relates to switching power supplies, and more particularly, to an adaptive ZVS switching converter circuit and a control method thereof.
Background
Fig. 1 is a Buck circuit with a synchronous rectification function, fig. 2 is a timing diagram corresponding to fig. 1, and a condition for implementing ZVS turning-on of the MOS transistor Q1 is to turn off the MOS transistor Q2 when a current IL of the inductor L is a certain negative current at time t 2; when the MOS transistor Q2 is turned off at time t1, the current IL of the inductor L at time t1 is greater than the current at time t2, so that the condition for achieving ZVS turning-on is lost for the MOS transistor Q1, as shown by the dotted line in fig. 2, and therefore, the absolute value of the negative current at the time when the MOS transistor Q2 is turned off must be sufficiently large, but if the absolute value of the negative current is too large, although ZVS turning-on of the MOS transistor Q1 is achieved, unnecessary current is generated to circulate in the inductor L, and the circuit efficiency is reduced. Therefore, the absolute value of the negative current at the turn-off time of the MOS transistor Q2 must be a proper value, which cannot be too large or too small. With the application of soft switching technology, the switching frequency of the circuit is higher and higher, the inductance of the inductor is smaller and smaller, and the time left for the detection circuit and the control circuit is smaller and smaller, so that the technical problem of overcoming the requirement of controlling the negative current flowing through the inductor L to be at an appropriate value becomes a technical problem.
Fig. 3, 4 and 5 are abstracts OF U.S. patent application No. 13/027,830 entitled ADAPTIVE CONTROL OF SWITCHING POWER IN POWER CONVERTERS, which is based on the inventive concept OF detecting when the polarity OF the current IL IN the inductor L OF fig. 3 is reversed by the current reversal detector 214 OF fig. 4 and providing a high output signal to the controller 202 and the timer 218 to cause the output OF the controller 202 to go low and the output OF the timer 218 to go high and start counting, causing the output OF the corresponding or gate 216 to remain high and maintaining the switch S2 OF fig. 3 conductive. The sample and hold circuit 222 samples and holds the Vs voltage at time t7 of FIG. 5, and then the Vin signal is used as the input to the error amplifier 220And generates an error signal e2The timer 218 receives the error signal e2And adjusts the count time of the timer 218, which corresponds to the period t3 to t4 in fig. 5, i.e.: the duration of the negative current of the inductor L is adjusted by detecting the Vs voltage at the time t7, so that the negative current of the inductor L is adjusted to an appropriate value, the loss is reduced to the maximum extent, and the power supply efficiency is improved. However, the Vs voltage is continuously and rapidly changed, and the Vs voltage at the time t7 is particularly difficult to sample and hold, regardless of a digital circuit or an analog circuit, so that the adaptive ZVS is difficult to realize.
Disclosure of Invention
In view of the technical defects of the existing self-adaptive ZVS circuit, the technical problem to be solved by the invention is to provide the self-adaptive ZVS circuit and the control method thereof, the self-adaptive ZVS switching-on of the switching tube is realized through a double comparison mode, and the self-adaptive ZVS circuit has the advantages of simple circuit, easiness in realization and low cost, reduces the loss to the maximum extent and improves the power supply efficiency.
In order to achieve the purpose, the invention adopts the following technical scheme:
an adaptive ZVS circuit, comprising: the power supply comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and a double comparison unit; the voltage of the power supply V1 is higher than that of the power supply V2, and the voltage of the power supply V3 is higher than that of the power supply V2; the drain of the switching tube Q1 and one input end of the double comparison unit are connected to a power supply V1, the source of the switching tube Q1, the drain of the switching tube Q2 and the other input end of the double comparison unit are connected to one end of an inductor L, the source of the switching tube Q2 is connected to a power supply V2, and the other end of the inductor L is connected to a power supply V3;
the double comparison unit is provided with a comparator COMP1 and a comparator COMP2, one input end of the comparator COMP1 is connected with the power supply V1, and the other input end of the comparator COMP1 is connected with one end of the inductor L; an input end of the comparator COMP2 is connected to the power supply V1 after being added with a bias voltage, and the other input end of the comparator COMP2 is connected to one end of the inductor L.
Preferably, the inductor L is an inductor or a winding of a transformer.
Preferably, the dual comparison unit is two comparators.
As a first embodiment of the comparator, two input terminals of the comparator are respectively connected to the power supply V1 and one end of the inductor L.
As a second embodiment of the comparator, at least one of the two input terminals of the comparator is connected to the power supply V1 and one end of the inductor L after adding a bias voltage.
As a third embodiment of the comparator, one end of the power supply V1 and one end of the inductor L are respectively connected to two input ends of the comparator after passing through the voltage dividing circuit.
As an embodiment of the voltage dividing circuit, the voltage dividing circuit is a series-connected voltage dividing circuit of a plurality of resistors or a series-connected voltage dividing circuit of a plurality of resistors connected in series with a voltage source, a constant current source or a voltage stabilizing device.
The invention also provides a control method of the self-adaptive ZVS circuit, which is characterized in that: in the time period from the turn-off time of the switching tube Q2 to the turn-on time of the switching tube Q1, according to the voltage of the power supply V1, the voltage of one end of the inductor L and the double comparison units obtain two paths of high and low level outputs, and then relative to the turn-off time of the switching tube Q2 in the current period, the two paths of high and low level outputs of the double comparison units are used for adjusting the switching tube Q2 to be kept in the next period, and turn-off is carried out in advance or delayed.
The invention also provides another switch converter with the same inventive concept, and the technical scheme is as follows: an adaptive ZVS circuit comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and a double comparison unit; the voltage of the power supply V1 is higher than that of the power supply V2, and the voltage of the power supply V3 is higher than that of the power supply V2;
the drain of the switching tube Q1 is connected to the power supply V1, the source of the switching tube Q1, the drain of the switching tube Q2 and one input end of the double comparison unit are connected to one end of the inductor L, the source of the switching tube Q2 and the other input end of the double comparison unit are connected to the power supply V2, and the other end of the inductor L is connected to the power supply V3;
the double comparison unit is provided with a comparator COMP1 and a comparator COMP2, one input end of the comparator COMP1 is connected with the power supply V2, and the other input end of the comparator COMP1 is connected with one end of the inductor L; an input end of the comparator COMP2 is connected to one end of the inductor L after adding a bias voltage, and the other input end of the comparator COMP2 is connected to the power supply V2.
Preferably, the inductor L is an inductor or a winding of a transformer.
Preferably, the dual comparison unit is two comparators.
As a first embodiment of the above comparator, two input terminals of the comparator are respectively connected to the power supply V2 and one end of the inductor L.
As a second embodiment of the comparator, at least one of the two input terminals of the comparator is connected to the power supply V2 and one end of the inductor L after adding a bias voltage.
The invention also provides a control method of the self-adaptive ZVS circuit, which is characterized in that: in the time period from the turn-off time of the switching tube Q1 to the turn-on time of the switching tube Q2, according to the voltage of the power supply V2, the voltage of one end of the inductor L and the double comparison units obtain two paths of high and low level outputs, and then relative to the turn-off time of the switching tube Q1 in the current period, the two paths of high and low level outputs of the double comparison units are used for adjusting the switching tube Q1 to be kept in the next period, and turn-off is carried out in advance or delayed.
Description of the meaning of the terms:
drain electrode of the switching tube: for the MOS tube, a drain electrode is referred, for the triode, a collector electrode is referred, for the IGBT, a drain electrode is referred, and other switching tubes can correspond to each other according to the knowledge of a person skilled in the art and are not listed one by one;
source electrode of the switching tube: for the MOS transistor, the source electrode, the emitter electrode, and the source electrode, the other switching transistors may correspond to each other according to the knowledge of those skilled in the art, and are not listed.
Compared with the prior art, the invention has the following beneficial effects:
1) the self-adaptive ZVS (zero voltage switching) switching-on of the switching tube is realized by adopting a double comparison mode, the circuit is simple and easy to realize, the cost is low, and the circuit is particularly suitable for occasions with high switching frequency to realize the self-adaptive ZVS switching-on of the switching tube;
2) the highest voltage at one end of the inductor L in the time period from the turn-off time of the switching tube Q2 to the turn-on time of the switching tube Q1 or the lowest voltage at one end of the inductor L in the time period from the turn-off time of the switching tube Q1 to the turn-on time of the switching tube Q2 is controlled in a proper range in a double comparison mode, and the highest or lowest voltage at one end of the inductor L is positively correlated with the current of the inductor L for realizing the turn-on of the switching tube ZVS, so that the current is stably regulated to a proper value, the loss is reduced to the maximum extent, and the power supply efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a Buck circuit with synchronous rectification function;
FIG. 2 is a timing diagram of the operation of FIG. 1;
FIG. 3 is a schematic diagram of a Buck circuit of application number 13/027,830;
FIG. 4 is a block diagram of the adaptive ZVS control of application No. 13/027,830;
FIG. 5 is a timing diagram illustrating the operation of application number 13/027,830;
FIG. 6 is a functional block diagram of the present invention;
FIG. 7 is another functional block diagram of the present invention;
FIG. 8 is a schematic diagram of an adaptive ZVS circuit using dual compare units according to the first embodiment of the present invention;
FIG. 9 is a timing diagram illustrating the operation of the first embodiment of the present invention;
FIG. 10 is a truth table of the first embodiment of the present invention;
FIG. 11 is a schematic diagram of an adaptive ZVS circuit using dual compare units according to a second embodiment of the present invention;
FIG. 12 is a schematic diagram of an adaptive ZVS circuit using dual compare units according to a third embodiment of the present invention;
fig. 13 is a truth table of the third embodiment of the present invention.
Detailed Description
FIG. 6 is a schematic block diagram of the present invention, which includes a power supply V1, a power supply V2, a power supply V3, a switch Q1, a switch Q2, an inductor L and a dual comparison unit; the drain of the switching tube Q1 and one input end of the double comparison unit are connected to a power supply V1, the source of the switching tube Q1, the drain of the switching tube Q2 and the other input end of the double comparison unit are connected to one end of an inductor L, the source of the switching tube Q2 is connected to a power supply V2, and the other end of the inductor L is connected to a power supply V3; the voltage of the power supply V1 is higher than the voltage of the power supply V2, and the voltage of the power supply V3 is higher than the voltage of the power supply V2.
Fig. 7 is another functional block diagram of the present invention. The power supply comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and a double comparison unit; the drain of the switch tube Q1 is connected to a power supply V1, the source of the switch tube Q1, the drain of the switch tube Q2 and one input end of the double comparison unit are connected to one end of an inductor L, the source of the switch tube Q2 and the other input end of the double comparison unit are connected to a power supply V2, and the other end of the inductor L is connected to a power supply V3; the voltage of the power supply V1 is higher than the voltage of the power supply V2, and the voltage of the power supply V3 is higher than the voltage of the power supply V2.
Coss1 and Coss2 in fig. 6 and fig. 7 are output capacitances of the switching tube Q1 and the switching tube Q2, respectively, and D1 and D2 are body diodes of the switching tube Q1 and the switching tube Q2, respectively.
According to the inventive concept, effects of the related embodiments will be described below with reference to the accompanying drawings. It should be noted that: it is common practice for those skilled in the art to replace the switching tube Q1 and the switching tube Q2 with MOS transistors, triodes, IGBTs, or other types of switching tubes.
First embodiment
Fig. 8 is a schematic diagram of an adaptive ZVS circuit according to this embodiment, which employs a dual comparison unit including a comparator COMP1, a comparator COMP2, and a voltage source U; the reverse terminal of the comparator COMP1 and the positive terminal of the voltage source U are connected to the power source V1, the negative terminal of the voltage source U is connected to the reverse terminal of the comparator COMP2, the positive terminal of the comparator COMP1 and the positive terminal of the comparator COMP2 are connected to the node SW (i.e., one terminal of the inductor L), the output terminals of the comparator COMP1 and the comparator COMP2 are connected to the anodes of the diodes D3 and D4, respectively, and the cathodes of the diodes D3 and D4 are connected to the output C1 and the output C2, respectively.
The working time of the double comparison unit is from the moment that the switch tube Q2 is turned off to the moment that the switch tube Q1 is turned on, and the working principle is as follows:
for comparator COMP 1: the voltage of the power supply V1 and the voltage of the node SW (i.e., at the end of the inductor L) are respectively used as the reverse and forward inputs of the comparator COMP1 to compare, and if the voltage of the node SW (i.e., at the end of the inductor L) is greater than the voltage of V1, the output C1 is at a high level, which indicates that the negative current is too large, and the switching tube Q2 needs to be turned off in advance in the next cycle relative to the current cycle.
For comparator COMP 2: after the bias voltage U is added to the voltage of the power supply V1, the voltage of the node SW (i.e., one end of the inductor L) is respectively used as the reverse input and the forward input of the comparator COMP2 for comparison, if the voltage of the node SW (i.e., one end of the inductor L) is not greater than the voltage V1-U, the output C2 is low, which indicates that the negative current is too small, and the switching tube Q2 needs to be turned off after the next period is delayed relative to the current period.
If the voltage at the node SW (i.e., at the end of the inductor L) is not greater than the voltage of the power supply V1, the output C1 is low, and if the voltage at the circuit node SW (i.e., at the end of the inductor L) is greater than the voltage V1-U, the output C2 is high, and no early or late turn-off operation of the transistor Q2 is required with respect to the current cycle.
In a narrow sense, ZVS (zero voltage switching) on of the switching tube means that the switching tube is switched on when the voltage difference between the drain electrode and the source electrode is 0V; in a broad sense, ZVS switching on of a switching tube means that the switching tube is switched on when the voltage difference between the drain and the source of the switching tube is lower than a certain voltage. According to the actual debugging result of the circuit, the difference between narrow-sense ZVS turn-on and generalized ZVS turn-on is small, the generalized ZVS is utilized, the switching tube Q1 can be considered to realize ZVS turn-on as long as the voltage of the node SW (namely one end of the inductor L) can reach between V1 voltage and V1-U voltage in the dead zone time period from the turn-off time of the switching tube Q2 to the turn-on time of the switching tube Q1, whether the switching tube Q1 realizes ZVS turn-on can be judged only by two comparison units, and then the turn-off time of the switching tube Q2 is adjusted in the next cycle according to the judged result. The invention is especially suitable for occasions with higher switching frequency because of the extremely fast comparison speed, and compared with the invention patent with the application number of 13/027,830, the invention has the advantages of simple and easily realized circuit, low cost, easy high-frequency application, reduced loss to the maximum extent and improved power supply efficiency because the core device is the comparator.
Fig. 9 shows the operation sequence of the first embodiment, assuming that the voltage of the power supply V1 is greater than the voltage of the power supply V3, as follows:
stage t 0-t 1: at time t0, switching tube Q1 is turned on, the voltage across inductor L is V1-V3, inductor L is excited, the current IL of inductor L rises, and switching tube Q1 is turned off at time t 1;
stage t 1-t 2: after the switching tube Q1 is turned off, the current IL of the inductor L charges the output capacitor Coss1 of the switching tube Q1 and discharges the output capacitor Coss2 of the switching tube Q2. At time t2, the voltage of the circuit node SW (i.e. one end of the inductor L) is reduced from V1 to V2, and the switching tube Q2 realizes ZVS switching-on;
stage t 2-t 4: the voltage at two ends of the inductor L is V3-V2, the inductor L is demagnetized, the current IL is reduced to 0A at the time of t3, and the switching tube Q2 is turned off at the time of t 4;
stage T4-T0 + T: the current IL of the inductor L charges the output capacitor Coss2 of the switching tube Q2, discharges the output capacitor Coss1 of the switching tube Q1, and turns on the switching tube Q1 at time T0+ T. When the highest voltage of the circuit node SW (i.e. one end of the inductor L) is between V1-U and V1 from time T4 to time T0+ T, according to the definition of generalized ZVS: the switching tube Q1 realizes ZVS opening;
the cycle is ended and the next duty cycle is started and the above stages are repeated.
If the switching tube Q2 is at t'4Time point is OFF, and waveform is shown by long dashed line, t 'in FIG. 9'4The voltage at the circuit node SW (i.e., at the end of the inductor L) is lower than V1-U until time T0+ T, and the next period is extended by T3 to T'4The time length is prolonged according to the set stepping time length, and each period is subjected to accumulation adjustment until t'4The highest voltage at node SW (i.e., at the end of inductor L) is between V1-U and V1 by time T0+ T.
If the switch tube Q2 is at t ″)4At the moment of time, the waveform is shown by the short dashed line, t ″, in FIG. 94To tThe highest voltage of the circuit node SW (i.e. one end of the inductor L) at the time 0+ T is greater than V1, and is clamped to V1+ Vf by the body diode D1 of the switch tube Q1, and Vf is the conduction voltage drop of the body diode D1, so that T3 to T ″ are reduced in the next period4The time length of the time length is reduced according to the set stepping time length, and the accumulated adjustment is carried out in each period until t ″4The highest voltage at node SW (i.e., at the end of inductor L) is between V1-U and V1 by time T0+ T.
The highest voltage of the circuit node SW (namely one end of the inductor L) from time T4 to time T0+ T is determined by the comparator COMP1 and the comparator COMP2, the highest voltage is denoted as SWM4, the obtained truth table is shown in fig. 10, whether the time length from T3 to T4 is prolonged, reduced or unchanged in the next period is determined according to fig. 10, when C1 or C2 is at a high level, the diode connected by the output of the comparator COMP1 and the comparator COMP2 is used for keeping the high level of C1 or C2, and the C1 and C2 are reset once in each period.
Since the circuit operates periodically, T in T0+ T means the time length of one cycle.
Second embodiment
Fig. 11 is a schematic circuit diagram of a second embodiment of the present invention. On the basis of the first embodiment, the problem that the voltage at one end of the power supply V1 and the inductor L exceeds the maximum withstand voltage of the input end of the comparison unit is mainly solved by the voltage dividing circuit, which is to change the direct connection between the input ends of the comparator COMP1 and the comparator COMP2 from the direct connection between the power supply V1 and the node SW (i.e. one end of the inductor L) to the indirect connection through the voltage dividing circuit, and replace the voltage supply U with the voltage stabilizing device Z1.
The second embodiment is similar in operation to the first embodiment except that the power supply V1 and one end of the inductor L are scaled down and the voltage U of the voltage source U in the first embodiment is equivalently replaced by the nominal regulated value Z of the regulator device Z1. Other contents are not described in detail herein.
Third embodiment
Fig. 12 is a circuit schematic of a third embodiment of the present invention. The included devices are substantially the same as the first embodiment, the main difference being the connection relationship: the reverse terminal of the comparator COMP1 and the forward terminal of the voltage source U are connected to the node SW (i.e., one terminal of the inductor L), and the forward terminal of the comparator COMP1 and the forward terminal of the comparator COMP2 are connected to the power source V2.
The third embodiment still uses the principle of generalized ZVS, the whole operation process and principle are similar to the first embodiment, and the difference is that the lowest voltage of the circuit node SW (i.e. one end of the inductor L) at time t1 to t2 in fig. 9 is determined by the comparator COMP1 and the comparator COMP2, the lowest voltage is denoted as SWm1, the obtained truth table is shown in fig. 13, the truth table determines whether the time duration from t0 to t1 is prolonged, reduced or unchanged in the next period, when C1 or C2 is at a high level, the diode connected to the output of the comparator COMP1 and the comparator COMP2 is used to maintain the high level of C1 or C2, and the reset is performed once for C1 and C2 in each period. Other contents are not described in detail herein.
The above embodiments should not be construed as limiting the present invention, and the scope of the present invention should be determined by the scope of the appended claims. It will be apparent to those skilled in the art that many equivalent substitutions, modifications and alterations can be made without departing from the spirit and scope of the invention, such as fine tuning of the circuit by simple series-parallel connection of devices, etc., depending on the application, and such modifications and alterations should also be considered as the scope of the invention.

Claims (8)

1. An adaptive ZVS circuit, comprising: the power supply comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and a double comparison unit; the voltage of the power supply V1 is higher than that of the power supply V2, and the voltage of the power supply V3 is higher than that of the power supply V2;
the drain of the switching tube Q1 and one input end of the double comparison unit are connected to a power supply V1, the source of the switching tube Q1, the drain of the switching tube Q2 and the other input end of the double comparison unit are connected to a first end of an inductor L, the source of the switching tube Q2 is connected to a power supply V2, and the second end of the inductor L is connected to a power supply V3;
the double comparison unit is provided with a comparator COMP1 and a comparator COMP2, wherein the negative input end of the comparator COMP1 is connected with a power supply V1, the positive input end of the comparator COMP1 is connected with the first end of the inductor L, the output end of the comparator COMP1 is connected with the anode of a diode D3, and the cathode of the diode D3 is connected with the output C1; a negative input end of the comparator COMP2 is connected to a power supply V1 after being added with a bias voltage, a positive input end of the comparator COMP2 is connected to a first end of the inductor L, an output end of the comparator COMP2 is connected to an anode of the diode D4, and a cathode of the diode D4 is connected to the output C2;
in a time period from the turning-off time of the switching tube Q2 to the turning-on time of the switching tube Q1, the comparator COMP1 compares the voltage of the power supply V1 with the voltage of the first end of the inductor L, and if the voltage of the first end of the inductor L is greater than the voltage of the power supply V1, the output C1 is a high level, which indicates that the negative current is too large, and the switching tube Q2 needs to be turned off in advance in the next period relative to the current period;
the comparator COMP2 compares the voltage of the power supply V1 with the voltage of the first end of the inductor L after adding the bias voltage, and if the voltage of the first end of the inductor L is smaller than the voltage of the power supply V1 minus the bias voltage, the output C2 is at a low level, which indicates that the negative current is too small, and the switching tube Q2 needs to be turned off after the next cycle relative to the current cycle;
if the voltage of the first terminal of the inductor L is greater than or equal to the voltage of the power supply V1 minus the bias voltage and less than or equal to the voltage of the power supply V1, the output C1 is low, and the output C2 is high, so that the switching transistor Q2 does not need to be turned off in advance or in a delayed manner in the next cycle with respect to the current cycle.
2. The adaptive ZVS circuit of claim 1, wherein: the inductor L is an inductor or a winding of a transformer.
3. The adaptive ZVS circuit of claim 1, wherein: the first ends of the power supply V1 and the inductor L are respectively connected to the two input ends of the dual comparison unit after passing through the voltage division circuit.
4. The adaptive ZVS circuit of claim 3, wherein: the voltage division circuit is formed by connecting a plurality of resistors in series.
5. A control method of an adaptive ZVS circuit, which is applied to the adaptive ZVS circuit as claimed in any one of claims 1-4.
6. An adaptive ZVS circuit, comprising: the power supply comprises a power supply V1, a power supply V2, a power supply V3, a switching tube Q1, a switching tube Q2, an inductor L and a double comparison unit; the voltage of the power supply V1 is higher than that of the power supply V2, and the voltage of the power supply V3 is higher than that of the power supply V2;
the drain of the switching tube Q1 is connected to the power supply V1, the source of the switching tube Q1, the drain of the switching tube Q2 and one input end of the double comparison unit are connected to the first end of the inductor L, the source of the switching tube Q2 and the other input end of the double comparison unit are connected to the power supply V2, and the second end of the inductor L is connected to the power supply V3;
the double comparison unit is provided with a comparator COMP1 and a comparator COMP2, wherein a positive input end of the comparator COMP1 is connected with a power supply V2, a negative input end of the comparator COMP1 is connected with a first end of an inductor L, an output end of the comparator COMP1 is connected with an anode of a diode D3, and a cathode of a diode D3 is connected with an output C1; a negative input end of the comparator COMP2 is connected to a first end of the inductor L, a positive input end of the comparator COMP2 is connected to a power supply V2 after a bias voltage is added, an output end of the comparator COMP2 is connected to an anode of the diode D4, and a cathode of the diode D4 is connected to the output C2;
in a time period from the turning-off time of the switching tube Q1 to the turning-on time of the switching tube Q2, the comparator COMP1 compares the voltage of the power supply V2 with the voltage of the first end of the inductor L, and if the voltage of the first end of the inductor L is smaller than the voltage of the power supply V2, the output C1 outputs a high level, which indicates that the negative current is too large, and the switching tube Q1 needs to be turned off in advance in the next period relative to the current period;
the comparator COMP2 compares the voltage of the power supply V2 with the voltage of the first end of the inductor L after adding the bias voltage, and if the voltage of the first end of the inductor L is greater than the voltage of the power supply V2 plus the bias voltage, the output C2 outputs a low level, which indicates that the negative current is too small, and the switching tube Q1 needs to be turned off after the next cycle relative to the current cycle;
if the voltage at the first end of the inductor L is greater than or equal to the voltage of the power supply V2 and less than the voltage of the power supply V2 plus the bias voltage, the output C1 is at a low level and the output C2 is at a high level, so that the switch tube Q1 does not need to be turned off in advance or in a delayed manner in the next cycle with respect to the current cycle.
7. The adaptive ZVS circuit of claim 6, wherein: the inductor L is an inductor or a winding of a transformer.
8. A control method of an adaptive ZVS circuit, adapted to the adaptive ZVS circuit of any one of claims 6-7.
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