CN110660882B - 一种栅控PIN结构GaN紫外探测器及其制备方法 - Google Patents
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Abstract
本发明公开了一种栅控PIN结构GaN紫外探测器及其制备方法,包括:1)衬底上依次生长GaN缓冲层和n型掺杂GaN层;2)n型掺杂GaN层上生长本征掺杂GaN层;3)本征掺杂GaN层上生长p型掺杂AlGaN层;4)选择性刻蚀外延层材料形成刻蚀台面和双台阶;5)在台面和双台阶上淀积钝化层;6)刻蚀钝化层形成电极孔,并沉积金属电极。本发明是基于PIN结构,因此能够实现快速、准确、高灵敏度的紫外光探测;其次,通过侧栅结构施加的电压能够抑制或消除AlGaN/GaN异质界面处的二维电子气的影响,形成理想型的PIN结构探测器,可以提高探测器的响应速度、探测率、灵敏度等性能。
Description
技术领域
本发明涉及紫外探测领域,具体为一种栅控PIN结构GaN紫外探测器及其制备方法。
背景技术
GaN是典型的第三代宽禁带半导体材料,其禁带宽度高达3.4eV,是目前发展紫外探测器的核心材料,非常适用于高度集成的电子器件及光电子器件。但是由于AlGaN/GaN异质结自身具有极强的自发极化效应和压电极化效应,导致在异质界面形成高达1012cm-2的二维电子气(two dimensional electron gas,2DEG)。因此,对于PIN结构的p+-AlGaN/i-GaN/n+-GaN紫外探测器来说,本征GaN材料性质会受到AlGaN/GaN异质界面2DEG的影响和抑制,比如PIN结构耗尽区内电场大小、耗尽区宽度以及光生载流子的收集效率等性能参数。最终结果会导致探测器的量子效率下降、响应率低、响应频率变慢以及灵敏度低等缺点和不足。
发明内容
基于上述提到的GaN紫外探测器所遇到的问题以及发展需求,本发明创新性的提出了一种栅控PIN结构GaN紫外探测器及其制备方法,不仅能够通过侧栅调节抑制AlGaN/GaN异质界面处的2DEG浓度,而且能够简单便捷地实现理想型PIN结构探测器,以满足快速、高灵敏的紫外探测。
具体方法包括
1)衬底上依次生长GaN缓冲层和n型掺杂GaN层;
2)所述n型掺杂GaN层上生长本征掺杂GaN层;
3)所述本征掺杂GaN层上生长p型掺杂AlGaN层;
4)刻蚀所述本征掺杂GaN层和p型掺杂AlGaN层形成第一台阶和第二台阶;
5)在所述第一台阶和所述第二台阶表面沉积钝化层;
6)刻蚀所述p型掺杂AlGaN层上和所述n型掺杂GaN层上的钝化层分别形成源极孔和漏极孔;
7)在所述源极孔和漏极孔分别沉积源电极和漏电极;
8)在所述本征掺杂GaN层的侧面钝化层上沉积栅电极。
为了降低和抑制异质界面处的高密度2DEG的影响,本发明在原有的PIN结构基础上增加一个侧栅结构,通过侧栅电压来抵消界面极化电荷效应影响,实现真正本征型GaN吸收层,以提高PIN结构GaN紫外探测器的探测性能。
优选地,所述1)中的GaN缓冲层厚度为0.2μm~4μm;所述n型掺杂GaN层厚度为0.25μm~1μm,掺杂浓度为1×1018cm-3~5×1018cm-3,掺杂元素为硅;
优选地,所述2)中的本征掺杂GaN层厚度为0.1μm~3μm;
优选地,所述3)中的p型掺杂AlGaN层厚度为0.1μm~2μm,掺杂浓度为1×1018cm-3~5×1018cm-3,掺杂元素为镁;
优选地,所述4)中第一台阶高度小于第二台阶高度。
优选地,所述4)中第一台阶位于GaN与AlGaN的异质界面;所述台阶宽度为1μm~100μm;
优选地,所述5)中的钝化层厚度为20nm~200nm;所述钝化层材料为氧化铝。
优选地,所述8)中,本征掺杂GaN层两个侧面分别沉积第一栅电极和第二栅电极。
优选地,所述8)中,栅电极材料选自Au、Ag、Al;所述栅电极厚度为0.2μm~10μm。
上述方法制得的GaN紫外探测器。
本发明的优点在于:
A.本发明的紫外探测器在结构上是一种PIN光伏探测器,因此具有快速、准确、高灵敏的光电响应特性。
B.本发明的紫外探测器增加了侧栅结构,利用其提供的栅压能够抑制或消除AlGaN/GaN异质界面处的2DEG的影响,形成高纯的本征型GaN吸收层,提高光生载流子的收集效率,提高响应速度、探测率、灵敏度等性能。
C.本发明器件增加了侧栅结构,除了作为高灵敏的紫外探测器,同时提高了发光效率,可作为发光器件。
附图说明
为了使本发明的目的、技术方案和有益效果更加清楚,本发明提供如下附图进行说明:
图1为本发明实施例的二维剖面结构示意图。
图2-4为本发明实施例1-3的制备工艺流程图。
衬底1,GaN缓冲层2,n型掺杂GaN层3,本征掺杂的GaN层4,p型掺杂AlGaN层5,氧化铝钝化层6,源电极7,侧栅电极8,漏电极9。
具体实施方式
下面将结合附图对本发明的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
实施例1
本实施例提供一种栅控PIN结构GaN紫外探测器,器件的剖面如图1所示,由衬底1、GaN缓冲层2、n型掺杂GaN层3、本征掺杂的GaN层4、p型掺杂AlGaN层5、氧化铝钝化层6、源极金属电极7、侧栅金属电极8和漏极金属电极9组成。
基于上述紫外探测器结构,本实施例还提供一种制备其方法,制备工艺流程如图2所示,包括:
1)取样衬底,并用浓磷酸溶液对其表面进行预处理。
2)在衬底之上依次外延生长2μm GaN缓冲层2、0.25μm掺杂浓度为1×1018cm-3,掺杂元素为硅的n型GaN层3、1μm本征掺杂GaN层4、0.5μm掺杂浓度为1×1018cm-3,掺杂元素为镁的p型AlGaN层5。
3)使用感应耦合等离子体(ICP)刻蚀设备,结合刻蚀掩膜,选择性刻蚀外延材料,刻蚀本征掺杂GaN层和p型掺杂AlGaN层,形成刻蚀台面和第一台阶、第二台阶,其中第一台阶比第二台阶高,第一台阶的刻蚀深度至n型掺杂GaN层3,第二台阶的刻蚀深度至AlGaN/GaN的异质界面即本征掺杂GaN层4,第二台阶宽度10μm。
4)利用原子层沉积(ALD)设备,在暴露出的n型掺杂GaN层、本征掺杂GaN层和p型掺杂AlGaN层形成的台阶和台面及本征掺杂GaN层侧面沉积20nm厚的氧化铝钝化层(Al2O3)6。
5)通过光刻和选择性刻蚀工艺,在氧化铝介质层6刻蚀出源极电极孔和漏极电极孔,其中源极电极孔位于AlGaN外延材料上方,漏极电极孔位于刻蚀槽内n型GaN上方。
6)利用光刻、金属蒸镀技术,淀积源电极7、和漏电极9,在本征掺杂GaN层左右侧面的氧化铝钝化层上沉积两个栅电极。通过适当的退火工艺和源漏极金属材料的选择确保金属电极与外延材料之间形成良好的欧姆接触。
如图1所示,其中本征掺杂GaN层的禁带宽度为3.4eV,作为探测器的吸收层材料,能够吸收波长短于280nm的紫外光。当GaN吸收紫外光子后,会在体内形成大量的光生载流子,并在内建电场的作用下光生载流子会快速分离,并在P、N两端积累产生光生电压信号。但是由于AlGaN/GaN异质结具有很强的自发极化效应和压电极化效应,因此在异质界面会形成很高密度的2DEG,而且这些高密度2DEG会影响PIN结构内的pn结电场、耗尽区宽度和载流子收集效率。当在本征GaN层上增加一个栅压后,偏置栅压会调节或抑制极化效应产生的2DEG,形成一个高纯本征型GaN吸收层,因此在p+-AlGaN/i-GaN异质界面会形成一个理想型的PIN结结构,以此来提高光生载流子分离和收集效率。此外,宽禁带的GaN吸收材料本身具有很低的复合暗电流,因此本发明能够实现快速、高灵敏的紫外光探测。
实施例2
本实施例提供一种栅控PIN结构GaN紫外探测器制备方法,,包括:
1)取样衬底,并用浓磷酸溶液对其表面进行预处理。
2)在衬底之上依次外延生长3μm GaN缓冲层2、0.5μm掺杂浓度为2×1018cm-3,掺杂元素为硅的n型GaN层3、2μm本征掺杂GaN层4、1μm掺杂浓度为2×1018cm-3,掺杂元素为镁的p型GaN层5;
3)使用感应耦合等离子体(ICP)刻蚀设备,结合刻蚀掩膜,选择性刻蚀外延材料,刻蚀本征掺杂GaN层和p型掺杂AlGaN层,形成刻蚀台面和双台阶,其中深台阶的刻蚀深度至n型掺杂GaN层3,次深台阶的刻蚀深度至AlGaN/GaN的异质界面,次台阶宽度30μm。
4)利用原子层沉积(ALD)设备,在洁净的刻蚀台阶和台面上淀积80nm厚的氧化铝(Al2O3)层6。
5)通过光刻和选择性刻蚀工艺,在氧化铝介质层6刻蚀出源极电极孔和漏极电极孔,其中源极电极孔位于AlGaN外延材料上方,漏极电极孔位于刻蚀槽内n型GaN上方。
6)利用光刻、金属蒸镀技术,淀积源电极7、和漏电极9,在本征掺杂GaN层左右侧面的氧化铝钝化层上沉积两个栅电极。通过适当的退火工艺和源漏极金属材料的选择确保金属电极与外延材料之间形成良好的欧姆接触。
实施例3
本实施例提供一种栅控PIN结构GaN紫外探测器制备方法,具体制备工艺流程如图4所示,包括:
1)取样衬底,并用浓磷酸溶液对其表面进行预处理。
2)在衬底之上依次外延生长4μm GaN缓冲层2、1μm掺杂浓度为4×1018cm-3,掺杂元素为硅的n型GaN层3、3μm本征掺杂GaN层4、2μm掺杂浓度为5×1018cm-3,掺杂元素为镁的p型GaN层5;
3)使用感应耦合等离子体(ICP)刻蚀设备,结合刻蚀掩膜,选择性刻蚀外延材料,刻蚀本征掺杂GaN层和p型掺杂AlGaN层,形成刻蚀台面和双台阶,其中深台阶的刻蚀深度至n型掺杂GaN层3,次深台阶的刻蚀深度至AlGaN/GaN的异质界面,次台阶宽度80μm。
4)利用原子层沉积(ALD)设备,在洁净的刻蚀台阶和台面上淀积200nm厚的氧化铝(Al2O3)层6。
5)通过光刻和选择性刻蚀工艺,在氧化铝介质层6刻蚀出源极电极孔和漏极电极孔,其中源极电极孔位于AlGaN外延材料上方,漏极电极孔位于刻蚀槽内n型GaN上方。
6)利用光刻、金属蒸镀技术,淀积源电极7、和漏电极9,在本征掺杂GaN层左右侧面的氧化铝钝化层上沉积两个栅电极。通过适当的退火工艺和源漏极金属材料的选择确保金属电极与外延材料之间形成良好的欧姆接触,。
最后说明的是,以上优选实施例仅用以说明本发明的技术方案而非限制,尽管通过上述优选实施例已经对本发明进行了详细的描述,但本领域技术人员应当理解,可以在形式上和细节上对其作出各种各样的改变,而不偏离本发明权利要求书所限定的范围。
Claims (9)
1.一种栅控PIN结构GaN紫外探测器制备方法,其特征在于:包括
1)衬底上依次生长GaN缓冲层和n型掺杂GaN层;
2)所述n型掺杂GaN层上生长本征掺杂GaN层;
3)所述本征掺杂GaN层上生长p型掺杂AlGaN层;
4)刻蚀所述本征掺杂GaN层和p型掺杂AlGaN层形成第一台阶和第二台阶;
5)在所述第一台阶和所述第二台阶表面沉积钝化层;
6)刻蚀所述p型掺杂AlGaN层上和所述n型掺杂GaN层上的钝化层形成源极孔和漏极孔;
7)在所述源极孔和漏极孔分别沉积源电极和漏电极;
8)在所述本征掺杂GaN层的两个侧面分别沉积第一栅电极和第二栅电极。
2.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述1)中的GaN缓冲层厚度为0.2μm~4μm;所述n型掺杂GaN层厚度为0.25μm~1μm,掺杂浓度为1×1018cm-3~5×1018cm-3,掺杂元素为硅。
3.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述2)中的本征掺杂GaN层厚度为0.1μm~3μm。
4.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述3)中的p型掺杂AlGaN层厚度为0.1μm~2μm,掺杂浓度为1×1018cm-3~5×1018cm-3,掺杂元素为镁。
5.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述4)中第一台阶高度小于第二台阶高度。
6.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述4)中第一台阶位于本征掺杂GaN层与p型掺杂AlGaN层的异质界面;所述第一台阶宽度1μm~100μm。
7.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述5)中的钝化层厚度为20nm~200nm;所述钝化层材料为氧化铝。
8.根据权利要求1所述的GaN紫外探测器制备方法,其特征在于:所述8)中,栅电极材料选自Au或Ag或Al;所述栅电极厚度为0.2μm~10μm。
9.根据权利要求1-8任一所述方法制得的GaN紫外探测器。
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