CN110659149A - Low-cost hardware watchdog protection circuit design method for low-speed vehicle - Google Patents
Low-cost hardware watchdog protection circuit design method for low-speed vehicle Download PDFInfo
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
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Abstract
The invention discloses a low-cost hardware watchdog protection circuit design method for a low-speed vehicle, which comprises the following steps: s1: a vehicle body control system; s2: a signal output device; s3: a monitoring result output device; s4: a circuit logic conversion device; s5: a level switching device; s6: the hardware switch device uses the single chip as a carrier for controlling a software program, executes a control strategy and logic of the software program, controls the operation of a motor through different commands edited by the software program, thereby realizing different functions, uses a square wave generator to continuously output a square wave signal for the software program, provides the square wave signal for a hardware watchdog protection circuit through a waveform shaping device, continuously monitors the square wave signal by the hardware watchdog protection circuit, controls the single chip through a monitoring result output by a signal output device, and can timely reset the single chip and timely close the continuous output of a power source when the single chip breaks down or the program flies.
Description
Technical Field
The invention relates to the technical field of new energy automobile circuit protection, in particular to a low-cost hardware watchdog protection circuit design method for a low-speed automobile.
Background
The new energy pure electric automobile comprises a low-speed automobile, a commercial vehicle and a passenger car which are all provided with an electric drive system. The electric drive system generally consists of a direct current power source (e.g., a lead-acid battery, a lithium battery system), a motor controller, an electric motor, and necessary control systems. Modern low-speed vehicles are inferior to passenger and commercial vehicles in terms of speed, functional safety and price. The self-recovery circuit is arranged in most of control system electrical appliances, when the circuit system of the common watchdog reset is abnormal, such as a halt and the like, of equipment, the watchdog circuit can initiate reset due to overtime, the circuit is reset, and the circuit is restarted, so that the purpose of automatically restarting the abnormal circuit is achieved.
Because of low price, the convenience is gone out, and the market demand is great in rural area, in current low-speed car motor controller technique, generally for saving cost, use not having expensive integrated reset chip and choose to omit hardware watchdog protect function in functional safety, often appear still can not prosthetic trouble after the watchdog circuit resets, for example the crash that the chip punctures and leads to, in case singlechip software breaks down (like the program runs off) can make the vehicle be in the state of out of control, very dangerous. In the prior art, the low-speed vehicle controller is still in a complete situation in terms of low price and functional safety.
Disclosure of Invention
The invention aims to provide a low-cost hardware watchdog protection circuit design method for a low-speed vehicle, which not only reduces cost pressure, but also can meet functional safety requirements and avoid the situation of complete dilemma. When the single chip microcomputer fails or a program runs away, the single chip microcomputer can be reset in time, and the power source is closed to continuously output, so that the automobile can be effectively controlled, the occurrence of dangerous driving accidents is reduced, and the problems in the background art are solved.
In order to achieve the purpose, the invention provides the following technical scheme: a low-cost hardware watchdog protection circuit design method for a low-speed vehicle is provided, and the brake lamp fault processing method specifically comprises the following steps:
s1: the vehicle body control system utilizes the single chip microcomputer as a carrier for controlling a software program, executes a control strategy and logic of the software program, and controls the motor to operate through different commands edited by the software program, thereby realizing different functions;
s2: the signal output device continuously outputs a square wave signal for the software program by using a square wave generator, and the square wave signal is provided for the hardware watchdog protection circuit by a waveform shaping device, and the hardware watchdog protection circuit continuously monitors the square wave signal;
s3: the monitoring result output device controls the single chip microcomputer through the monitoring result output by the signal output device, and can reset the single chip microcomputer in time and close the power source to continuously output when the single chip microcomputer fails or a program runs off;
s4: the circuit logic conversion device utilizes a triode logic circuit to manufacture all devices and connecting leads of a logic gate circuit on the same semiconductor substrate, the logic gate consists of transistors, and the combination of the transistors can enable high and low levels representing two signals to generate high-level or low-level signals after the high and low levels pass through the transistors;
s5: the level switching device provides a level switching control function for the PWM signal by utilizing the buffer;
s6: and the hardware switching device utilizes the buffer as the hardware switch of the PWM signal.
Preferably, the single chip microcomputer in step S1 includes an arithmetic unit, a controller and a memory, and is integrated on a chip, and when in use, the single chip microcomputer writes out and executes a software program in the form of instructions.
Preferably, the waveform shaping device in step S2 is a resistance-capacitance filter, and is a circuit that uses a resistor and a capacitor to perform filtering, the resistor is connected in series to the output end of the rectifier, the capacitors are connected in parallel to the two ends of the resistor, the filtering efficiency is high, the voltage reduction and current limiting functions can be achieved, and the resistor contained inside the circuit is a cut-off frequency resistor.
Preferably, the monitoring result output device in step S3 is a comparator, and an analog voltage signal is compared with a reference voltage by using the comparator, and the output pin is the collector of a transistor or the drain of an FET, so that the comparator can be modified into a hysteresis comparator and a window comparator to improve its anti-interference capability.
Preferably, the triode logic circuit in step S4 may not only amplify the analog signal, but also be used as a control switch, and the triode used as the switch is in the cut-off and saturation states.
Preferably, in the hardware switching device in step S6, in the test of the PWM device, the direct introduction of the SMB high-frequency cable into the external capacitor end of the device may affect the measurement result of the frequency or time parameter, and the buffer BUF634 is used to isolate the SMB high-frequency cable from the capacitor charge and discharge end of the device, thereby effectively controlling the start and stop of the PWM device.
The invention has the technical effects and advantages that: compared with the prior art, the new energy automobile battery charging method provided by the invention has the following advantages:
1. the monitoring of the operation state of the singlechip is realized by constructing and combining a resistance-capacitance filter, a comparator, a differential circuit and a triode logic circuit, and the singlechip has the functions of resetting and hardware PWM (pulse width modulation) closing when the singlechip fails in operation;
2. the low-cost hardware watchdog protection circuit not only improves the running safety and reliability of the low-speed vehicle, but also solves the problem of low cost pressure;
3. the problem of cost and safe complete dilemma is solved, can in time reset the singlechip and in time close the power supply and continuously output when the singlechip breaks down or the program runs away, make the car can obtain effective control, reduce the dangerous accident of driving a vehicle and take place.
Drawings
Fig. 1 is a schematic diagram of the operation of the hardware watchdog protection circuit system of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The specific embodiments described herein are merely illustrative of the invention and do not delimit the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a low-cost hardware watchdog protection circuit design method for a low-speed vehicle, which comprises the following steps:
s1: the vehicle body control system utilizes the single chip microcomputer as a carrier for controlling a software program, executes a control strategy and logic of the software program, and controls the motor to operate through different commands edited by the software program, thereby realizing different functions;
s2: the signal output device utilizes a square wave generator to continuously output a square wave signal for a software program to the outside, the square wave signal is provided for a hardware watchdog protection circuit through a waveform shaping device, the hardware watchdog protection circuit continuously monitors the square wave signal, the square wave generator is a closed circuit formed by a hysteresis comparator and an RC integrating circuit, the outputs of the two circuits are inputs of the other circuit, and the output of the hysteresis comparator is the output end of the square wave signal. The RC integrating circuit plays a role in delaying besides playing a role in negative feedback;
s3: the monitoring result output device compares two or more output data items by using the comparator to determine whether the two or more output data items are equal or determine the size relationship and the arrangement sequence between the two or more output data items to be comparison, then outputs the monitoring result to the single chip microcomputer by the signal output device, can reset the single chip microcomputer in time and close the power source to continuously output when the single chip microcomputer fails or a program flies, and triggers and resets the single chip microcomputer by using a differential circuit according to the monitoring result output by the comparator;
s4: the circuit logic conversion device utilizes a triode logic circuit to manufacture all devices and connecting leads of a logic gate circuit on the same semiconductor substrate, the logic gate consists of transistors, and the combination of the transistors can enable high and low levels representing two signals to generate high-level or low-level signals after the high and low levels pass through the transistors;
s5: the level switching device utilizes the buffer to provide the level switching control function for the PWM signal, the Pulse Width Modulation (PWM) switch type voltage stabilizing circuit adjusts the duty ratio through voltage feedback under the condition that the output frequency of the control circuit is not changed, thereby achieving the purpose of stabilizing the output voltage, the output ends of the gate circuits with buffer output are all 1 inverter, the output driving capability is only determined by the tube characteristic of the output stage and is irrelevant to the logic state of each input end. While the output driving capability of the gate circuit without the buffer is related to the input state. In another aspect. The transfer characteristic of the gate circuit with the buffer is at least the result of multiplying by the transfer characteristic of 3 levels, so that the conversion area is narrow, the shape is close to an ideal rectangle, and the gate circuit with the buffer is not changed along with the condition of the number of input using ends, and the anti-interference performance is improved by 10 percent of power supply voltage;
s6: the hardware switch device uses a buffer as a hardware switch of a PWM signal, the mark of the buffer is an index, the position of the buffer is reset to the index when a reset method is called, the mark is not always required to be defined, but the mark cannot be defined as a negative number and cannot be larger than the position when the mark is defined. If the flag is defined, the flag will be discarded when the position or limit is adjusted to a value less than the flag, thereby acting as a control switch and ultimately controlling the reset of the single chip microcomputer.
Specifically, the single chip microcomputer in step S1 includes an arithmetic unit, a controller, and a memory, and is integrated on a chip, and when in use, the single chip microcomputer writes out and executes a software program in the form of an instruction.
Specifically, the waveform shaping device in step S2 is a resistance-capacitance filter, and is a circuit that uses a resistor and a capacitor to perform filtering, the resistor is connected in series to the output end of the rectifier, the capacitors are connected in parallel to the two ends of the resistor, the filtering efficiency is high, the voltage reduction and current limiting functions can be achieved, and the resistor contained inside the rectifier is a cut-off frequency resistor.
Specifically, the monitoring result output device in step S3 is a comparator, an analog voltage signal is compared with a reference voltage by using the comparator, and an output pin of the comparator is a collector of a transistor or a drain of an FET, so that in order to improve the anti-interference capability of the comparator, the comparator can be modified into a hysteresis comparator and a window comparator.
Specifically, the triode logic circuit in step S4 may not only amplify the analog signal, but also be used as a control switch, and the triode used as the switch is in a cut-off and saturation state.
Specifically, in the hardware switching device in step S6, in the test of the PWM device, the direct introduction of the SMB high-frequency cable into the external capacitor end of the device may affect the measurement result of the frequency or time parameter, and the buffer BUF634 is used to isolate the SMB high-frequency cable from the capacitor charge and discharge end of the device, thereby effectively controlling the start and stop of the PWM device.
In summary, the following steps: when the single chip microcomputer executes a software program, the single chip microcomputer abnormally operates (such as program runaway) when the software program is executed due to uncertain factors such as software Bug or external interference, a square wave generator generated by the software program suddenly cannot continuously output square wave signals, so that a resistance-capacitance filter cannot continuously receive the square wave signals, the shaped signals cannot be correctly supplied to a comparator, the comparator outputs a monitoring result, the single chip microcomputer is reset through a differential circuit and a logic circuit, meanwhile, a buffer is closed to enable the square wave generator, unexpected power source continuous output is closed, a motor cuts off and controls a power source, after the single chip microcomputer is quickly reset, the program starts to normally operate, the square wave generator normally works, at the moment, a hardware watchdog protection circuit starts the power source output according to a normal monitoring result, so that the motor is normally controlled again, ensuring the running safety of the low-speed vehicle.
The existing low-speed vehicle controller technology omits the function safety under the condition of low cost and high pressure, and causes inestimable safety risk to driving, so the technical scheme of the invention can well solve the low cost pressure and reduce the driving safety risk.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments or portions thereof without departing from the spirit and scope of the invention.
Claims (6)
1. A low-cost hardware watchdog protection circuit design method for a low-speed vehicle is characterized by comprising the following steps: the protection circuit design method comprises the following specific steps:
s1: the vehicle body control system utilizes the single chip microcomputer as a carrier for controlling a software program, executes a control strategy and logic of the software program, and controls the motor to operate through different commands edited by the software program, thereby realizing different functions;
s2: the signal output device continuously outputs a square wave signal for the software program by using a square wave generator, and the square wave signal is provided for the hardware watchdog protection circuit by a waveform shaping device, and the hardware watchdog protection circuit continuously monitors the square wave signal;
s3: the monitoring result output device controls the single chip microcomputer through the monitoring result output by the signal output device, and can reset the single chip microcomputer in time and close the power source to continuously output when the single chip microcomputer fails or a program runs off;
s4: the circuit logic conversion device utilizes a triode logic circuit to manufacture all devices and connecting leads of a logic gate circuit on the same semiconductor substrate, the logic gate consists of transistors, and the combination of the transistors can enable high and low levels representing two signals to generate high-level or low-level signals after the high and low levels pass through the transistors;
s5: the level switching device provides a level switching control function for the PWM signal by utilizing the buffer;
s6: and the hardware switching device utilizes the buffer as the hardware switch of the PWM signal.
2. The design method of the low-cost hardware watchdog protection circuit for the low-speed vehicle according to claim 1, characterized in that: the single chip microcomputer in the step S1 includes an arithmetic unit, a controller and a memory, and is integrated on one chip, and when in use, the single chip microcomputer writes out and executes a software program in the form of instructions.
3. The design method of the low-cost hardware watchdog protection circuit for the low-speed vehicle according to claim 1, characterized in that: the waveform shaping device in step S2 is a resistance-capacitance filter, which is a circuit that uses a resistor and a capacitor to perform filtering, the resistor is connected in series to the output end of the rectifier, the capacitors are connected in parallel to the two ends of the resistor, the filtering efficiency is high, and the voltage-reducing and current-limiting functions can be achieved, and the resistor contained in the filter is a cut-off frequency resistor.
4. The design method of the low-cost hardware watchdog protection circuit for the low-speed vehicle according to claim 1, characterized in that: the monitoring result output device in step S3 is a comparator, which is used to compare an analog voltage signal with a reference voltage, and its output pin is the collector of a transistor or the drain of an FET, so that in order to improve its anti-interference capability, the comparator can be modified into a hysteresis comparator and a window comparator.
5. The design method of the low-cost hardware watchdog protection circuit for the low-speed vehicle according to claim 1, characterized in that: the triode logic circuit in the step S4 not only can amplify the analog signal, but also can be used as a control switch, and the triode used as the switch is in a cut-off and saturation state.
6. The design method of the low-cost hardware watchdog protection circuit for the low-speed vehicle according to claim 1, characterized in that: in the hardware switching device in the step S6, in the test of the PWM device, the direct introduction of the SMB high-frequency cable into the external capacitor end of the device may affect the measurement result of the frequency or time parameter, and the buffer BUF634 is used to isolate the SMB high-frequency cable from the capacitor charge and discharge end of the device, thereby effectively controlling the start and stop of the PWM device.
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| CN112586088A (en) * | 2020-04-21 | 2021-03-30 | 深圳市大疆创新科技有限公司 | Drive system and movable platform |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112586088A (en) * | 2020-04-21 | 2021-03-30 | 深圳市大疆创新科技有限公司 | Drive system and movable platform |
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Application publication date: 20200107 |