CN210380233U - BUCK power output short-circuit protection circuit - Google Patents
BUCK power output short-circuit protection circuit Download PDFInfo
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- CN210380233U CN210380233U CN201921359263.6U CN201921359263U CN210380233U CN 210380233 U CN210380233 U CN 210380233U CN 201921359263 U CN201921359263 U CN 201921359263U CN 210380233 U CN210380233 U CN 210380233U
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Abstract
The utility model provides a BUCK power output short circuit protection circuit, a first voltage division timer is used for dividing the power input voltage to obtain a first voltage division voltage and inputting the first voltage division voltage to a first comparator; the second voltage divider is used for dividing the output voltage of the power supply to obtain a second divided voltage and inputting the second divided voltage to the second comparator; the first comparator is used for comparing the first divided voltage with a reference voltage Vref and outputting one of high and low levels; the second comparator is used for comparing the second divided voltage with the reference voltage Vref and outputting one of high and low levels; the AND gate is used for performing AND operation on the level signals output by the first comparator and the second comparator to output one of a normal opening signal or a short-circuit protection signal to the controller; and the controller controls the work of the BUCK power supply module according to the output signal of the AND gate.
Description
Technical Field
The utility model relates to a BUCK power output short-circuit protection circuit.
Background
The BUCK circuit is a circuit which is widely applied in a switching power supply and has the advantages of high integration level, high cost performance, simple peripheral circuit, high efficiency and the like. With the continuous development of electronic technology, the functions of electronic equipment are becoming more and more complete, and the requirements on power supplies are also becoming higher and higher. The power supply must possess various protect function to guarantee can safe and reliable work in the work of abnormal environment, and output short circuit protect function belongs to one of them.
In the prior art, the output short-circuit protection function is mainly realized by the following two ways:
firstly, a cycle-by-cycle current limiting mode working process: when the main switch tube of the power supply is turned on, the main switch tube is turned off after the main control unit detects that the working current reaches a set threshold value, the turn-off time is prolonged until the next switching period, and the steps are repeated
Secondly, the working process of the cycle-by-cycle current limiting + intermittent working mode is as follows: on the basis of the first mode, a timing function is added to the main switch of the power supply, if the duration time of the overcurrent state reaches a certain value, the power supply stops working for a period of time, then is restarted, and the steps are repeated.
However, in the first method, when the output is short-circuited, a large persistent current still exists between the freewheeling diode (synchronous rectification MOS transistor) and the output inductor, which may cause component loss and excessive temperature rise. In the second mode, the system has good performance and good protection effect, but the system has high cost and has excessive performance when applied to a low-power BUCK power supply.
Disclosure of Invention
In view of the above technical problem, the utility model provides a BUCK power output short-circuit protection circuit, including first partial pressure time delay unit, second partial pressure ware, first comparator, second comparator, AND gate, controller, BUCK power module;
the first division timer is used for dividing the power input voltage to obtain a first division voltage and inputting the first division voltage to the first comparator;
the second voltage divider is used for dividing the output voltage of the power supply to obtain a second divided voltage and inputting the second divided voltage to the second comparator;
the first comparator is used for comparing the first divided voltage with a reference voltage Vref and outputting one of high and low levels;
the second comparator is used for comparing the second divided voltage with a reference voltage Vref and outputting one of high and low levels;
the AND gate is used for performing AND operation on the level signals output by the first comparator and the second comparator and outputting one of a normal opening signal or a short-circuit protection signal to the controller;
the controller is used for processing the level signal output by the AND gate and outputting a normal opening signal or a short-circuit protection signal for controlling the BUCK power supply module.
When the BUCK power supply module is started, the level signals output by the first comparator and the second comparator output a normal opening signal to the controller after the level signals act on the AND gate.
When the BUCK power supply module is in short circuit, the level signals output by the first comparator and the second comparator output a short-circuit protection signal to the controller after the level signals output by the first comparator and the second comparator act on the AND gate.
Furthermore, the first time divider comprises a first resistor, a second resistor and a first capacitor, wherein one end of the first resistor is connected to the BUCK power supply voltage input end after being connected with the second resistor in series, the other end of the first resistor is grounded, the first capacitor is connected with the second resistor in parallel, and one end of the first capacitor is led out between the first resistor and the second resistor and is connected to the first comparator.
Further, the second voltage divider comprises a third resistor and a fourth resistor, wherein one end of the third resistor is connected to the BUCK power supply voltage output end Vout after being connected in series with the fourth resistor, the other end of the third resistor is grounded, and one end of the third resistor is led out from the third resistor and the fourth resistor and is connected to the second comparator.
Further, the first comparator and the second comparator both include a normal phase input end, an inverse phase input inverter and an output end, the inverse phase input ends of the first comparator and the second comparator are respectively connected to the first voltage division delayer and the second voltage division device, the normal phase input ends of the first comparator and the second comparator are both connected to the reference voltage end, and the output ends of the first comparator and the second comparator are both connected to the and gate.
Furthermore, the first comparator and the second comparator are respectively provided with a first output pull-up resistor and a second output pull-up resistor.
Furthermore, the and gate is an and gate, the and gate comprises two input ends and an output end, the two input ends of the and gate are respectively connected to the first comparator and the second comparator, and one output end of the and gate is connected to the controller.
Further, the controller comprises an astable multivibrator, a triode and a square wave high-low level duration adjusting module, wherein a RST end of the astable multivibrator is connected to an AND gate, a base of the triode is connected to an OUT end of the astable multivibrator, and when the RST is at a high level, the square wave high-low level duration adjusting module is used for adjusting the OUT end of the astable multivibrator U4 to output a square wave with fixed frequency and a certain duty ratio.
Further, the square wave high-low level duration adjusting module comprises a fifth resistor, a sixth resistor and a second capacitor, wherein the fifth resistor, the sixth resistor and the second capacitor are connected in series, then one end of the fifth resistor, the other end of the sixth resistor and the second capacitor are connected to the ground, a DIS end connected to the astable multivibrator is led out between the fifth resistor and the sixth resistor, and a THR end and a TRIG end connected to the astable multivibrator are led out between the sixth resistor and the second capacitor C2.
The utility model has the advantages that:
1. by monitoring the output voltage, when the output of the BUCK power supply is short-circuited, a 555 time-base circuit is utilized to introduce a protection mode of an intermittent working mode;
2. by monitoring the input voltage/external enable signal, the error protection during normal work is avoided;
3. the intermittent operating mode may enable automatic recovery after the fault is removed.
Drawings
FIG. 1 is a schematic diagram of the structure of the present invention;
fig. 2 is a circuit structure diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1, the present invention provides a short circuit protection circuit for BUCK power output, which comprises a first divider timer 10, a second divider 20, a first comparator 30, a second comparator 40, an and gate 50, a controller 60, and a BUCK power module 70.
The first voltage division delayer 10 is configured to divide a power input voltage to obtain a first voltage division voltage, and input the first voltage division voltage to the first comparator 30;
the second voltage divider 20 is configured to divide the power output voltage to obtain a second divided voltage, and input the second divided voltage to the second comparator 40;
the first comparator 30 is configured to compare the first divided voltage with a reference voltage Vref, and output one of a high level and a low level;
the second comparator 40 is configured to compare the second divided voltage with a reference voltage Vref, and output one of a high level and a low level;
the and gate 50 is used for outputting the level signals outputted by the first comparator 30 and the second comparator 40 to one of an and operation normal opening signal or a short-circuit protection signal to the controller;
the controller 60 is configured to process the level signal output by the and gate 50 and output a signal to control a normal turn-on signal or a short-circuit protection signal of the BUCK power module 70.
When the BUCK power module is started, the level signals output by the first comparator 30 and the second comparator 40 output a normal opening signal to the controller after the level signals act on the and gate 50.
When the BUCK power supply module is short-circuited, the level signals output by the first comparator 30 and the second comparator 40 output a short-circuit protection signal to the controller after being acted by the and gate 50.
Referring to fig. 2, specifically, the first division timer 10 includes a first resistor R1, a second resistor R2, and a first capacitor C1, wherein after the first resistor R1 and the second resistor R2 are connected in series, one end of the first resistor R2 is connected to the BUCK power supply voltage input terminal Vin, the other end of the first resistor R2 is connected to ground, the first capacitor C1 is connected in parallel with the second resistor R2, and one end of the first resistor R1 is connected to the first comparator 30.
Referring to fig. 2, specifically, the second voltage divider 20 includes a third resistor R3 and a fourth resistor R4, wherein the third resistor R3 is connected in series with the fourth resistor R4, and then one end of the third resistor R3526 is connected to the BUCK power supply voltage output terminal Vout, and the other end of the third resistor R4 is grounded, and one end of the third resistor R3 and one end of the fourth resistor R3 are led out and connected to the second comparator 40.
Referring to fig. 2, specifically, each of the first comparator 30 and the second comparator 40 includes a positive phase input terminal, an inverse phase input inverter, and an output terminal, the positive phase input terminal of the first comparator 30 and the positive phase input terminal of the second comparator 40 are respectively connected to the first voltage division delay 10 and the second voltage division 20, the positive phase input terminal of the first comparator 30 and the inverse phase input terminal of the second comparator 40 are both connected to a reference voltage terminal, and the output terminals of the first comparator 30 and the second comparator 40 are both connected to the and gate 50.
Referring to fig. 2, specifically, the and gate 50 is an and gate, the and gate includes two input terminals and an output terminal, the two input terminals of the and gate 50 are respectively connected to the first comparator and the second comparator, and one output terminal of the and gate 50 is connected to the controller 60.
Referring to fig. 2, in particular, the controller 60 includes an astable multivibrator U4, a transistor Q1, and a square-wave high-low level duration adjustment module, where a RST terminal of the astable multivibrator U4 is connected to the and gate 50, a base of the transistor Q1 is connected to an OUT terminal of the astable multivibrator U4, and when the RST terminal is at a high level, the square-wave high-low level duration adjustment module is configured to adjust the OUT terminal of the astable multivibrator U4 to output a square wave with a fixed frequency and a certain duty ratio.
The specific operation of the above structure is illustrated with reference to fig. 2:
the voltage output by the voltage input end Vin is subjected to the first voltage division delayer and then outputs a first divided voltage, when the BUCK power supply starts to supply power until the voltage is stable, the voltage output by the voltage input end Vin gradually increases from small to large to a stable value, so the first divided voltage change comprises two stages, firstly, when the first stage is carried OUT, the first divided voltage is smaller than a reference voltage Vref, then the first comparator outputs a low level, when the second stage is carried OUT, the first divided voltage is larger than the reference voltage Vref, the second comparator outputs a high level, when the first divided voltage is smaller than the reference voltage Vref, the AND gate and an OUT end of the astable multivibrator U4 both output a low voltage, and further the triode Q1 is cut off, CTRL is not influenced, the BUCK power supply is normally started, and Vout is also output from small to large. When Vout is output from a small place to a large place, a second divided voltage is obtained through the second voltage divider, similarly, the second divided voltage also comprises two stages, when the first stage is, the second divided voltage is smaller than the reference voltage, the second comparator outputs a high level, in the stage, the first comparator is still at a low level (namely, the first divided voltage is still at a stage smaller than the reference voltage), then when the second stage is, Vout is larger than the reference voltage, at the moment, the second comparator overturns to output a low level, and the AND gate and the OUT end of the astable multivibrator U4 are both caused to output a low voltage, so that the triode Q1 is cut off, and CTRL is not influenced.
When a short circuit occurs, Vout drops to a lower level, the second comparator goes high, the and gate outputs high since the first comparator also outputs high, and OUT outputs low when the astable multivibrator U4 has "RST low"; during RST high level, the characteristics of the square wave "of the configurable fixed frequency of OUT output and duty cycle, this moment, OUT end output high level, and then make triode Q1 switch on, CTRL is drawn down to the low level, the BUCK power stop work, OUT end output low level, CTRL is not influenced, the normal work of BUCK power, at this moment, the BUCK power is in intermittent type work mode, the utility model discloses the accessible sets up the square wave of OUT end and realizes that the normal operating time of power shortens, and the stop operating time is longer, and then can reduce the effective operating time of power to reduce device loss and temperature, reach the purpose that the system does not damage, the normal operating time of power should set up to be greater than the normal start-up time of power moreover, can guarantee like this that the power can resume normal work after short-circuit fault removes, otherwise the power will be in the.
Further, the square wave high-low level duration adjusting module includes a fifth resistor R5, a sixth resistor R6, and a second capacitor C2, wherein one end of the fifth resistor R5, the sixth resistor R6, and the second capacitor C2 are connected in series and then is connected to VCC, the other end of the fifth resistor R5 and the sixth resistor R6 are grounded, a DIS end connected to the astable multivibrator U4 is led out between the fifth resistor R6 and the second capacitor C2, and a THR end and a TRIG end connected to the astable multivibrator U4 are led out between the sixth resistor R6 and the second capacitor C2. The calculation time of the time for outputting the high level and the low level by the OUT is as follows: OUT outputs a high level duration tH of 0.693 (R3+ R4) C2 and a low level duration tL of 0.693R 4C 2.
Furthermore, the first comparator and the second comparator are respectively provided with a first output pull-up resistor R7 and a second output pull-up resistor R8.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (8)
1. A BUCK power output short-circuit protection circuit is characterized in that: the circuit comprises a first voltage division delayer, a second voltage divider, a first comparator, a second comparator, an AND gate, a controller and a BUCK power module;
the first division timer is used for dividing the power input voltage to obtain a first division voltage and inputting the first division voltage to the first comparator;
the second voltage divider is used for dividing the output voltage of the power supply to obtain a second divided voltage and inputting the second divided voltage to the second comparator;
the first comparator is used for comparing the first divided voltage with a reference voltage Vref and outputting one of high and low levels;
the second comparator is used for comparing the second divided voltage with a reference voltage Vref and outputting one of high and low levels;
the AND gate is used for performing AND operation on the level signals output by the first comparator and the second comparator and outputting one of a normal opening signal or a short-circuit protection signal to the controller;
the controller is used for processing the level signal output by the AND gate and outputting a signal for controlling the normal starting or short-circuit protection of the BUCK power module;
when the BUCK power supply module is started, the level signals output by the first comparator and the second comparator output a normal opening signal to the controller after the level signals act on the AND gate;
when the BUCK power supply module is in short circuit, the level signals output by the first comparator and the second comparator output a short-circuit protection signal to the controller after the level signals output by the first comparator and the second comparator act on the AND gate.
2. The power output short-circuit protection circuit according to claim 1, wherein: the first time divider comprises a first resistor, a second resistor and a first capacitor, wherein one end of the first resistor is connected with the BUCK power supply voltage input end after the first resistor is connected with the second resistor in series, the other end of the first resistor is grounded, the first capacitor is connected with the second resistor in parallel, and one end of the first capacitor is led out from the first resistor and connected into the first comparator.
3. The power output short-circuit protection circuit according to claim 1, wherein: the second voltage divider comprises a third resistor and a fourth resistor, wherein one end of the third resistor and one end of the fourth resistor are connected with the BUCK power supply voltage output end Vout after being connected in series, the other end of the third resistor and the other end of the fourth resistor are grounded, and one end of the third resistor and one end of the fourth resistor are led out and connected into the second comparator.
4. The power output short-circuit protection circuit according to claim 1, wherein: the first comparator and the second comparator respectively comprise a positive phase input end, a negative phase input inverter and an output end, the negative phase input ends of the first comparator and the second comparator are respectively connected to the first voltage division delayer and the second voltage division device, the positive phase input ends of the first comparator and the second comparator are respectively connected to a reference voltage end, and the output ends of the first comparator and the second comparator are respectively connected to an AND gate.
5. The power output short-circuit protection circuit according to claim 1, wherein: the first comparator and the second comparator are respectively provided with a first output pull-up resistor and a second output pull-up resistor.
6. The power output short-circuit protection circuit according to claim 1, wherein: the AND gate is an AND gate device, the AND gate device comprises two input ends and an output end, the two input ends of the AND gate are respectively connected to the first comparator and the second comparator, and one output end of the AND gate is connected to the controller.
7. The power output short-circuit protection circuit according to claim 1, wherein: the controller comprises an astable multivibrator, a triode and a square wave high-low level duration adjusting module, wherein the RST end of the astable multivibrator is connected into an AND gate, the base electrode of the triode is connected into the OUT end of the astable multivibrator, and when the RST is at a high level, the square wave high-low level duration adjusting module is used for adjusting the OUT end of the astable multivibrator U4 to output a square wave with fixed frequency and a certain duty ratio.
8. The power output short-circuit protection circuit according to claim 7, wherein: the square wave high-low level duration time adjusting module comprises a fifth resistor, a sixth resistor and a second capacitor, wherein the fifth resistor, the sixth resistor and the second capacitor are connected in series, then one end of the fifth resistor, the other end of the sixth resistor and the other end of the fifth resistor are connected to the ground, a DIS end of the astable multivibrator is led out between the fifth resistor and the sixth resistor, and one end of the sixth resistor and a THR end and a TRIG end of the astable multivibrator are led out between the sixth resistor and a second capacitor C2.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921359263.6U CN210380233U (en) | 2019-08-19 | 2019-08-19 | BUCK power output short-circuit protection circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201921359263.6U CN210380233U (en) | 2019-08-19 | 2019-08-19 | BUCK power output short-circuit protection circuit |
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| CN210380233U true CN210380233U (en) | 2020-04-21 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113889991A (en) * | 2020-07-03 | 2022-01-04 | 圣邦微电子（北京）股份有限公司 | Short-circuit protection circuit and short-circuit protection method |
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2019
- 2019-08-19 CN CN201921359263.6U patent/CN210380233U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113889991A (en) * | 2020-07-03 | 2022-01-04 | 圣邦微电子（北京）股份有限公司 | Short-circuit protection circuit and short-circuit protection method |
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| TR01 | Transfer of patent right |
Effective date of registration: 20220105 Address after: 430000 room 02, 4 / F, building A3, Wuhan International Enterprise Center, No. 1, Guanshan Second Road, Donghu New Technology Development Zone, Wuhan, Hubei Province Patentee after: WUHAN HUAXUN GUORONG TECHNOLOGY CO.,LTD. Address before: 518000 8a, zone a, zhongkonaneng building, No. 6, Yuexing 6th Road, Science Park, Yuehai street, Nanshan District, Shenzhen, Guangdong Patentee before: SHENZHEN HUAXUN FANGZHOU RADAR TECHNOLOGY EQUIPMENT Co.,Ltd. |
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